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target-arm: add cpu feature EL3 to CPUs with Security Extensions
Set ARM_FEATURE_EL3 feature for CPUs that implement Security Extensions. Backports commit c0ccb02db46c72b4b0fa8a475a6890c1e28064f0 from qemu
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parent
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@ -603,6 +603,7 @@ static void arm1176_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
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set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
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set_feature(&cpu->env, ARM_FEATURE_CACHE_DIRTY_REG);
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set_feature(&cpu->env, ARM_FEATURE_CACHE_DIRTY_REG);
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set_feature(&cpu->env, ARM_FEATURE_CACHE_BLOCK_OPS);
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set_feature(&cpu->env, ARM_FEATURE_CACHE_BLOCK_OPS);
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set_feature(&cpu->env, ARM_FEATURE_EL3);
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cpu->midr = 0x410fb767;
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cpu->midr = 0x410fb767;
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cpu->reset_fpsid = 0x410120b5;
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cpu->reset_fpsid = 0x410120b5;
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cpu->mvfr0 = 0x11111111;
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cpu->mvfr0 = 0x11111111;
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@ -691,6 +692,7 @@ static void cortex_a8_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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set_feature(&cpu->env, ARM_FEATURE_NEON);
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set_feature(&cpu->env, ARM_FEATURE_NEON);
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set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
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set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
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set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
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set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
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set_feature(&cpu->env, ARM_FEATURE_EL3);
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cpu->midr = 0x410fc080;
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cpu->midr = 0x410fc080;
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cpu->reset_fpsid = 0x410330c0;
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cpu->reset_fpsid = 0x410330c0;
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cpu->mvfr0 = 0x11110222;
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cpu->mvfr0 = 0x11110222;
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@ -755,6 +757,7 @@ static void cortex_a9_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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set_feature(&cpu->env, ARM_FEATURE_VFP_FP16);
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set_feature(&cpu->env, ARM_FEATURE_VFP_FP16);
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set_feature(&cpu->env, ARM_FEATURE_NEON);
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set_feature(&cpu->env, ARM_FEATURE_NEON);
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set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
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set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
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set_feature(&cpu->env, ARM_FEATURE_EL3);
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/* Note that A9 supports the MP extensions even for
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/* Note that A9 supports the MP extensions even for
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* A9UP and single-core A9MP (which are both different
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* A9UP and single-core A9MP (which are both different
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* and valid configurations; we don't model A9UP).
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* and valid configurations; we don't model A9UP).
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@ -822,6 +825,7 @@ static void cortex_a15_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
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set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
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set_feature(&cpu->env, ARM_FEATURE_CBAR_RO);
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set_feature(&cpu->env, ARM_FEATURE_CBAR_RO);
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set_feature(&cpu->env, ARM_FEATURE_LPAE);
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set_feature(&cpu->env, ARM_FEATURE_LPAE);
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set_feature(&cpu->env, ARM_FEATURE_EL3);
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cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A15;
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cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A15;
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cpu->midr = 0x412fc0f1;
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cpu->midr = 0x412fc0f1;
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cpu->reset_fpsid = 0x410430f0;
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cpu->reset_fpsid = 0x410430f0;
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