mirror of
https://github.com/yuzu-emu/unicorn.git
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x86: Data structure changes to support MSR based features
Add FeatureWordType indicator in struct FeatureWordInfo. Change feature_word_info[] accordingly. Change existing functions that refer to feature_word_info[] accordingly. Backports commit 07585923485952bf4cb7da563c9f91fecc85d09c from qemu
This commit is contained in:
Robert Hoo
Lioncash
parent
a09a074255
commit
947b021266
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@ -763,17 +763,36 @@ static void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1,
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/* missing:
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CPUID_XSAVE_XSAVEC, CPUID_XSAVE_XSAVES */
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typedef enum FeatureWordType {
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CPUID_FEATURE_WORD,
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MSR_FEATURE_WORD,
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} FeatureWordType;
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typedef struct FeatureWordInfo {
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FeatureWordType type;
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/* feature flags names are taken from "Intel Processor Identification and
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* the CPUID Instruction" and AMD's "CPUID Specification".
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* In cases of disagreement between feature naming conventions,
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* aliases may be added.
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*/
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const char *feat_names[32];
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uint32_t cpuid_eax; /* Input EAX for CPUID */
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bool cpuid_needs_ecx; /* CPUID instruction uses ECX as input */
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uint32_t cpuid_ecx; /* Input ECX value for CPUID */
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int cpuid_reg; /* output register (R_* constant) */
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union {
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/* If type==CPUID_FEATURE_WORD */
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struct {
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uint32_t eax; /* Input EAX for CPUID */
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bool needs_ecx; /* CPUID instruction uses ECX as input */
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uint32_t ecx; /* Input ECX value for CPUID */
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int reg; /* output register (R_* constant) */
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} cpuid;
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/* If type==MSR_FEATURE_WORD */
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struct {
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uint32_t index;
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struct { /*CPUID that enumerate this MSR*/
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FeatureWord cpuid_class;
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uint32_t cpuid_flag;
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} cpuid_dep;
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} msr;
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};
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uint32_t tcg_features; /* Feature flags supported by TCG */
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uint32_t unmigratable_flags; /* Feature flags known to be unmigratable */
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uint32_t migratable_flags; /* Feature flags known to be migratable */
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@ -784,7 +803,8 @@ typedef struct FeatureWordInfo {
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static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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// FEAT_1_EDX
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{
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{
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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"fpu", "vme", "de", "pse",
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"tsc", "msr", "pae", "mce",
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"cx8", "apic", NULL, "sep",
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@ -794,14 +814,13 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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"fxsr", "sse", "sse2", "ss",
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"ht" /* Intel htt */, "tm", "ia64", "pbe",
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},
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1,
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false,0,
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R_EDX,
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TCG_FEATURES,
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.cpuid = {.eax = 1, .reg = R_EDX, },
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.tcg_features = TCG_FEATURES,
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},
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// FEAT_1_ECX
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{
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{
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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"pni" /* Intel,AMD sse3 */, "pclmulqdq", "dtes64", "monitor",
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"ds-cpl", "vmx", "smx", "est",
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"tm2", "ssse3", "cid", NULL,
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@ -811,14 +830,13 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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"tsc-deadline", "aes", "xsave", NULL /* osxsave */,
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"avx", "f16c", "rdrand", "hypervisor",
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},
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1,
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false,0,
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R_ECX,
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TCG_EXT_FEATURES,
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.cpuid = { .eax = 1, .reg = R_ECX, },
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.tcg_features = TCG_EXT_FEATURES,
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},
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// FEAT_7_0_EBX
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{
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{
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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"fsgsbase", "tsc-adjust", NULL, "bmi1",
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"hle", "avx2", NULL, "smep",
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"bmi2", "erms", "invpcid", "rtm",
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@ -828,14 +846,17 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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"clwb", "intel-pt", "avx512pf", "avx512er",
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"avx512cd", "sha-ni", "avx512bw", "avx512vl",
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},
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7,
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true, 0,
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R_EBX,
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TCG_7_0_EBX_FEATURES,
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.cpuid = {
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.eax = 7,
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.needs_ecx = true, .ecx = 0,
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.reg = R_EBX,
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},
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.tcg_features = TCG_7_0_EBX_FEATURES,
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},
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// FEAT_7_0_ECX
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{
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{
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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NULL, "avx512vbmi", "umip", "pku",
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NULL /* ospke */, NULL, "avx512vbmi2", NULL,
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"gfni", "vaes", "vpclmulqdq", "avx512vnni",
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@ -845,14 +866,17 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL, "cldemote", NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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7,
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true, 0,
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R_ECX,
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TCG_7_0_ECX_FEATURES,
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.cpuid = {
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.eax = 7,
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.needs_ecx = true, .ecx = 0,
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.reg = R_ECX,
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},
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.tcg_features = TCG_7_0_ECX_FEATURES,
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},
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// FEAT_7_0_EDX
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{
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{
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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NULL, NULL, "avx512-4vnniw", "avx512-4fmaps",
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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@ -862,11 +886,13 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL, NULL, "spec-ctrl", NULL,
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NULL, "arch-capabilities", NULL, "ssbd",
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},
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7,
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true, 0,
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R_EDX,
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TCG_7_0_EDX_FEATURES,
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CPUID_7_0_EDX_ARCH_CAPABILITIES,
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.cpuid = {
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.eax = 7,
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.needs_ecx = true, .ecx = 0,
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.reg = R_EDX,
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},
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.tcg_features = TCG_7_0_EDX_FEATURES,
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.unmigratable_flags = CPUID_7_0_EDX_ARCH_CAPABILITIES,
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},
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/* Feature names that are already defined on feature_name[] but
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* are set on CPUID[8000_0001].EDX on AMD CPUs don't have their
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@ -875,7 +901,8 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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*/
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// FEAT_8000_0001_EDX
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{
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{
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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NULL /* fpu */, NULL /* vme */, NULL /* de */, NULL /* pse */,
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NULL /* tsc */, NULL /* msr */, NULL /* pae */, NULL /* mce */,
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NULL /* cx8 */, NULL /* apic */, NULL, "syscall",
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@ -885,32 +912,35 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL /* fxsr */, "fxsr-opt", "pdpe1gb", "rdtscp",
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NULL, "lm", "3dnowext", "3dnow",
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},
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0x80000001,
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false,0,
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R_EDX,
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TCG_EXT2_FEATURES,
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.cpuid = { .eax = 0x80000001, .reg = R_EDX, },
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.tcg_features = TCG_EXT2_FEATURES,
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},
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// FEAT_8000_0001_ECX
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{
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{
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"lahf-lm", "cmp_legacy", "svm", "extapic",
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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"lahf-lm", "cmp-legacy", "svm", "extapic",
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"cr8legacy", "abm", "sse4a", "misalignsse",
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"3dnowprefetch", "osvw", "ibs", "xop",
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"skinit", "wdt", NULL, "lwp",
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"fma4", "tce", NULL, "nodeid-msr",
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NULL, "tbm", "topoext", "perfctr-core",
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"perfctr_nb", NULL, NULL, NULL,
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"perfctr-nb", NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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0x80000001,
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false,0,
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R_ECX,
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TCG_EXT3_FEATURES,
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CPUID_EXT3_TOPOEXT,
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.cpuid = { .eax = 0x80000001, .reg = R_ECX, },
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.tcg_features = TCG_EXT3_FEATURES,
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/*
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* TOPOEXT is always allowed but can't be enabled blindly by
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* "-cpu host", as it requires consistent cache topology info
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* to be provided so it doesn't confuse guests.
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*/
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.no_autoenable_flags = CPUID_EXT3_TOPOEXT,
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},
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// FEAT_8000_0007_EDX
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{
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{
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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"invtsc", NULL, NULL, NULL,
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@ -920,15 +950,14 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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0x80000007,
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false,0,
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R_EDX,
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TCG_APM_FEATURES,
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CPUID_APM_INVTSC,
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.cpuid = { .eax = 0x80000007, .reg = R_EDX, },
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.tcg_features = TCG_APM_FEATURES,
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.unmigratable_flags = CPUID_APM_INVTSC,
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},
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// FEAT_8000_0008_EBX
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{
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{
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, "wbnoinvd", NULL, NULL,
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@ -938,15 +967,14 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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"amd-ssbd", "virt-ssbd", "amd-no-ssb", NULL,
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NULL, NULL, NULL, NULL,
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},
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0x80000008,
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false,0,
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R_EBX,
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0,
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0,
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.cpuid = { .eax = 0x80000008, .reg = R_EBX, },
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.tcg_features = 0,
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.unmigratable_flags = 0,
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},
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// FEAT_C000_0001_EDX
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{
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{
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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NULL, NULL, "xstore", "xstore-en",
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NULL, NULL, "xcrypt", "xcrypt-en",
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"ace2", "ace2-en", "phe", "phe-en",
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@ -956,16 +984,15 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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0xC0000001,
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false,0,
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R_EDX,
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TCG_EXT4_FEATURES,
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.cpuid = { .eax = 0xC0000001, .reg = R_EDX, },
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.tcg_features = TCG_EXT4_FEATURES,
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},
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// FEAT_KVM
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{
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{NULL},
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0,
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/* Unicorn: commented out
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{
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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"kvmclock", "kvm-nopiodelay", "kvm-mmu", "kvmclock",
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"kvm-asyncpf", "kvm-steal-time", "kvm-pv-eoi", "kvm-pv-unhalt",
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NULL, "kvm-pv-tlb-flush", NULL, "kvm-pv-ipi",
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@ -975,16 +1002,15 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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"kvmclock-stable-bit", NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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KVM_CPUID_FEATURES,
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false, 0,
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R_EAX,
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TCG_KVM_FEATURES,*/
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.cpuid = { .eax = KVM_CPUID_FEATURES, .reg = R_EAX, },
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.tcg_features = TCG_KVM_FEATURES,*/
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},
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// FEAT_KVM_HINTS
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{
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{NULL},
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0,
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/* Unicorn: commented out
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{
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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"kvm-hint-dedicated", NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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@ -994,33 +1020,34 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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KVM_CPUID_FEATURES,
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false, 0,
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R_EDX,
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TCG_KVM_FEATURES,*/
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.cpuid = { .eax = KVM_CPUID_FEATURES, .reg = R_EDX, },
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.tcg_features = TCG_KVM_FEATURES,
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.no_autoenable_flags = ~0U,*/
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},
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// FEAT_HYPERV_EAX
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{
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{
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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NULL /* hv_msr_vp_runtime_access */, NULL /* hv_msr_time_refcount_access */,
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NULL /* hv_msr_synic_access */, NULL /* hv_msr_stimer_access */,
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NULL /* hv_msr_apic_access */, NULL /* hv_msr_hypercall_access */,
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NULL /* hv_vpindex_access */, NULL /* hv_msr_reset_access */,
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NULL /* hv_msr_stats_access */, NULL /* hv_reftsc_access */,
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NULL /* hv_msr_idle_access */, NULL /* hv_msr_frequency_access */,
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NULL, NULL, NULL, NULL,
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NULL /* hv_msr_debug_access */, NULL /* hv_msr_reenlightenment_access */,
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NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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0x40000003,
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false, 0,
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R_EAX,
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.cpuid = { .eax = 0x40000003, .reg = R_EAX, },
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},
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// FEAT_HYPERV_EBX
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{
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{
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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NULL /* hv_create_partitions */, NULL /* hv_access_partition_id */,
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NULL /* hv_access_memory_pool */, NULL /* hv_adjust_message_buffers */,
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NULL /* hv_post_messages */, NULL /* hv_signal_events */,
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@ -1033,13 +1060,12 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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0x40000003,
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false, 0,
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R_EBX,
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.cpuid = { .eax = 0x40000003, .reg = R_EBX, },
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},
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// FEAT_HYPERV_EDX
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{
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{
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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NULL /* hv_mwait */, NULL /* hv_guest_debugging */,
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NULL /* hv_perf_monitor */, NULL /* hv_cpu_dynamic_part */,
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NULL /* hv_hypercall_params_xmm */, NULL /* hv_guest_idle_state */,
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@ -1051,13 +1077,12 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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0x40000003,
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false, 0,
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R_EDX,
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.cpuid = { .eax = 0x40000003, .reg = R_EDX, },
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},
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// FEAT_SVM
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{
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{
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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"npt", "lbrv", "svm-lock", "nrip-save",
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"tsc-scale", "vmcb-clean", "flushbyasid", "decodeassists",
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NULL, NULL, "pause-filter", NULL,
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@ -1067,15 +1092,13 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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0x8000000A,
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false, 0,
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R_EDX,
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0,
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TCG_SVM_FEATURES,
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.cpuid = { .eax = 0x8000000A, .reg = R_EDX, },
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.tcg_features = TCG_SVM_FEATURES,
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},
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// FEAT_XSAVE
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{
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{
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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"xsaveopt", "xsavec", "xgetbv1", "xsaves",
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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@ -1085,15 +1108,17 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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},
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0xd,
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true,1,
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R_EAX,
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0,
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TCG_XSAVE_FEATURES,
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.cpuid = {
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.eax = 0xd,
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.needs_ecx = true, .ecx = 1,
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.reg = R_EAX,
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},
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.tcg_features = TCG_XSAVE_FEATURES,
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},
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// FEAT_ARAT
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// FEAT_6_EAX
|
||||
{
|
||||
{
|
||||
.type = CPUID_FEATURE_WORD,
|
||||
.feat_names = {
|
||||
NULL, NULL, "arat", NULL,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL,
|
||||
|
|
@ -1103,32 +1128,32 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
|
|||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL,
|
||||
},
|
||||
6,
|
||||
false, 0,
|
||||
R_EAX,
|
||||
TCG_6_EAX_FEATURES,
|
||||
.cpuid = { .eax = 6, .reg = R_EAX, },
|
||||
.tcg_features = TCG_6_EAX_FEATURES,
|
||||
},
|
||||
// FEAT_XSAVE_COMP_LO
|
||||
{
|
||||
{NULL},
|
||||
0xD,
|
||||
true, 0,
|
||||
R_EAX,
|
||||
~0U,
|
||||
0,
|
||||
XSTATE_FP_MASK | XSTATE_SSE_MASK |
|
||||
.type = CPUID_FEATURE_WORD,
|
||||
.cpuid = {
|
||||
.eax = 0xD,
|
||||
.needs_ecx = true, .ecx = 0,
|
||||
.reg = R_EAX,
|
||||
},
|
||||
.tcg_features = ~0U,
|
||||
.migratable_flags = XSTATE_FP_MASK | XSTATE_SSE_MASK |
|
||||
XSTATE_YMM_MASK | XSTATE_BNDREGS_MASK | XSTATE_BNDCSR_MASK |
|
||||
XSTATE_OPMASK_MASK | XSTATE_ZMM_Hi256_MASK | XSTATE_Hi16_ZMM_MASK |
|
||||
XSTATE_PKRU_MASK,
|
||||
|
||||
},
|
||||
// FEAT_XSAVE_COMP_HI
|
||||
{
|
||||
{NULL},
|
||||
0xD,
|
||||
true, 0,
|
||||
R_EDX,
|
||||
~0U,
|
||||
.type = CPUID_FEATURE_WORD,
|
||||
.cpuid = {
|
||||
.eax = 0xD,
|
||||
.needs_ecx = true, .ecx = 0,
|
||||
.reg = R_EDX,
|
||||
},
|
||||
.tcg_features = ~0U,
|
||||
},
|
||||
};
|
||||
|
||||
|
|
@ -3450,21 +3475,41 @@ static PropValue tcg_default_props[] = {
|
|||
static uint32_t x86_cpu_get_supported_feature_word(struct uc_struct *uc,
|
||||
FeatureWord w, bool migratable);
|
||||
|
||||
static char *feature_word_description(FeatureWordInfo *f, uint32_t bit)
|
||||
{
|
||||
assert(f->type == CPUID_FEATURE_WORD || f->type == MSR_FEATURE_WORD);
|
||||
|
||||
switch (f->type) {
|
||||
case CPUID_FEATURE_WORD:
|
||||
{
|
||||
const char *reg = get_register_name_32(f->cpuid.reg);
|
||||
assert(reg);
|
||||
return g_strdup_printf("CPUID.%02XH:%s",
|
||||
f->cpuid.eax, reg);
|
||||
}
|
||||
case MSR_FEATURE_WORD:
|
||||
return g_strdup_printf("MSR(%02XH)",
|
||||
f->msr.index);
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static void report_unavailable_features(FeatureWord w, uint32_t mask)
|
||||
{
|
||||
FeatureWordInfo *f = &feature_word_info[w];
|
||||
int i;
|
||||
char *feat_word_str;
|
||||
|
||||
for (i = 0; i < 32; ++i) {
|
||||
if ((1UL << i) & mask) {
|
||||
const char *reg = get_register_name_32(f->cpuid_reg);
|
||||
assert(reg);
|
||||
fprintf(stderr, "warning: %s doesn't support requested feature: "
|
||||
"CPUID.%02XH:%s%s%s [bit %d]\n",
|
||||
feat_word_str = feature_word_description(f, i);
|
||||
fprintf(stderr, "warning: %s doesn't support requested feature: %s%s%s [bit %d]\n",
|
||||
"TCG",
|
||||
f->cpuid_eax, reg,
|
||||
feat_word_str,
|
||||
f->feat_names[i] ? "." : "",
|
||||
f->feat_names[i] ? f->feat_names[i] : "", i);
|
||||
g_free(feat_word_str);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -3812,11 +3857,19 @@ static void x86_cpu_get_feature_words(struct uc_struct *uc,
|
|||
|
||||
for (w = 0; w < FEATURE_WORDS; w++) {
|
||||
FeatureWordInfo *wi = &feature_word_info[w];
|
||||
/*
|
||||
* We didn't have MSR features when "feature-words" was
|
||||
* introduced. Therefore skipped other type entries.
|
||||
*/
|
||||
if (wi->type != CPUID_FEATURE_WORD) {
|
||||
continue;
|
||||
}
|
||||
|
||||
X86CPUFeatureWordInfo *qwi = &word_infos[w];
|
||||
qwi->cpuid_input_eax = wi->cpuid_eax;
|
||||
qwi->has_cpuid_input_ecx = wi->cpuid_needs_ecx;
|
||||
qwi->cpuid_input_ecx = wi->cpuid_ecx;
|
||||
qwi->cpuid_register = x86_reg_info_32[wi->cpuid_reg].qapi_enum;
|
||||
qwi->cpuid_input_eax = wi->cpuid.eax;
|
||||
qwi->has_cpuid_input_ecx = wi->cpuid.needs_ecx;
|
||||
qwi->cpuid_input_ecx = wi->cpuid.ecx;
|
||||
qwi->cpuid_register = x86_reg_info_32[wi->cpuid.reg].qapi_enum;
|
||||
qwi->features = array[w];
|
||||
|
||||
/* List will be in reverse order, but order shouldn't matter */
|
||||
|
|
@ -3923,7 +3976,7 @@ static uint32_t x86_cpu_get_supported_feature_word(struct uc_struct *uc,
|
|||
FeatureWord w, bool migratable_only)
|
||||
{
|
||||
FeatureWordInfo *wi = &feature_word_info[w];
|
||||
uint32_t r;
|
||||
uint32_t r = 0;
|
||||
|
||||
if (tcg_enabled(uc)) {
|
||||
r = wi->tcg_features;
|
||||
|
|
@ -4696,9 +4749,10 @@ static void x86_cpu_adjust_feat_level(X86CPU *cpu, FeatureWord w)
|
|||
{
|
||||
CPUX86State *env = &cpu->env;
|
||||
FeatureWordInfo *fi = &feature_word_info[w];
|
||||
uint32_t eax = fi->cpuid_eax;
|
||||
uint32_t eax = fi->cpuid.eax;
|
||||
uint32_t region = eax & 0xF0000000;
|
||||
|
||||
assert(feature_word_info[w].type == CPUID_FEATURE_WORD);
|
||||
if (!env->features[w]) {
|
||||
return;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue