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tcg: Use deposit and extract2 in tcg_gen_shifti_i64
Backports commit 02616bad6f0788652deaca9a48d0dfa7716ff87a from qemu
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269fa0daba
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@ -1362,31 +1362,33 @@ static inline void tcg_gen_shifti_i64(TCGContext *s, TCGv_i64 ret, TCGv_i64 arg1
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tcg_gen_shli_i32(s, TCGV_HIGH(s, ret), TCGV_LOW(s, arg1), c);
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tcg_gen_movi_i32(s, TCGV_LOW(s, ret), 0);
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}
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} else {
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TCGv_i32 t0, t1;
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t0 = tcg_temp_new_i32(s);
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t1 = tcg_temp_new_i32(s);
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if (right) {
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tcg_gen_shli_i32(s, t0, TCGV_HIGH(s, arg1), 32 - c);
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if (arith) {
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tcg_gen_sari_i32(s, t1, TCGV_HIGH(s, arg1), c);
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} else {
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tcg_gen_shri_i32(s, t1, TCGV_HIGH(s, arg1), c);
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}
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tcg_gen_shri_i32(s, TCGV_LOW(s, ret), TCGV_LOW(s, arg1), c);
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tcg_gen_or_i32(s, TCGV_LOW(s, ret), TCGV_LOW(s, ret), t0);
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tcg_gen_mov_i32(s, TCGV_HIGH(s, ret), t1);
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} else if (right) {
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if (TCG_TARGET_HAS_extract2_i32) {
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tcg_gen_extract2_i32(s, TCGV_LOW(s, ret),
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TCGV_LOW(s, arg1), TCGV_HIGH(s, arg1), c);
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} else {
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tcg_gen_shri_i32(s, t0, TCGV_LOW(s, arg1), 32 - c);
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/* Note: ret can be the same as arg1, so we use t1 */
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tcg_gen_shli_i32(s, t1, TCGV_LOW(s, arg1), c);
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tcg_gen_shli_i32(s, TCGV_HIGH(s, ret), TCGV_HIGH(s, arg1), c);
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tcg_gen_or_i32(s, TCGV_HIGH(s, ret), TCGV_HIGH(s, ret), t0);
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tcg_gen_mov_i32(s, TCGV_LOW(s, ret), t1);
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tcg_gen_shri_i32(s, TCGV_LOW(s, ret), TCGV_LOW(s, arg1), c);
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tcg_gen_deposit_i32(s, TCGV_LOW(s, ret), TCGV_LOW(s, ret),
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TCGV_HIGH(s, arg1), 32 - c, c);
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}
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tcg_temp_free_i32(s, t0);
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tcg_temp_free_i32(s, t1);
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if (arith) {
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tcg_gen_sari_i32(s, TCGV_HIGH(s, ret), TCGV_HIGH(s, arg1), c);
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} else {
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tcg_gen_shri_i32(s, TCGV_HIGH(s, ret), TCGV_HIGH(s, arg1), c);
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}
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} else {
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if (TCG_TARGET_HAS_extract2_i32) {
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tcg_gen_extract2_i32(s, TCGV_HIGH(s, ret),
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TCGV_LOW(s, arg1), TCGV_HIGH(s, arg1), 32 - c);
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} else {
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TCGv_i32 t0 = tcg_temp_new_i32(s);
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tcg_gen_shri_i32(s, t0, TCGV_LOW(s, arg1), 32 - c);
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tcg_gen_deposit_i32(s, TCGV_HIGH(s, ret), t0,
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TCGV_HIGH(s, arg1), c, 32 - c);
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tcg_temp_free_i32(s, t0);
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}
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tcg_gen_shli_i32(s, TCGV_LOW(s, ret), TCGV_LOW(s, arg1), c);
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}
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}
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