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cputlb: move CPU_LOOP() for tlb_reset() to exec.c

Browse source 
To prepare for multi-arch, cputlb.c should only have awareness of one
single architecture. This means it should not have access to the full
CPU lists which may be heterogeneous. Instead, push the CPU_LOOP() up
to the one and only caller in exec.c.

Backports commit 9a13565d52bfd321934fb44ee004bbaf5f5913a8 from qemu
This commit is contained in:
Peter Crosthwaite 2018-02-23 10:46:05 -05:00 committed by Lioncash
parent a8085d5a38
commit 97c9423ee8
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
17 changed files with 18 additions and 48 deletions
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4
qemu/aarch64.h
View file

@ -314,7 +314,6 @@
#define cpu_restore_state_from_tb cpu_restore_state_from_tb_aarch64 #define cpu_restore_state_from_tb cpu_restore_state_from_tb_aarch64
#define cpu_single_step cpu_single_step_aarch64 #define cpu_single_step cpu_single_step_aarch64
#define cpu_tb_exec cpu_tb_exec_aarch64 #define cpu_tb_exec cpu_tb_exec_aarch64
#define cpu_tlb_reset_dirty_all cpu_tlb_reset_dirty_all_aarch64
#define cpu_to_be64 cpu_to_be64_aarch64 #define cpu_to_be64 cpu_to_be64_aarch64
#define cpu_to_le32 cpu_to_le32_aarch64 #define cpu_to_le32 cpu_to_le32_aarch64
#define cpu_to_le64 cpu_to_le64_aarch64 #define cpu_to_le64 cpu_to_le64_aarch64
@ -3046,10 +3045,9 @@
#define tlbimva_write tlbimva_write_aarch64 #define tlbimva_write tlbimva_write_aarch64
#define tlb_is_dirty_ram tlb_is_dirty_ram_aarch64 #define tlb_is_dirty_ram tlb_is_dirty_ram_aarch64
#define tlb_protect_code tlb_protect_code_aarch64 #define tlb_protect_code tlb_protect_code_aarch64
#define tlb_reset_dirty tlb_reset_dirty_aarch64
#define tlb_reset_dirty_range tlb_reset_dirty_range_aarch64 #define tlb_reset_dirty_range tlb_reset_dirty_range_aarch64
#define tlb_reset_dirty_range_all tlb_reset_dirty_range_all_aarch64
#define tlb_set_dirty tlb_set_dirty_aarch64 #define tlb_set_dirty tlb_set_dirty_aarch64
#define tlb_set_dirty1 tlb_set_dirty1_aarch64
#define tlb_unprotect_code tlb_unprotect_code_aarch64 #define tlb_unprotect_code tlb_unprotect_code_aarch64
#define tlb_vaddr_to_host tlb_vaddr_to_host_aarch64 #define tlb_vaddr_to_host tlb_vaddr_to_host_aarch64
#define token_get_type token_get_type_aarch64 #define token_get_type token_get_type_aarch64

4
qemu/aarch64eb.h
View file

@ -314,7 +314,6 @@
#define cpu_restore_state_from_tb cpu_restore_state_from_tb_aarch64eb #define cpu_restore_state_from_tb cpu_restore_state_from_tb_aarch64eb
#define cpu_single_step cpu_single_step_aarch64eb #define cpu_single_step cpu_single_step_aarch64eb
#define cpu_tb_exec cpu_tb_exec_aarch64eb #define cpu_tb_exec cpu_tb_exec_aarch64eb
#define cpu_tlb_reset_dirty_all cpu_tlb_reset_dirty_all_aarch64eb
#define cpu_to_be64 cpu_to_be64_aarch64eb #define cpu_to_be64 cpu_to_be64_aarch64eb
#define cpu_to_le32 cpu_to_le32_aarch64eb #define cpu_to_le32 cpu_to_le32_aarch64eb
#define cpu_to_le64 cpu_to_le64_aarch64eb #define cpu_to_le64 cpu_to_le64_aarch64eb
@ -3046,10 +3045,9 @@
#define tlbimva_write tlbimva_write_aarch64eb #define tlbimva_write tlbimva_write_aarch64eb
#define tlb_is_dirty_ram tlb_is_dirty_ram_aarch64eb #define tlb_is_dirty_ram tlb_is_dirty_ram_aarch64eb
#define tlb_protect_code tlb_protect_code_aarch64eb #define tlb_protect_code tlb_protect_code_aarch64eb
#define tlb_reset_dirty tlb_reset_dirty_aarch64eb
#define tlb_reset_dirty_range tlb_reset_dirty_range_aarch64eb #define tlb_reset_dirty_range tlb_reset_dirty_range_aarch64eb
#define tlb_reset_dirty_range_all tlb_reset_dirty_range_all_aarch64eb
#define tlb_set_dirty tlb_set_dirty_aarch64eb #define tlb_set_dirty tlb_set_dirty_aarch64eb
#define tlb_set_dirty1 tlb_set_dirty1_aarch64eb
#define tlb_unprotect_code tlb_unprotect_code_aarch64eb #define tlb_unprotect_code tlb_unprotect_code_aarch64eb
#define tlb_vaddr_to_host tlb_vaddr_to_host_aarch64eb #define tlb_vaddr_to_host tlb_vaddr_to_host_aarch64eb
#define token_get_type token_get_type_aarch64eb #define token_get_type token_get_type_aarch64eb

4
qemu/arm.h
View file

@ -314,7 +314,6 @@
#define cpu_restore_state_from_tb cpu_restore_state_from_tb_arm #define cpu_restore_state_from_tb cpu_restore_state_from_tb_arm
#define cpu_single_step cpu_single_step_arm #define cpu_single_step cpu_single_step_arm
#define cpu_tb_exec cpu_tb_exec_arm #define cpu_tb_exec cpu_tb_exec_arm
#define cpu_tlb_reset_dirty_all cpu_tlb_reset_dirty_all_arm
#define cpu_to_be64 cpu_to_be64_arm #define cpu_to_be64 cpu_to_be64_arm
#define cpu_to_le32 cpu_to_le32_arm #define cpu_to_le32 cpu_to_le32_arm
#define cpu_to_le64 cpu_to_le64_arm #define cpu_to_le64 cpu_to_le64_arm
@ -3046,10 +3045,9 @@
#define tlbimva_write tlbimva_write_arm #define tlbimva_write tlbimva_write_arm
#define tlb_is_dirty_ram tlb_is_dirty_ram_arm #define tlb_is_dirty_ram tlb_is_dirty_ram_arm
#define tlb_protect_code tlb_protect_code_arm #define tlb_protect_code tlb_protect_code_arm
#define tlb_reset_dirty tlb_reset_dirty_arm
#define tlb_reset_dirty_range tlb_reset_dirty_range_arm #define tlb_reset_dirty_range tlb_reset_dirty_range_arm
#define tlb_reset_dirty_range_all tlb_reset_dirty_range_all_arm
#define tlb_set_dirty tlb_set_dirty_arm #define tlb_set_dirty tlb_set_dirty_arm
#define tlb_set_dirty1 tlb_set_dirty1_arm
#define tlb_unprotect_code tlb_unprotect_code_arm #define tlb_unprotect_code tlb_unprotect_code_arm
#define tlb_vaddr_to_host tlb_vaddr_to_host_arm #define tlb_vaddr_to_host tlb_vaddr_to_host_arm
#define token_get_type token_get_type_arm #define token_get_type token_get_type_arm

4
qemu/armeb.h
View file

@ -314,7 +314,6 @@
#define cpu_restore_state_from_tb cpu_restore_state_from_tb_armeb #define cpu_restore_state_from_tb cpu_restore_state_from_tb_armeb
#define cpu_single_step cpu_single_step_armeb #define cpu_single_step cpu_single_step_armeb
#define cpu_tb_exec cpu_tb_exec_armeb #define cpu_tb_exec cpu_tb_exec_armeb
#define cpu_tlb_reset_dirty_all cpu_tlb_reset_dirty_all_armeb
#define cpu_to_be64 cpu_to_be64_armeb #define cpu_to_be64 cpu_to_be64_armeb
#define cpu_to_le32 cpu_to_le32_armeb #define cpu_to_le32 cpu_to_le32_armeb
#define cpu_to_le64 cpu_to_le64_armeb #define cpu_to_le64 cpu_to_le64_armeb
@ -3046,10 +3045,9 @@
#define tlbimva_write tlbimva_write_armeb #define tlbimva_write tlbimva_write_armeb
#define tlb_is_dirty_ram tlb_is_dirty_ram_armeb #define tlb_is_dirty_ram tlb_is_dirty_ram_armeb
#define tlb_protect_code tlb_protect_code_armeb #define tlb_protect_code tlb_protect_code_armeb
#define tlb_reset_dirty tlb_reset_dirty_armeb
#define tlb_reset_dirty_range tlb_reset_dirty_range_armeb #define tlb_reset_dirty_range tlb_reset_dirty_range_armeb
#define tlb_reset_dirty_range_all tlb_reset_dirty_range_all_armeb
#define tlb_set_dirty tlb_set_dirty_armeb #define tlb_set_dirty tlb_set_dirty_armeb
#define tlb_set_dirty1 tlb_set_dirty1_armeb
#define tlb_unprotect_code tlb_unprotect_code_armeb #define tlb_unprotect_code tlb_unprotect_code_armeb
#define tlb_vaddr_to_host tlb_vaddr_to_host_armeb #define tlb_vaddr_to_host tlb_vaddr_to_host_armeb
#define token_get_type token_get_type_armeb #define token_get_type token_get_type_armeb

4
qemu/cputlb.c
View file

@ -152,10 +152,8 @@ void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry, uintptr_t start,
} }
} }
void cpu_tlb_reset_dirty_all(struct uc_struct *uc, void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length)
ram_addr_t start1, ram_addr_t length)
{ {
CPUState *cpu = uc->cpu;
CPUArchState *env; CPUArchState *env;
int mmu_idx; int mmu_idx;

4
qemu/exec.c
View file

@ -751,7 +751,7 @@ found:
} }
static void tlb_reset_dirty_range_all(struct uc_struct* uc, static void tlb_reset_dirty_range_all(struct uc_struct* uc,
ram_addr_t start, ram_addr_t length) ram_addr_t start, ram_addr_t length)
{ {
ram_addr_t start1; ram_addr_t start1;
RAMBlock *block; RAMBlock *block;
@ -763,7 +763,7 @@ static void tlb_reset_dirty_range_all(struct uc_struct* uc,
block = qemu_get_ram_block(uc, start); block = qemu_get_ram_block(uc, start);
assert(block == qemu_get_ram_block(uc, end - 1)); assert(block == qemu_get_ram_block(uc, end - 1));
start1 = (uintptr_t)ramblock_ptr(block, start - block->offset); start1 = (uintptr_t)ramblock_ptr(block, start - block->offset);
cpu_tlb_reset_dirty_all(uc, start1, length); tlb_reset_dirty(uc->cpu, start1, length);
} }
/* Note: start and end must be within the same ram block. */ /* Note: start and end must be within the same ram block. */

4
qemu/header_gen.py
View file

@ -320,7 +320,6 @@ symbols = (
'cpu_restore_state_from_tb', 'cpu_restore_state_from_tb',
'cpu_single_step', 'cpu_single_step',
'cpu_tb_exec', 'cpu_tb_exec',
'cpu_tlb_reset_dirty_all',
'cpu_to_be64', 'cpu_to_be64',
'cpu_to_le32', 'cpu_to_le32',
'cpu_to_le64', 'cpu_to_le64',
@ -3052,10 +3051,9 @@ symbols = (
'tlbimva_write', 'tlbimva_write',
'tlb_is_dirty_ram', 'tlb_is_dirty_ram',
'tlb_protect_code', 'tlb_protect_code',
'tlb_reset_dirty',
'tlb_reset_dirty_range', 'tlb_reset_dirty_range',
'tlb_reset_dirty_range_all',
'tlb_set_dirty', 'tlb_set_dirty',
'tlb_set_dirty1',
'tlb_unprotect_code', 'tlb_unprotect_code',
'tlb_vaddr_to_host', 'tlb_vaddr_to_host',
'token_get_type', 'token_get_type',

2
qemu/include/exec/cputlb.h
View file

@ -25,7 +25,7 @@ void tlb_protect_code(struct uc_struct *uc, ram_addr_t ram_addr);
void tlb_unprotect_code(CPUState *cpu, ram_addr_t ram_addr); void tlb_unprotect_code(CPUState *cpu, ram_addr_t ram_addr);
void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry, void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry,
uintptr_t start, uintptr_t length); uintptr_t start, uintptr_t length);
void cpu_tlb_reset_dirty_all(struct uc_struct *uc, ram_addr_t start1, ram_addr_t length); void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length);
void tlb_set_dirty(CPUState *env, target_ulong vaddr); void tlb_set_dirty(CPUState *env, target_ulong vaddr);
//extern int tlb_flush_count; //extern int tlb_flush_count;

4
qemu/m68k.h
View file

@ -314,7 +314,6 @@
#define cpu_restore_state_from_tb cpu_restore_state_from_tb_m68k #define cpu_restore_state_from_tb cpu_restore_state_from_tb_m68k
#define cpu_single_step cpu_single_step_m68k #define cpu_single_step cpu_single_step_m68k
#define cpu_tb_exec cpu_tb_exec_m68k #define cpu_tb_exec cpu_tb_exec_m68k
#define cpu_tlb_reset_dirty_all cpu_tlb_reset_dirty_all_m68k
#define cpu_to_be64 cpu_to_be64_m68k #define cpu_to_be64 cpu_to_be64_m68k
#define cpu_to_le32 cpu_to_le32_m68k #define cpu_to_le32 cpu_to_le32_m68k
#define cpu_to_le64 cpu_to_le64_m68k #define cpu_to_le64 cpu_to_le64_m68k
@ -3046,10 +3045,9 @@
#define tlbimva_write tlbimva_write_m68k #define tlbimva_write tlbimva_write_m68k
#define tlb_is_dirty_ram tlb_is_dirty_ram_m68k #define tlb_is_dirty_ram tlb_is_dirty_ram_m68k
#define tlb_protect_code tlb_protect_code_m68k #define tlb_protect_code tlb_protect_code_m68k
#define tlb_reset_dirty tlb_reset_dirty_m68k
#define tlb_reset_dirty_range tlb_reset_dirty_range_m68k #define tlb_reset_dirty_range tlb_reset_dirty_range_m68k
#define tlb_reset_dirty_range_all tlb_reset_dirty_range_all_m68k
#define tlb_set_dirty tlb_set_dirty_m68k #define tlb_set_dirty tlb_set_dirty_m68k
#define tlb_set_dirty1 tlb_set_dirty1_m68k
#define tlb_unprotect_code tlb_unprotect_code_m68k #define tlb_unprotect_code tlb_unprotect_code_m68k
#define tlb_vaddr_to_host tlb_vaddr_to_host_m68k #define tlb_vaddr_to_host tlb_vaddr_to_host_m68k
#define token_get_type token_get_type_m68k #define token_get_type token_get_type_m68k

4
qemu/mips.h
View file

@ -314,7 +314,6 @@
#define cpu_restore_state_from_tb cpu_restore_state_from_tb_mips #define cpu_restore_state_from_tb cpu_restore_state_from_tb_mips
#define cpu_single_step cpu_single_step_mips #define cpu_single_step cpu_single_step_mips
#define cpu_tb_exec cpu_tb_exec_mips #define cpu_tb_exec cpu_tb_exec_mips
#define cpu_tlb_reset_dirty_all cpu_tlb_reset_dirty_all_mips
#define cpu_to_be64 cpu_to_be64_mips #define cpu_to_be64 cpu_to_be64_mips
#define cpu_to_le32 cpu_to_le32_mips #define cpu_to_le32 cpu_to_le32_mips
#define cpu_to_le64 cpu_to_le64_mips #define cpu_to_le64 cpu_to_le64_mips
@ -3046,10 +3045,9 @@
#define tlbimva_write tlbimva_write_mips #define tlbimva_write tlbimva_write_mips
#define tlb_is_dirty_ram tlb_is_dirty_ram_mips #define tlb_is_dirty_ram tlb_is_dirty_ram_mips
#define tlb_protect_code tlb_protect_code_mips #define tlb_protect_code tlb_protect_code_mips
#define tlb_reset_dirty tlb_reset_dirty_mips
#define tlb_reset_dirty_range tlb_reset_dirty_range_mips #define tlb_reset_dirty_range tlb_reset_dirty_range_mips
#define tlb_reset_dirty_range_all tlb_reset_dirty_range_all_mips
#define tlb_set_dirty tlb_set_dirty_mips #define tlb_set_dirty tlb_set_dirty_mips
#define tlb_set_dirty1 tlb_set_dirty1_mips
#define tlb_unprotect_code tlb_unprotect_code_mips #define tlb_unprotect_code tlb_unprotect_code_mips
#define tlb_vaddr_to_host tlb_vaddr_to_host_mips #define tlb_vaddr_to_host tlb_vaddr_to_host_mips
#define token_get_type token_get_type_mips #define token_get_type token_get_type_mips

4
qemu/mips64.h
View file

@ -314,7 +314,6 @@
#define cpu_restore_state_from_tb cpu_restore_state_from_tb_mips64 #define cpu_restore_state_from_tb cpu_restore_state_from_tb_mips64
#define cpu_single_step cpu_single_step_mips64 #define cpu_single_step cpu_single_step_mips64
#define cpu_tb_exec cpu_tb_exec_mips64 #define cpu_tb_exec cpu_tb_exec_mips64
#define cpu_tlb_reset_dirty_all cpu_tlb_reset_dirty_all_mips64
#define cpu_to_be64 cpu_to_be64_mips64 #define cpu_to_be64 cpu_to_be64_mips64
#define cpu_to_le32 cpu_to_le32_mips64 #define cpu_to_le32 cpu_to_le32_mips64
#define cpu_to_le64 cpu_to_le64_mips64 #define cpu_to_le64 cpu_to_le64_mips64
@ -3046,10 +3045,9 @@
#define tlbimva_write tlbimva_write_mips64 #define tlbimva_write tlbimva_write_mips64
#define tlb_is_dirty_ram tlb_is_dirty_ram_mips64 #define tlb_is_dirty_ram tlb_is_dirty_ram_mips64
#define tlb_protect_code tlb_protect_code_mips64 #define tlb_protect_code tlb_protect_code_mips64
#define tlb_reset_dirty tlb_reset_dirty_mips64
#define tlb_reset_dirty_range tlb_reset_dirty_range_mips64 #define tlb_reset_dirty_range tlb_reset_dirty_range_mips64
#define tlb_reset_dirty_range_all tlb_reset_dirty_range_all_mips64
#define tlb_set_dirty tlb_set_dirty_mips64 #define tlb_set_dirty tlb_set_dirty_mips64
#define tlb_set_dirty1 tlb_set_dirty1_mips64
#define tlb_unprotect_code tlb_unprotect_code_mips64 #define tlb_unprotect_code tlb_unprotect_code_mips64
#define tlb_vaddr_to_host tlb_vaddr_to_host_mips64 #define tlb_vaddr_to_host tlb_vaddr_to_host_mips64
#define token_get_type token_get_type_mips64 #define token_get_type token_get_type_mips64

4
qemu/mips64el.h
View file

@ -314,7 +314,6 @@
#define cpu_restore_state_from_tb cpu_restore_state_from_tb_mips64el #define cpu_restore_state_from_tb cpu_restore_state_from_tb_mips64el
#define cpu_single_step cpu_single_step_mips64el #define cpu_single_step cpu_single_step_mips64el
#define cpu_tb_exec cpu_tb_exec_mips64el #define cpu_tb_exec cpu_tb_exec_mips64el
#define cpu_tlb_reset_dirty_all cpu_tlb_reset_dirty_all_mips64el
#define cpu_to_be64 cpu_to_be64_mips64el #define cpu_to_be64 cpu_to_be64_mips64el
#define cpu_to_le32 cpu_to_le32_mips64el #define cpu_to_le32 cpu_to_le32_mips64el
#define cpu_to_le64 cpu_to_le64_mips64el #define cpu_to_le64 cpu_to_le64_mips64el
@ -3046,10 +3045,9 @@
#define tlbimva_write tlbimva_write_mips64el #define tlbimva_write tlbimva_write_mips64el
#define tlb_is_dirty_ram tlb_is_dirty_ram_mips64el #define tlb_is_dirty_ram tlb_is_dirty_ram_mips64el
#define tlb_protect_code tlb_protect_code_mips64el #define tlb_protect_code tlb_protect_code_mips64el
#define tlb_reset_dirty tlb_reset_dirty_mips64el
#define tlb_reset_dirty_range tlb_reset_dirty_range_mips64el #define tlb_reset_dirty_range tlb_reset_dirty_range_mips64el
#define tlb_reset_dirty_range_all tlb_reset_dirty_range_all_mips64el
#define tlb_set_dirty tlb_set_dirty_mips64el #define tlb_set_dirty tlb_set_dirty_mips64el
#define tlb_set_dirty1 tlb_set_dirty1_mips64el
#define tlb_unprotect_code tlb_unprotect_code_mips64el #define tlb_unprotect_code tlb_unprotect_code_mips64el
#define tlb_vaddr_to_host tlb_vaddr_to_host_mips64el #define tlb_vaddr_to_host tlb_vaddr_to_host_mips64el
#define token_get_type token_get_type_mips64el #define token_get_type token_get_type_mips64el

4
qemu/mipsel.h
View file

@ -314,7 +314,6 @@
#define cpu_restore_state_from_tb cpu_restore_state_from_tb_mipsel #define cpu_restore_state_from_tb cpu_restore_state_from_tb_mipsel
#define cpu_single_step cpu_single_step_mipsel #define cpu_single_step cpu_single_step_mipsel
#define cpu_tb_exec cpu_tb_exec_mipsel #define cpu_tb_exec cpu_tb_exec_mipsel
#define cpu_tlb_reset_dirty_all cpu_tlb_reset_dirty_all_mipsel
#define cpu_to_be64 cpu_to_be64_mipsel #define cpu_to_be64 cpu_to_be64_mipsel
#define cpu_to_le32 cpu_to_le32_mipsel #define cpu_to_le32 cpu_to_le32_mipsel
#define cpu_to_le64 cpu_to_le64_mipsel #define cpu_to_le64 cpu_to_le64_mipsel
@ -3046,10 +3045,9 @@
#define tlbimva_write tlbimva_write_mipsel #define tlbimva_write tlbimva_write_mipsel
#define tlb_is_dirty_ram tlb_is_dirty_ram_mipsel #define tlb_is_dirty_ram tlb_is_dirty_ram_mipsel
#define tlb_protect_code tlb_protect_code_mipsel #define tlb_protect_code tlb_protect_code_mipsel
#define tlb_reset_dirty tlb_reset_dirty_mipsel
#define tlb_reset_dirty_range tlb_reset_dirty_range_mipsel #define tlb_reset_dirty_range tlb_reset_dirty_range_mipsel
#define tlb_reset_dirty_range_all tlb_reset_dirty_range_all_mipsel
#define tlb_set_dirty tlb_set_dirty_mipsel #define tlb_set_dirty tlb_set_dirty_mipsel
#define tlb_set_dirty1 tlb_set_dirty1_mipsel
#define tlb_unprotect_code tlb_unprotect_code_mipsel #define tlb_unprotect_code tlb_unprotect_code_mipsel
#define tlb_vaddr_to_host tlb_vaddr_to_host_mipsel #define tlb_vaddr_to_host tlb_vaddr_to_host_mipsel
#define token_get_type token_get_type_mipsel #define token_get_type token_get_type_mipsel

4
qemu/powerpc.h
View file

@ -314,7 +314,6 @@
#define cpu_restore_state_from_tb cpu_restore_state_from_tb_powerpc #define cpu_restore_state_from_tb cpu_restore_state_from_tb_powerpc
#define cpu_single_step cpu_single_step_powerpc #define cpu_single_step cpu_single_step_powerpc
#define cpu_tb_exec cpu_tb_exec_powerpc #define cpu_tb_exec cpu_tb_exec_powerpc
#define cpu_tlb_reset_dirty_all cpu_tlb_reset_dirty_all_powerpc
#define cpu_to_be64 cpu_to_be64_powerpc #define cpu_to_be64 cpu_to_be64_powerpc
#define cpu_to_le32 cpu_to_le32_powerpc #define cpu_to_le32 cpu_to_le32_powerpc
#define cpu_to_le64 cpu_to_le64_powerpc #define cpu_to_le64 cpu_to_le64_powerpc
@ -3046,10 +3045,9 @@
#define tlbimva_write tlbimva_write_powerpc #define tlbimva_write tlbimva_write_powerpc
#define tlb_is_dirty_ram tlb_is_dirty_ram_powerpc #define tlb_is_dirty_ram tlb_is_dirty_ram_powerpc
#define tlb_protect_code tlb_protect_code_powerpc #define tlb_protect_code tlb_protect_code_powerpc
#define tlb_reset_dirty tlb_reset_dirty_powerpc
#define tlb_reset_dirty_range tlb_reset_dirty_range_powerpc #define tlb_reset_dirty_range tlb_reset_dirty_range_powerpc
#define tlb_reset_dirty_range_all tlb_reset_dirty_range_all_powerpc
#define tlb_set_dirty tlb_set_dirty_powerpc #define tlb_set_dirty tlb_set_dirty_powerpc
#define tlb_set_dirty1 tlb_set_dirty1_powerpc
#define tlb_unprotect_code tlb_unprotect_code_powerpc #define tlb_unprotect_code tlb_unprotect_code_powerpc
#define tlb_vaddr_to_host tlb_vaddr_to_host_powerpc #define tlb_vaddr_to_host tlb_vaddr_to_host_powerpc
#define token_get_type token_get_type_powerpc #define token_get_type token_get_type_powerpc

4
qemu/sparc.h
View file

@ -314,7 +314,6 @@
#define cpu_restore_state_from_tb cpu_restore_state_from_tb_sparc #define cpu_restore_state_from_tb cpu_restore_state_from_tb_sparc
#define cpu_single_step cpu_single_step_sparc #define cpu_single_step cpu_single_step_sparc
#define cpu_tb_exec cpu_tb_exec_sparc #define cpu_tb_exec cpu_tb_exec_sparc
#define cpu_tlb_reset_dirty_all cpu_tlb_reset_dirty_all_sparc
#define cpu_to_be64 cpu_to_be64_sparc #define cpu_to_be64 cpu_to_be64_sparc
#define cpu_to_le32 cpu_to_le32_sparc #define cpu_to_le32 cpu_to_le32_sparc
#define cpu_to_le64 cpu_to_le64_sparc #define cpu_to_le64 cpu_to_le64_sparc
@ -3046,10 +3045,9 @@
#define tlbimva_write tlbimva_write_sparc #define tlbimva_write tlbimva_write_sparc
#define tlb_is_dirty_ram tlb_is_dirty_ram_sparc #define tlb_is_dirty_ram tlb_is_dirty_ram_sparc
#define tlb_protect_code tlb_protect_code_sparc #define tlb_protect_code tlb_protect_code_sparc
#define tlb_reset_dirty tlb_reset_dirty_sparc
#define tlb_reset_dirty_range tlb_reset_dirty_range_sparc #define tlb_reset_dirty_range tlb_reset_dirty_range_sparc
#define tlb_reset_dirty_range_all tlb_reset_dirty_range_all_sparc
#define tlb_set_dirty tlb_set_dirty_sparc #define tlb_set_dirty tlb_set_dirty_sparc
#define tlb_set_dirty1 tlb_set_dirty1_sparc
#define tlb_unprotect_code tlb_unprotect_code_sparc #define tlb_unprotect_code tlb_unprotect_code_sparc
#define tlb_vaddr_to_host tlb_vaddr_to_host_sparc #define tlb_vaddr_to_host tlb_vaddr_to_host_sparc
#define token_get_type token_get_type_sparc #define token_get_type token_get_type_sparc

4
qemu/sparc64.h
View file

@ -314,7 +314,6 @@
#define cpu_restore_state_from_tb cpu_restore_state_from_tb_sparc64 #define cpu_restore_state_from_tb cpu_restore_state_from_tb_sparc64
#define cpu_single_step cpu_single_step_sparc64 #define cpu_single_step cpu_single_step_sparc64
#define cpu_tb_exec cpu_tb_exec_sparc64 #define cpu_tb_exec cpu_tb_exec_sparc64
#define cpu_tlb_reset_dirty_all cpu_tlb_reset_dirty_all_sparc64
#define cpu_to_be64 cpu_to_be64_sparc64 #define cpu_to_be64 cpu_to_be64_sparc64
#define cpu_to_le32 cpu_to_le32_sparc64 #define cpu_to_le32 cpu_to_le32_sparc64
#define cpu_to_le64 cpu_to_le64_sparc64 #define cpu_to_le64 cpu_to_le64_sparc64
@ -3046,10 +3045,9 @@
#define tlbimva_write tlbimva_write_sparc64 #define tlbimva_write tlbimva_write_sparc64
#define tlb_is_dirty_ram tlb_is_dirty_ram_sparc64 #define tlb_is_dirty_ram tlb_is_dirty_ram_sparc64
#define tlb_protect_code tlb_protect_code_sparc64 #define tlb_protect_code tlb_protect_code_sparc64
#define tlb_reset_dirty tlb_reset_dirty_sparc64
#define tlb_reset_dirty_range tlb_reset_dirty_range_sparc64 #define tlb_reset_dirty_range tlb_reset_dirty_range_sparc64
#define tlb_reset_dirty_range_all tlb_reset_dirty_range_all_sparc64
#define tlb_set_dirty tlb_set_dirty_sparc64 #define tlb_set_dirty tlb_set_dirty_sparc64
#define tlb_set_dirty1 tlb_set_dirty1_sparc64
#define tlb_unprotect_code tlb_unprotect_code_sparc64 #define tlb_unprotect_code tlb_unprotect_code_sparc64
#define tlb_vaddr_to_host tlb_vaddr_to_host_sparc64 #define tlb_vaddr_to_host tlb_vaddr_to_host_sparc64
#define token_get_type token_get_type_sparc64 #define token_get_type token_get_type_sparc64

4
qemu/x86_64.h
View file

@ -314,7 +314,6 @@
#define cpu_restore_state_from_tb cpu_restore_state_from_tb_x86_64 #define cpu_restore_state_from_tb cpu_restore_state_from_tb_x86_64
#define cpu_single_step cpu_single_step_x86_64 #define cpu_single_step cpu_single_step_x86_64
#define cpu_tb_exec cpu_tb_exec_x86_64 #define cpu_tb_exec cpu_tb_exec_x86_64
#define cpu_tlb_reset_dirty_all cpu_tlb_reset_dirty_all_x86_64
#define cpu_to_be64 cpu_to_be64_x86_64 #define cpu_to_be64 cpu_to_be64_x86_64
#define cpu_to_le32 cpu_to_le32_x86_64 #define cpu_to_le32 cpu_to_le32_x86_64
#define cpu_to_le64 cpu_to_le64_x86_64 #define cpu_to_le64 cpu_to_le64_x86_64
@ -3046,10 +3045,9 @@
#define tlbimva_write tlbimva_write_x86_64 #define tlbimva_write tlbimva_write_x86_64
#define tlb_is_dirty_ram tlb_is_dirty_ram_x86_64 #define tlb_is_dirty_ram tlb_is_dirty_ram_x86_64
#define tlb_protect_code tlb_protect_code_x86_64 #define tlb_protect_code tlb_protect_code_x86_64
#define tlb_reset_dirty tlb_reset_dirty_x86_64
#define tlb_reset_dirty_range tlb_reset_dirty_range_x86_64 #define tlb_reset_dirty_range tlb_reset_dirty_range_x86_64
#define tlb_reset_dirty_range_all tlb_reset_dirty_range_all_x86_64
#define tlb_set_dirty tlb_set_dirty_x86_64 #define tlb_set_dirty tlb_set_dirty_x86_64
#define tlb_set_dirty1 tlb_set_dirty1_x86_64
#define tlb_unprotect_code tlb_unprotect_code_x86_64 #define tlb_unprotect_code tlb_unprotect_code_x86_64
#define tlb_vaddr_to_host tlb_vaddr_to_host_x86_64 #define tlb_vaddr_to_host tlb_vaddr_to_host_x86_64
#define token_get_type token_get_type_x86_64 #define token_get_type token_get_type_x86_64