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unicorn_arm: m68k/translate: Build fixes
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@ -82,10 +82,10 @@ int arm_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun
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*(int32_t *)value = ARM_CPU(uc, mycpu)->env.regs[15];
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break;
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case UC_ARM_REG_C1_C0_2:
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*(int32_t *)value = ARM_CPU(uc, mycpu)->env.cp15.c1_coproc;
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*(int32_t *)value = ARM_CPU(uc, mycpu)->env.cp15.cpacr_el1;
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break;
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case UC_ARM_REG_C13_C0_3:
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*(int32_t *)value = ARM_CPU(uc, mycpu)->env.cp15.tpidrro_el0;
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*(int32_t *)value = ARM_CPU(uc, mycpu)->env.cp15.tpidrro_el[0];
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break;
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case UC_ARM_REG_FPEXC:
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*(int32_t *)value = ARM_CPU(uc, mycpu)->env.vfp.xregs[ARM_VFP_FPEXC];
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@ -137,11 +137,11 @@ int arm_reg_write(struct uc_struct *uc, unsigned int *regs, void* const* vals, i
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break;
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case UC_ARM_REG_C1_C0_2:
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ARM_CPU(uc, mycpu)->env.cp15.c1_coproc = *(int32_t *)value;
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ARM_CPU(uc, mycpu)->env.cp15.cpacr_el1 = *(int32_t *)value;
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break;
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case UC_ARM_REG_C13_C0_3:
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ARM_CPU(uc, mycpu)->env.cp15.tpidrro_el0 = *(int32_t *)value;
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ARM_CPU(uc, mycpu)->env.cp15.tpidrro_el[0] = *(int32_t *)value;
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break;
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case UC_ARM_REG_FPEXC:
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ARM_CPU(uc, mycpu)->env.vfp.xregs[ARM_VFP_FPEXC] = *(int32_t *)value;
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@ -3136,7 +3136,7 @@ gen_intermediate_code_internal(M68kCPU *cpu, TranslationBlock *tb,
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tcg_ctx->gen_opc_instr_start[lj] = 1;
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//tcg_ctx.gen_opc_icount[lj] = num_insns;
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}
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tcg_gen_insn_start(tcg_ctx, s->pc);
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tcg_gen_insn_start(tcg_ctx, dc->pc);
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num_insns++;
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//if (num_insns == max_insns && (tb->cflags & CF_LAST_IO)) {
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