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target-mips: Use clz opcode

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Backports commit 1a0196c5c7f197fad7b079074d587b3204bcfb0f from qemu
This commit is contained in:
Richard Henderson 2018-03-01 16:07:59 -05:00 committed by Lioncash
parent 2cf34e1b55
commit 9b2752b0a9
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GPG key ID: 4E3C3CC1031BA9C7
8 changed files with 16 additions and 56 deletions
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4
qemu/header_gen.py
View file

@ -3536,8 +3536,6 @@ mips_symbols = (
'helper_bitrev',
'helper_bitswap',
'helper_cfc1',
'helper_clo',
'helper_clz',
'helper_cmp_d_eq',
'helper_cmp_d_f',
'helper_cmp_d_le',
@ -3660,8 +3658,6 @@ mips_symbols = (
'helper_cmpu_lt_qb',
'helper_ctc1',
'helper_dbitswap',
'helper_dclo',
'helper_dclz',
'helper_deret',
'helper_dextp',
'helper_dextpdp',

4
qemu/mips.h
View file

@ -3476,8 +3476,6 @@
#define helper_bitrev helper_bitrev_mips
#define helper_bitswap helper_bitswap_mips
#define helper_cfc1 helper_cfc1_mips
#define helper_clo helper_clo_mips
#define helper_clz helper_clz_mips
#define helper_cmp_d_eq helper_cmp_d_eq_mips
#define helper_cmp_d_f helper_cmp_d_f_mips
#define helper_cmp_d_le helper_cmp_d_le_mips
@ -3600,8 +3598,6 @@
#define helper_cmpu_lt_qb helper_cmpu_lt_qb_mips
#define helper_ctc1 helper_ctc1_mips
#define helper_dbitswap helper_dbitswap_mips
#define helper_dclo helper_dclo_mips
#define helper_dclz helper_dclz_mips
#define helper_deret helper_deret_mips
#define helper_dextp helper_dextp_mips
#define helper_dextpdp helper_dextpdp_mips

4
qemu/mips64.h
View file

@ -3476,8 +3476,6 @@
#define helper_bitrev helper_bitrev_mips64
#define helper_bitswap helper_bitswap_mips64
#define helper_cfc1 helper_cfc1_mips64
#define helper_clo helper_clo_mips64
#define helper_clz helper_clz_mips64
#define helper_cmp_d_eq helper_cmp_d_eq_mips64
#define helper_cmp_d_f helper_cmp_d_f_mips64
#define helper_cmp_d_le helper_cmp_d_le_mips64
@ -3600,8 +3598,6 @@
#define helper_cmpu_lt_qb helper_cmpu_lt_qb_mips64
#define helper_ctc1 helper_ctc1_mips64
#define helper_dbitswap helper_dbitswap_mips64
#define helper_dclo helper_dclo_mips64
#define helper_dclz helper_dclz_mips64
#define helper_deret helper_deret_mips64
#define helper_dextp helper_dextp_mips64
#define helper_dextpdp helper_dextpdp_mips64

4
qemu/mips64el.h
View file

@ -3476,8 +3476,6 @@
#define helper_bitrev helper_bitrev_mips64el
#define helper_bitswap helper_bitswap_mips64el
#define helper_cfc1 helper_cfc1_mips64el
#define helper_clo helper_clo_mips64el
#define helper_clz helper_clz_mips64el
#define helper_cmp_d_eq helper_cmp_d_eq_mips64el
#define helper_cmp_d_f helper_cmp_d_f_mips64el
#define helper_cmp_d_le helper_cmp_d_le_mips64el
@ -3600,8 +3598,6 @@
#define helper_cmpu_lt_qb helper_cmpu_lt_qb_mips64el
#define helper_ctc1 helper_ctc1_mips64el
#define helper_dbitswap helper_dbitswap_mips64el
#define helper_dclo helper_dclo_mips64el
#define helper_dclz helper_dclz_mips64el
#define helper_deret helper_deret_mips64el
#define helper_dextp helper_dextp_mips64el
#define helper_dextpdp helper_dextpdp_mips64el

4
qemu/mipsel.h
View file

@ -3476,8 +3476,6 @@
#define helper_bitrev helper_bitrev_mipsel
#define helper_bitswap helper_bitswap_mipsel
#define helper_cfc1 helper_cfc1_mipsel
#define helper_clo helper_clo_mipsel
#define helper_clz helper_clz_mipsel
#define helper_cmp_d_eq helper_cmp_d_eq_mipsel
#define helper_cmp_d_f helper_cmp_d_f_mipsel
#define helper_cmp_d_le helper_cmp_d_le_mipsel
@ -3600,8 +3598,6 @@
#define helper_cmpu_lt_qb helper_cmpu_lt_qb_mipsel
#define helper_ctc1 helper_ctc1_mipsel
#define helper_dbitswap helper_dbitswap_mipsel
#define helper_dclo helper_dclo_mipsel
#define helper_dclz helper_dclz_mipsel
#define helper_deret helper_deret_mipsel
#define helper_dextp helper_dextp_mipsel
#define helper_dextpdp helper_dextpdp_mipsel

7
qemu/target-mips/helper.h
View file

@ -20,13 +20,6 @@ DEF_HELPER_4(scd, tl, env, tl, tl, int)
#endif
#endif
DEF_HELPER_FLAGS_1(clo, TCG_CALL_NO_RWG_SE, tl, tl)
DEF_HELPER_FLAGS_1(clz, TCG_CALL_NO_RWG_SE, tl, tl)
#ifdef TARGET_MIPS64
DEF_HELPER_FLAGS_1(dclo, TCG_CALL_NO_RWG_SE, tl, tl)
DEF_HELPER_FLAGS_1(dclz, TCG_CALL_NO_RWG_SE, tl, tl)
#endif
DEF_HELPER_3(muls, tl, env, tl, tl)
DEF_HELPER_3(mulsu, tl, env, tl, tl)
DEF_HELPER_3(macc, tl, env, tl, tl)

22
qemu/target-mips/op_helper.c
View file

@ -102,28 +102,6 @@ HELPER_ST(sd, stq, uint64_t)
#endif
#undef HELPER_ST
target_ulong helper_clo (target_ulong arg1)
{
return clo32(arg1);
}
target_ulong helper_clz (target_ulong arg1)
{
return clz32(arg1);
}
#if defined(TARGET_MIPS64)
target_ulong helper_dclo (target_ulong arg1)
{
return clo64(arg1);
}
target_ulong helper_dclz (target_ulong arg1)
{
return clz64(arg1);
}
#endif /* TARGET_MIPS64 */
/* 64 bits arithmetic for 32 bits hosts */
static inline uint64_t get_HILO(CPUMIPSState *env)
{

23
qemu/target-mips/translate.c
View file

@ -3680,29 +3680,38 @@ static void gen_cl (DisasContext *ctx, uint32_t opc,
/* Treat as NOP. */
return;
}
t0 = tcg_temp_new(tcg_ctx);
t0 = cpu_gpr[rd];
gen_load_gpr(ctx, t0, rs);
switch (opc) {
case OPC_CLO:
case R6_OPC_CLO:
gen_helper_clo(tcg_ctx, cpu_gpr[rd], t0);
#if defined(TARGET_MIPS64)
case OPC_DCLO:
case R6_OPC_DCLO:
#endif
tcg_gen_not_tl(tcg_ctx, t0, t0);
break;
}
switch (opc) {
case OPC_CLO:
case R6_OPC_CLO:
case OPC_CLZ:
case R6_OPC_CLZ:
gen_helper_clz(tcg_ctx, cpu_gpr[rd], t0);
tcg_gen_ext32u_tl(tcg_ctx, t0, t0);
tcg_gen_clzi_tl(tcg_ctx, t0, t0, TARGET_LONG_BITS);
tcg_gen_subi_tl(tcg_ctx, t0, t0, TARGET_LONG_BITS - 32);
break;
#if defined(TARGET_MIPS64)
case OPC_DCLO:
case R6_OPC_DCLO:
gen_helper_dclo(tcg_ctx, cpu_gpr[rd], t0);
break;
case OPC_DCLZ:
case R6_OPC_DCLZ:
gen_helper_dclz(tcg_ctx, cpu_gpr[rd], t0);
tcg_gen_clzi_i64(tcg_ctx, t0, t0, 64);
break;
#endif
}
tcg_temp_free(tcg_ctx, t0);
}
/* Godson integer instructions */