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target-sparc: Pass TCGMemOp constants to helper_ld/st_asi

Browse source 
Reduces the argument count for helper_ld_asi; do helper_st_asi
for consistency.

Backports commit 6850811e7c56403b0d225a1bffd096abf2ff06f9 from qemu
This commit is contained in:
Richard Henderson 2018-02-25 18:17:39 -05:00 committed by Lioncash
parent 950aa89c7a
commit 9d47cda44c
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
3 changed files with 69 additions and 66 deletions
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4
qemu/target-sparc/helper.h
View file

@ -50,8 +50,8 @@ DEF_HELPER_FLAGS_3(udivx, TCG_CALL_NO_WG, i64, env, i64, i64)
DEF_HELPER_FLAGS_3(ldqf, TCG_CALL_NO_WG, void, env, tl, int)
DEF_HELPER_FLAGS_3(stqf, TCG_CALL_NO_WG, void, env, tl, int)
#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
DEF_HELPER_FLAGS_5(ld_asi, TCG_CALL_NO_WG, i64, env, tl, int, int, int)
DEF_HELPER_FLAGS_5(st_asi, TCG_CALL_NO_WG, void, env, tl, i64, int, int)
DEF_HELPER_FLAGS_4(ld_asi, TCG_CALL_NO_WG, i64, env, tl, int, i32)
DEF_HELPER_FLAGS_5(st_asi, TCG_CALL_NO_WG, void, env, tl, i64, int, i32)
#endif
DEF_HELPER_2(ldfsr, void, env, i32)
DEF_HELPER_FLAGS_1(fabss, TCG_CALL_NO_RWG_SE, f32, f32)

73
qemu/target-sparc/ldst_helper.c
View file

@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "tcg.h"
#include "exec/helper-proto.h"
#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
@ -381,9 +382,11 @@ static uint64_t leon3_cache_control_ld(CPUSPARCState *env, target_ulong addr,
return ret;
}
uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
int sign)
uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,
int asi, uint32_t memop)
{
int size = 1 << (memop & MO_SIZE);
int sign = memop & MO_SIGN;
CPUState *cs = CPU(sparc_env_get_cpu(env));
uint64_t ret = 0;
#if defined(DEBUG_MXCC) || defined(DEBUG_ASI)
@ -653,9 +656,10 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
return ret;
}
void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
int size)
void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val,
int asi, uint32_t memop)
{
int size = 1 << (memop & MO_SIZE);
SPARCCPU *cpu = sparc_env_get_cpu(env);
CPUState *cs = CPU(cpu);
@ -1102,9 +1106,11 @@ static inline target_ulong asi_address_mask(CPUSPARCState *env,
}
#ifdef CONFIG_USER_ONLY
uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
int sign)
uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,
int asi, uint32_t memop)
{
int size = 1 << (memop & MO_SIZE);
int sign = memop & MO_SIGN;
uint64_t ret = 0;
#if defined(DEBUG_ASI)
target_ulong last_addr = addr;
@ -1210,8 +1216,9 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
}
void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val,
int asi, int size)
int asi, uint32_t memop)
{
int size = 1 << (memop & MO_SIZE);
#ifdef DEBUG_ASI
dump_asi("write", addr, asi, size, val);
#endif
@ -1281,9 +1288,11 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val,
#else /* CONFIG_USER_ONLY */
uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
int sign)
uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,
int asi, uint32_t memop)
{
int size = 1 << (memop & MO_SIZE);
int sign = memop & MO_SIGN;
CPUState *cs = CPU(sparc_env_get_cpu(env));
uint64_t ret = 0;
#if defined(DEBUG_ASI)
@ -1663,8 +1672,9 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
}
void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val,
int asi, int size)
int asi, uint32_t memop)
{
int size = 1 << (memop & MO_SIZE);
SPARCCPU *cpu = sparc_env_get_cpu(env);
CPUState *cs = CPU(cpu);
@ -2143,8 +2153,8 @@ void helper_ldda_asi(CPUSPARCState *env, target_ulong addr, int asi)
a single 64-bit load. However, LE asis *are* treated
as two 32-bit loads individually byte swapped. */
helper_check_align(env, addr, 0x7);
QT0.high = (uint32_t)helper_ld_asi(env, addr, asi, 4, 0);
QT0.low = (uint32_t)helper_ld_asi(env, addr + 4, asi, 4, 0);
QT0.high = (uint32_t)helper_ld_asi(env, addr, asi, MO_UL);
QT0.low = (uint32_t)helper_ld_asi(env, addr + 4, asi, MO_UL);
return;
}
@ -2177,7 +2187,7 @@ void helper_ldf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
}
helper_check_align(env, addr, 0x3f);
for (i = 0; i < 8; i++, rd += 2, addr += 8) {
env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi & 0x8f, 8, 0);
env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi & 0x8f, MO_Q);
}
return;
@ -2195,7 +2205,7 @@ void helper_ldf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
}
helper_check_align(env, addr, 0x3f);
for (i = 0; i < 8; i++, rd += 2, addr += 8) {
env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi & 0x19, 8, 0);
env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi & 0x19, MO_Q);
}
return;
@ -2206,7 +2216,7 @@ void helper_ldf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
switch (size) {
default:
case 4:
val = helper_ld_asi(env, addr, asi, size, 0);
val = helper_ld_asi(env, addr, asi, MO_UL);
if (rd & 1) {
env->fpr[rd / 2].l.lower = val;
} else {
@ -2214,11 +2224,11 @@ void helper_ldf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
}
break;
case 8:
env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi, size, 0);
env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi, MO_Q);
break;
case 16:
env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi, 8, 0);
env->fpr[rd / 2 + 1].ll = helper_ld_asi(env, addr + 8, asi, 8, 0);
env->fpr[rd / 2].ll = helper_ld_asi(env, addr, asi, MO_Q);
env->fpr[rd / 2 + 1].ll = helper_ld_asi(env, addr + 8, asi, MO_Q);
break;
}
}
@ -2244,7 +2254,7 @@ void helper_stf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
}
helper_check_align(env, addr, 0x3f);
for (i = 0; i < 8; i++, rd += 2, addr += 8) {
helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi & 0x8f, 8);
helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi & 0x8f, MO_Q);
}
return;
@ -2262,7 +2272,7 @@ void helper_stf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
}
helper_check_align(env, addr, 0x3f);
for (i = 0; i < 8; i++, rd += 2, addr += 8) {
helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi & 0x19, 8);
helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi & 0x19, MO_Q);
}
return;
@ -2270,14 +2280,15 @@ void helper_stf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
case ASI_FL16_S: /* 16-bit floating point load secondary */
case ASI_FL16_PL: /* 16-bit floating point load primary, LE */
case ASI_FL16_SL: /* 16-bit floating point load secondary, LE */
helper_check_align(env, addr, 1);
/* Fall through */
val = env->fpr[rd / 2].l.lower;
helper_st_asi(env, addr, val, asi & 0x8d, MO_UW);
return;
case ASI_FL8_P: /* 8-bit floating point load primary */
case ASI_FL8_S: /* 8-bit floating point load secondary */
case ASI_FL8_PL: /* 8-bit floating point load primary, LE */
case ASI_FL8_SL: /* 8-bit floating point load secondary, LE */
val = env->fpr[rd / 2].l.lower;
helper_st_asi(env, addr, val, asi & 0x8d, ((asi & 2) >> 1) + 1);
helper_st_asi(env, addr, val, asi & 0x8d, MO_UB);
return;
default:
helper_check_align(env, addr, 3);
@ -2292,14 +2303,14 @@ void helper_stf_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
} else {
val = env->fpr[rd / 2].l.upper;
}
helper_st_asi(env, addr, val, asi, size);
helper_st_asi(env, addr, val, asi, MO_UL);
break;
case 8:
helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi, size);
helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi, MO_Q);
break;
case 16:
helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi, 8);
helper_st_asi(env, addr + 8, env->fpr[rd / 2 + 1].ll, asi, 8);
helper_st_asi(env, addr, env->fpr[rd / 2].ll, asi, MO_Q);
helper_st_asi(env, addr + 8, env->fpr[rd / 2 + 1].ll, asi, MO_Q);
break;
}
}
@ -2310,9 +2321,9 @@ target_ulong helper_casx_asi(CPUSPARCState *env, target_ulong addr,
{
target_ulong ret;
ret = helper_ld_asi(env, addr, asi, 8, 0);
ret = helper_ld_asi(env, addr, asi, MO_Q);
if (val2 == ret) {
helper_st_asi(env, addr, val1, asi, 8);
helper_st_asi(env, addr, val1, asi, MO_Q);
}
return ret;
}
@ -2325,10 +2336,10 @@ target_ulong helper_cas_asi(CPUSPARCState *env, target_ulong addr,
target_ulong ret;
val2 &= 0xffffffffUL;
ret = helper_ld_asi(env, addr, asi, 4, 0);
ret = helper_ld_asi(env, addr, asi, MO_UL);
ret &= 0xffffffffUL;
if (val2 == ret) {
helper_st_asi(env, addr, val1 & 0xffffffffUL, asi, 4);
helper_st_asi(env, addr, val1 & 0xffffffffUL, asi, MO_UL);
}
return ret;
}

58
qemu/target-sparc/translate.c
View file

@ -2265,22 +2265,20 @@ static void gen_ld_asi(DisasContext *dc, TCGv dst, TCGv addr,
default:
{
TCGv_i32 r_asi = tcg_const_i32(tcg_ctx, da.asi);
TCGv_i32 r_size = tcg_const_i32(tcg_ctx, 1 << (memop & MO_SIZE));
TCGv_i32 r_sign = tcg_const_i32(tcg_ctx, !!(memop & MO_SIGN));
TCGv_i32 r_mop = tcg_const_i32(tcg_ctx, memop);
save_state(dc);
#ifdef TARGET_SPARC64
gen_helper_ld_asi(tcg_ctx, dst, tcg_ctx->cpu_env, addr, r_asi, r_size, r_sign);
gen_helper_ld_asi(tcg_ctx, dst, tcg_ctx->cpu_env, addr, r_asi, r_mop);
#else
{
TCGv_i64 t64 = tcg_temp_new_i64(tcg_ctx);
gen_helper_ld_asi(tcg_ctx, t64, tcg_ctx->cpu_env, addr, r_asi, r_size, r_sign);
gen_helper_ld_asi(tcg_ctx, t64, tcg_ctx->cpu_env, addr, r_asi, r_mop);
tcg_gen_trunc_i64_tl(tcg_ctx, dst, t64);
tcg_temp_free_i64(tcg_ctx, t64);
}
#endif
tcg_temp_free_i32(tcg_ctx, r_sign);
tcg_temp_free_i32(tcg_ctx, r_size);
tcg_temp_free_i32(tcg_ctx, r_mop);
tcg_temp_free_i32(tcg_ctx, r_asi);
}
break;
@ -2306,20 +2304,20 @@ static void gen_st_asi(DisasContext *dc, TCGv src, TCGv addr,
default:
{
TCGv_i32 r_asi = tcg_const_i32(tcg_ctx, da.asi);
TCGv_i32 r_size = tcg_const_i32(tcg_ctx, 1 << (memop & MO_SIZE));
TCGv_i32 r_mop = tcg_const_i32(tcg_ctx, memop & MO_SIZE);
save_state(dc);
#ifdef TARGET_SPARC64
gen_helper_st_asi(tcg_ctx, tcg_ctx->cpu_env, addr, src, r_asi, r_size);
gen_helper_st_asi(tcg_ctx, tcg_ctx->cpu_env, addr, src, r_asi, r_mop);
#else
{
TCGv_i64 t64 = tcg_temp_new_i64(tcg_ctx);
tcg_gen_extu_tl_i64(tcg_ctx, t64, src);
gen_helper_st_asi(tcg_ctx, tcg_ctx->cpu_env, addr, t64, r_asi, r_size);
gen_helper_st_asi(tcg_ctx, tcg_ctx->cpu_env, addr, t64, r_asi, r_mop);
tcg_temp_free_i64(tcg_ctx, t64);
}
#endif
tcg_temp_free_i32(tcg_ctx, r_size);
tcg_temp_free_i32(tcg_ctx, r_mop);
tcg_temp_free_i32(tcg_ctx, r_asi);
/* A write to a TLB register may alter page maps. End the TB. */
@ -2341,20 +2339,18 @@ static void gen_swap_asi(DisasContext *dc, TCGv dst, TCGv src,
default:
{
TCGv_i32 r_asi = tcg_const_i32(tcg_ctx, da.asi);
TCGv_i32 r_size = tcg_const_i32(tcg_ctx, 4);
TCGv_i32 r_sign = tcg_const_i32(tcg_ctx, 0);
TCGv_i32 r_mop = tcg_const_i32(tcg_ctx, MO_UL);
TCGv_i64 s64, t64;
save_state(dc);
t64 = tcg_temp_new_i64(tcg_ctx);
gen_helper_ld_asi(tcg_ctx, t64, tcg_ctx->cpu_env, addr, r_asi, r_size, r_sign);
tcg_temp_free_i32(tcg_ctx, r_sign);
gen_helper_ld_asi(tcg_ctx, t64, tcg_ctx->cpu_env, addr, r_asi, r_mop);
s64 = tcg_temp_new_i64(tcg_ctx);
tcg_gen_extu_tl_i64(tcg_ctx, s64, src);
gen_helper_st_asi(tcg_ctx, tcg_ctx->cpu_env, addr, s64, r_asi, r_size);
gen_helper_st_asi(tcg_ctx, tcg_ctx->cpu_env, addr, s64, r_asi, r_mop);
tcg_temp_free_i64(tcg_ctx, s64);
tcg_temp_free_i32(tcg_ctx, r_size);
tcg_temp_free_i32(tcg_ctx, r_mop);
tcg_temp_free_i32(tcg_ctx, r_asi);
tcg_gen_trunc_i64_tl(tcg_ctx, dst, t64);
@ -2396,19 +2392,17 @@ static void gen_ldstub_asi(DisasContext *dc, TCGv dst, TCGv addr, int insn)
default:
{
TCGv_i32 r_asi = tcg_const_i32(tcg_ctx, da.asi);
TCGv_i32 r_size = tcg_const_i32(tcg_ctx, 1);
TCGv_i32 r_sign = tcg_const_i32(tcg_ctx, 0);
TCGv_i32 r_mop = tcg_const_i32(tcg_ctx, MO_UB);
TCGv_i64 s64, t64;
save_state(dc);
t64 = tcg_temp_new_i64(tcg_ctx);
gen_helper_ld_asi(tcg_ctx, t64, tcg_ctx->cpu_env, addr, r_asi, r_size, r_sign);
tcg_temp_free_i32(tcg_ctx, r_sign);
gen_helper_ld_asi(tcg_ctx, t64, tcg_ctx->cpu_env, addr, r_asi, r_mop);
s64 = tcg_const_i64(tcg_ctx, 0xff);
gen_helper_st_asi(tcg_ctx, tcg_ctx->cpu_env, addr, s64, r_asi, r_size);
gen_helper_st_asi(tcg_ctx, tcg_ctx->cpu_env, addr, s64, r_asi, r_mop);
tcg_temp_free_i64(tcg_ctx, s64);
tcg_temp_free_i32(tcg_ctx, r_size);
tcg_temp_free_i32(tcg_ctx, r_mop);
tcg_temp_free_i32(tcg_ctx, r_asi);
tcg_gen_trunc_i64_tl(tcg_ctx, dst, t64);
@ -2566,15 +2560,15 @@ static void gen_stda_asi(DisasContext *dc, TCGv hi, TCGv addr,
default:
{
TCGv_i32 r_asi = tcg_const_i32(tcg_ctx, da.asi);
TCGv_i32 r_size = tcg_const_i32(tcg_ctx, 8);
TCGv_i32 r_mop = tcg_const_i32(tcg_ctx, MO_Q);
TCGv_i64 t64;
save_state(dc);
t64 = tcg_temp_new_i64(tcg_ctx);
tcg_gen_concat_tl_i64(tcg_ctx, t64, lo, hi);
gen_helper_st_asi(tcg_ctx, tcg_ctx->cpu_env, addr, t64, r_asi, r_size);
tcg_temp_free_i32(tcg_ctx, r_size);
gen_helper_st_asi(tcg_ctx, tcg_ctx->cpu_env, addr, t64, r_asi, r_mop);
tcg_temp_free_i32(tcg_ctx, r_mop);
tcg_temp_free_i32(tcg_ctx, r_asi);
tcg_temp_free_i64(tcg_ctx, t64);
}
@ -2628,13 +2622,11 @@ static void gen_ldda_asi(DisasContext *dc, TCGv addr, int insn, int rd)
default:
{
TCGv_i32 r_asi = tcg_const_i32(tcg_ctx, da.asi);
TCGv_i32 r_size = tcg_const_i32(tcg_ctx, 8);
TCGv_i32 r_sign = tcg_const_i32(tcg_ctx, 0);
TCGv_i32 r_mop = tcg_const_i32(tcg_ctx, MO_Q);
save_state(dc);
gen_helper_ld_asi(tcg_ctx, t64, tcg_ctx->cpu_env, addr, r_asi, r_size, r_sign);
tcg_temp_free_i32(tcg_ctx, r_sign);
tcg_temp_free_i32(tcg_ctx, r_size);
gen_helper_ld_asi(tcg_ctx, t64, tcg_ctx->cpu_env, addr, r_asi, r_mop);
tcg_temp_free_i32(tcg_ctx, r_mop);
tcg_temp_free_i32(tcg_ctx, r_asi);
}
break;
@ -2666,11 +2658,11 @@ static void gen_stda_asi(DisasContext *dc, TCGv hi, TCGv addr,
default:
{
TCGv_i32 r_asi = tcg_const_i32(tcg_ctx, da.asi);
TCGv_i32 r_size = tcg_const_i32(tcg_ctx, 8);
TCGv_i32 r_mop = tcg_const_i32(tcg_ctx, MO_Q);
save_state(dc);
gen_helper_st_asi(tcg_ctx, tcg_ctx->cpu_env, addr, t64, r_asi, r_size);
tcg_temp_free_i32(tcg_ctx, r_size);
gen_helper_st_asi(tcg_ctx, tcg_ctx->cpu_env, addr, t64, r_asi, r_mop);
tcg_temp_free_i32(tcg_ctx, r_mop);
tcg_temp_free_i32(tcg_ctx, r_asi);
}
break;