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target/arm: fix AArch64 virtual address space size
Since QEMU does not support the ARMv8.2-LVA, Large Virtual Address, extension (yet), the VA address space is 48-bits plus a sign bit. User mode can only handle the positive half of the address space, so that makes a limit of 48 bits. (With LVA, it would be 53 and 52 bits respectively.) The incorrectly large address space conflicts with PAuth instructions, which use bits 48-54 and 56-63 for the pointer authentication code. This also conflicts with (as yet unsupported by QEMU) data tagging and with the ARMv8.5-MTE extension. Backports commit f6768aa1b4c6a80448eabd22bb9b4123c709caea from qemu
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@ -2453,7 +2453,7 @@ bool write_cpustate_to_list(ARMCPU *cpu);
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#if defined(TARGET_AARCH64)
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# define TARGET_PHYS_ADDR_SPACE_BITS 48
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# define TARGET_VIRT_ADDR_SPACE_BITS 64
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# define TARGET_VIRT_ADDR_SPACE_BITS 48
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#else
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# define TARGET_PHYS_ADDR_SPACE_BITS 40
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# define TARGET_VIRT_ADDR_SPACE_BITS 32
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