tcg/aarch64: Return false on failure from patch_reloc

This does require an extra two checks within the slow paths
to replace the assert that we're moving.

Backports commit 214bfe83d5a5af70bac2b8d0bd649b018c33c03b from qemu
This commit is contained in:
Richard Henderson 2018-12-18 05:28:44 -05:00 committed by Lioncash
parent fc86fd34ff
commit a22387f919
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GPG key ID: 4E3C3CC1031BA9C7

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@ -78,20 +78,26 @@ static const int tcg_target_call_oarg_regs[1] = {
#define TCG_REG_GUEST_BASE TCG_REG_X28 #define TCG_REG_GUEST_BASE TCG_REG_X28
#endif #endif
static inline void reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target) static inline bool reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
{ {
ptrdiff_t offset = target - code_ptr; ptrdiff_t offset = target - code_ptr;
tcg_debug_assert(offset == sextract64(offset, 0, 26)); if (offset == sextract64(offset, 0, 26)) {
/* read instruction, mask away previous PC_REL26 parameter contents, /* read instruction, mask away previous PC_REL26 parameter contents,
set the proper offset, then write back the instruction. */ set the proper offset, then write back the instruction. */
*code_ptr = deposit32(*code_ptr, 0, 26, offset); *code_ptr = deposit32(*code_ptr, 0, 26, offset);
return true;
}
return false;
} }
static inline void reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target) static inline bool reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
{ {
ptrdiff_t offset = target - code_ptr; ptrdiff_t offset = target - code_ptr;
tcg_debug_assert(offset == sextract64(offset, 0, 19)); if (offset == sextract64(offset, 0, 19)) {
*code_ptr = deposit32(*code_ptr, 5, 19, offset); *code_ptr = deposit32(*code_ptr, 5, 19, offset);
return true;
}
return false;
} }
static inline bool patch_reloc(tcg_insn_unit *code_ptr, int type, static inline bool patch_reloc(tcg_insn_unit *code_ptr, int type,
@ -101,15 +107,12 @@ static inline bool patch_reloc(tcg_insn_unit *code_ptr, int type,
switch (type) { switch (type) {
case R_AARCH64_JUMP26: case R_AARCH64_JUMP26:
case R_AARCH64_CALL26: case R_AARCH64_CALL26:
reloc_pc26(code_ptr, (tcg_insn_unit *)value); return reloc_pc26(code_ptr, (tcg_insn_unit *)value);
break;
case R_AARCH64_CONDBR19: case R_AARCH64_CONDBR19:
reloc_pc19(code_ptr, (tcg_insn_unit *)value); return reloc_pc19(code_ptr, (tcg_insn_unit *)value);
break;
default: default:
tcg_abort(); g_assert_not_reached();
} }
return true;
} }
#define TCG_CT_CONST_AIMM 0x100 #define TCG_CT_CONST_AIMM 0x100
@ -1387,7 +1390,8 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
TCGMemOp opc = get_memop(oi); TCGMemOp opc = get_memop(oi);
TCGMemOp size = opc & MO_SIZE; TCGMemOp size = opc & MO_SIZE;
reloc_pc19(lb->label_ptr[0], s->code_ptr); bool ok = reloc_pc19(lb->label_ptr[0], s->code_ptr);
tcg_debug_assert(ok);
tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_X0, TCG_AREG0); tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_X0, TCG_AREG0);
tcg_out_mov(s, TARGET_LONG_BITS == 64, TCG_REG_X1, lb->addrlo_reg); tcg_out_mov(s, TARGET_LONG_BITS == 64, TCG_REG_X1, lb->addrlo_reg);
@ -1409,7 +1413,8 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
TCGMemOp opc = get_memop(oi); TCGMemOp opc = get_memop(oi);
TCGMemOp size = opc & MO_SIZE; TCGMemOp size = opc & MO_SIZE;
reloc_pc19(lb->label_ptr[0], s->code_ptr); bool ok = reloc_pc19(lb->label_ptr[0], s->code_ptr);
tcg_debug_assert(ok);
tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_X0, TCG_AREG0); tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_X0, TCG_AREG0);
tcg_out_mov(s, TARGET_LONG_BITS == 64, TCG_REG_X1, lb->addrlo_reg); tcg_out_mov(s, TARGET_LONG_BITS == 64, TCG_REG_X1, lb->addrlo_reg);