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tcg: Adjust CODE_GEN_AVG_BLOCK_SIZE
At present, the "average" guestimate of TB size is way too small, leading to many unused entries in the pre-allocated TB array. For a guest with 1GB ram, we're currently allocating 256MB for the array. Survey arm, alpha, aarch64, ppc, sparc, i686, x86_64 guests running on x86_64 and ppc64 hosts and select a new average. The size of the array drops to 81MB with no more flushing than before. Backports commit 126d89e8cdfa3be15d51f76906eaccbcd0023f98 from qemu
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@ -160,13 +160,14 @@ static inline void tlb_flush_by_mmuidx(CPUState *cpu, ...)
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#define CODE_GEN_PHYS_HASH_BITS 15
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#define CODE_GEN_PHYS_HASH_BITS 15
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#define CODE_GEN_PHYS_HASH_SIZE (1 << CODE_GEN_PHYS_HASH_BITS)
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#define CODE_GEN_PHYS_HASH_SIZE (1 << CODE_GEN_PHYS_HASH_BITS)
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/* estimated block size for TB allocation */
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/* Estimated block size for TB allocation. */
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/* XXX: use a per code average code fragment size and modulate it
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/* ??? The following is based on a 2015 survey of x86_64 host output.
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according to the host CPU */
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Better would seem to be some sort of dynamically sized TB array,
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adapting to the block sizes actually being produced. */
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#if defined(CONFIG_SOFTMMU)
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#if defined(CONFIG_SOFTMMU)
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#define CODE_GEN_AVG_BLOCK_SIZE 128
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#define CODE_GEN_AVG_BLOCK_SIZE 400
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#else
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#else
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#define CODE_GEN_AVG_BLOCK_SIZE 64
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#define CODE_GEN_AVG_BLOCK_SIZE 150
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#endif
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#endif
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#if defined(__arm__) || defined(_ARCH_PPC) \
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#if defined(__arm__) || defined(_ARCH_PPC) \
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