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https://github.com/yuzu-emu/unicorn.git
synced 2025-03-23 06:25:12 +00:00
target/arm: Implement ARMv8.2-DotProd
We've already added the helpers with an SVE patch, all that remains is to wire up the aa64 and aa32 translators. Enable the feature within -cpu max for CONFIG_USER_ONLY. Backports commit 26c470a7bb4233454137de1062341ad48947f252 from qemu
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@ -1551,6 +1551,7 @@ static void arm_max_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
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set_feature(&cpu->env, ARM_FEATURE_CRC);
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set_feature(&cpu->env, ARM_FEATURE_V8_RDM);
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set_feature(&cpu->env, ARM_FEATURE_V8_DOTPROD);
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set_feature(&cpu->env, ARM_FEATURE_V8_FCMA);
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}
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#endif
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@ -1420,6 +1420,7 @@ enum arm_features {
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ARM_FEATURE_V8_SM4, /* implements SM4 part of v8 Crypto Extensions */
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ARM_FEATURE_V8_ATOMICS, /* ARMv8.1-Atomics feature */
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ARM_FEATURE_V8_RDM, /* implements v8.1 simd round multiply */
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ARM_FEATURE_V8_DOTPROD, /* implements v8.2 simd dot product */
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ARM_FEATURE_V8_FP16, /* implements v8.2 half-precision float */
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ARM_FEATURE_V8_FCMA, /* has complex number part of v8.3 extensions. */
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ARM_FEATURE_M_MAIN, /* M profile Main Extension */
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@ -223,6 +223,7 @@ static void aarch64_max_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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set_feature(&cpu->env, ARM_FEATURE_CRC);
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set_feature(&cpu->env, ARM_FEATURE_V8_ATOMICS);
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set_feature(&cpu->env, ARM_FEATURE_V8_RDM);
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set_feature(&cpu->env, ARM_FEATURE_V8_DOTPROD);
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set_feature(&cpu->env, ARM_FEATURE_V8_FP16);
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set_feature(&cpu->env, ARM_FEATURE_V8_FCMA);
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set_feature(&cpu->env, ARM_FEATURE_SVE);
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@ -684,6 +684,18 @@ static void gen_gvec_op3(DisasContext *s, bool is_q, int rd,
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vec_full_reg_size(s), gvec_op);
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}
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/* Expand a 3-operand operation using an out-of-line helper. */
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static void gen_gvec_op3_ool(DisasContext *s, bool is_q, int rd,
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int rn, int rm, int data, gen_helper_gvec_3 *fn)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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tcg_gen_gvec_3_ool(tcg_ctx, vec_full_reg_offset(s, rd),
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vec_full_reg_offset(s, rn),
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vec_full_reg_offset(s, rm),
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is_q ? 16 : 8, vec_full_reg_size(s), data, fn);
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}
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/* Expand a 3-operand + env pointer operation using
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* an out-of-line helper.
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*/
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@ -11487,6 +11499,14 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
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}
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feature = ARM_FEATURE_V8_RDM;
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break;
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case 0x02: /* SDOT (vector) */
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case 0x12: /* UDOT (vector) */
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if (size != MO_32) {
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unallocated_encoding(s);
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return;
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}
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feature = ARM_FEATURE_V8_DOTPROD;
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break;
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case 0x8: /* FCMLA, #0 */
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case 0x9: /* FCMLA, #90 */
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case 0xa: /* FCMLA, #180 */
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@ -11540,6 +11560,11 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
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}
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return;
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case 0x2: /* SDOT / UDOT */
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gen_gvec_op3_ool(s, is_q, rd, rn, rm, 0,
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u ? gen_helper_gvec_udot_b : gen_helper_gvec_sdot_b);
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return;
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case 0x8: /* FCMLA, #0 */
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case 0x9: /* FCMLA, #90 */
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case 0xa: /* FCMLA, #180 */
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@ -12726,6 +12751,13 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
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return;
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}
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break;
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case 0x0e: /* SDOT */
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case 0x1e: /* UDOT */
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if (size != MO_32 || !arm_dc_feature(s, ARM_FEATURE_V8_DOTPROD)) {
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unallocated_encoding(s);
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return;
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}
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break;
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case 0x11: /* FCMLA #0 */
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case 0x13: /* FCMLA #90 */
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case 0x15: /* FCMLA #180 */
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@ -12823,6 +12855,12 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
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}
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switch (16 * u + opcode) {
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case 0x0e: /* SDOT */
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case 0x1e: /* UDOT */
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gen_gvec_op3_ool(s, is_q, rd, rn, rm, index,
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u ? gen_helper_gvec_udot_idx_b
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: gen_helper_gvec_sdot_idx_b);
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return;
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case 0x11: /* FCMLA #0 */
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case 0x13: /* FCMLA #90 */
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case 0x15: /* FCMLA #180 */
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@ -7914,9 +7914,10 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
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static int disas_neon_insn_3same_ext(DisasContext *s, uint32_t insn)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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gen_helper_gvec_3_ptr *fn_gvec_ptr;
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int rd, rn, rm, rot, size, opr_sz;
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TCGv_ptr fpst;
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gen_helper_gvec_3 *fn_gvec = NULL;
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gen_helper_gvec_3_ptr *fn_gvec_ptr = NULL;
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int rd, rn, rm, opr_sz;
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int data = 0;
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bool q;
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q = extract32(insn, 6, 1);
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@ -7929,8 +7930,8 @@ static int disas_neon_insn_3same_ext(DisasContext *s, uint32_t insn)
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if ((insn & 0xfe200f10) == 0xfc200800) {
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/* VCMLA -- 1111 110R R.1S .... .... 1000 ...0 .... */
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size = extract32(insn, 20, 1);
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rot = extract32(insn, 23, 2);
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int size = extract32(insn, 20, 1);
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data = extract32(insn, 23, 2); /* rot */
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if (!arm_dc_feature(s, ARM_FEATURE_V8_FCMA)
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|| (!size && !arm_dc_feature(s, ARM_FEATURE_V8_FP16))) {
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return 1;
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@ -7938,13 +7939,20 @@ static int disas_neon_insn_3same_ext(DisasContext *s, uint32_t insn)
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fn_gvec_ptr = size ? gen_helper_gvec_fcmlas : gen_helper_gvec_fcmlah;
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} else if ((insn & 0xfea00f10) == 0xfc800800) {
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/* VCADD -- 1111 110R 1.0S .... .... 1000 ...0 .... */
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size = extract32(insn, 20, 1);
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rot = extract32(insn, 24, 1);
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int size = extract32(insn, 20, 1);
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data = extract32(insn, 24, 1); /* rot */
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if (!arm_dc_feature(s, ARM_FEATURE_V8_FCMA)
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|| (!size && !arm_dc_feature(s, ARM_FEATURE_V8_FP16))) {
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return 1;
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}
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fn_gvec_ptr = size ? gen_helper_gvec_fcadds : gen_helper_gvec_fcaddh;
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} else if ((insn & 0xfeb00f00) == 0xfc200d00) {
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/* V[US]DOT -- 1111 1100 0.10 .... .... 1101 .Q.U .... */
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bool u = extract32(insn, 4, 1);
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if (!arm_dc_feature(s, ARM_FEATURE_V8_DOTPROD)) {
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return 1;
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}
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fn_gvec = u ? gen_helper_gvec_udot_b : gen_helper_gvec_sdot_b;
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} else {
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return 1;
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}
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@ -7959,12 +7967,19 @@ static int disas_neon_insn_3same_ext(DisasContext *s, uint32_t insn)
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}
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opr_sz = (1 + q) * 8;
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fpst = get_fpstatus_ptr(s, 1);
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tcg_gen_gvec_3_ptr(tcg_ctx, vfp_reg_offset(1, rd),
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vfp_reg_offset(1, rn),
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vfp_reg_offset(1, rm), fpst,
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opr_sz, opr_sz, rot, fn_gvec_ptr);
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tcg_temp_free_ptr(tcg_ctx, fpst);
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if (fn_gvec_ptr) {
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TCGv_ptr fpst = get_fpstatus_ptr(s, 1);
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tcg_gen_gvec_3_ptr(tcg_ctx, vfp_reg_offset(1, rd),
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vfp_reg_offset(1, rn),
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vfp_reg_offset(1, rm), fpst,
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opr_sz, opr_sz, data, fn_gvec_ptr);
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tcg_temp_free_ptr(tcg_ctx, fpst);
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} else {
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tcg_gen_gvec_3_ool(tcg_ctx, vfp_reg_offset(1, rd),
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vfp_reg_offset(1, rn),
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vfp_reg_offset(1, rm),
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opr_sz, opr_sz, data, fn_gvec);
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}
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return 0;
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}
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@ -7979,9 +7994,9 @@ static int disas_neon_insn_3same_ext(DisasContext *s, uint32_t insn)
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static int disas_neon_insn_2reg_scalar_ext(DisasContext *s, uint32_t insn)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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gen_helper_gvec_3_ptr *fn_gvec_ptr;
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gen_helper_gvec_3 *fn_gvec = NULL;
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gen_helper_gvec_3_ptr *fn_gvec_ptr = NULL;
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int rd, rn, rm, opr_sz, data;
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TCGv_ptr fpst;
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bool q;
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q = extract32(insn, 6, 1);
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@ -8015,6 +8030,16 @@ static int disas_neon_insn_2reg_scalar_ext(DisasContext *s, uint32_t insn)
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data = (index << 2) | rot;
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fn_gvec_ptr = (size ? gen_helper_gvec_fcmlas_idx
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: gen_helper_gvec_fcmlah_idx);
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} else if ((insn & 0xffb00f00) == 0xfe200d00) {
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/* V[US]DOT -- 1111 1110 0.10 .... .... 1101 .Q.U .... */
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int u = extract32(insn, 4, 1);
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if (!arm_dc_feature(s, ARM_FEATURE_V8_DOTPROD)) {
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return 1;
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}
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fn_gvec = u ? gen_helper_gvec_udot_idx_b : gen_helper_gvec_sdot_idx_b;
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/* rm is just Vm, and index is M. */
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data = extract32(insn, 5, 1); /* index */
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rm = extract32(insn, 0, 4);
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} else {
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return 1;
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}
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@ -8029,12 +8054,19 @@ static int disas_neon_insn_2reg_scalar_ext(DisasContext *s, uint32_t insn)
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}
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opr_sz = (1 + q) * 8;
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fpst = get_fpstatus_ptr(s, 1);
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tcg_gen_gvec_3_ptr(tcg_ctx, vfp_reg_offset(1, rd),
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vfp_reg_offset(1, rn),
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vfp_reg_offset(1, rm), fpst,
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opr_sz, opr_sz, data, fn_gvec_ptr);
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tcg_temp_free_ptr(tcg_ctx, fpst);
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if (fn_gvec_ptr) {
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TCGv_ptr fpst = get_fpstatus_ptr(s, 1);
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tcg_gen_gvec_3_ptr(tcg_ctx, vfp_reg_offset(1, rd),
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vfp_reg_offset(1, rn),
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vfp_reg_offset(1, rm), fpst,
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opr_sz, opr_sz, data, fn_gvec_ptr);
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tcg_temp_free_ptr(tcg_ctx, fpst);
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} else {
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tcg_gen_gvec_3_ool(tcg_ctx, vfp_reg_offset(1, rd),
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vfp_reg_offset(1, rn),
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vfp_reg_offset(1, rm),
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opr_sz, opr_sz, data, fn_gvec);
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}
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return 0;
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}
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