target-arm: Enable EL3 for Cortex-A53 and Cortex-A57

Enable EL3 support for our Cortex-A53 and Cortex-A57 CPU models.
We have enough implemented now to be able to run real world code
at least to some extent (I can boot ARM Trusted Firmware to the
point where it pulls in OP-TEE and then falls over because it
doesn't have a UEFI image it can chain to).

Backports commit 3ad901bc2b98f5539af9a7d4aef140a6d8fa6442 from qemu
This commit is contained in:
Peter Maydell 2018-02-20 11:31:40 -05:00 committed by Lioncash
parent aecf7b05dc
commit a3ff1c4a65
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7

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@ -91,6 +91,7 @@ static void aarch64_a57_initfn(struct uc_struct *uc, Object *obj, void *opaque)
set_feature(&cpu->env, ARM_FEATURE_V8_SHA256); set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
set_feature(&cpu->env, ARM_FEATURE_V8_PMULL); set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
set_feature(&cpu->env, ARM_FEATURE_CRC); set_feature(&cpu->env, ARM_FEATURE_CRC);
set_feature(&cpu->env, ARM_FEATURE_EL3);
set_feature(&cpu->env, ARM_FEATURE_PMU); set_feature(&cpu->env, ARM_FEATURE_PMU);
cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A57; cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A57;
cpu->midr = 0x411fd070; cpu->midr = 0x411fd070;
@ -144,6 +145,7 @@ static void aarch64_a53_initfn(struct uc_struct *uc, Object *obj, void *opaque)
set_feature(&cpu->env, ARM_FEATURE_V8_SHA256); set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
set_feature(&cpu->env, ARM_FEATURE_V8_PMULL); set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
set_feature(&cpu->env, ARM_FEATURE_CRC); set_feature(&cpu->env, ARM_FEATURE_CRC);
set_feature(&cpu->env, ARM_FEATURE_EL3);
cpu->midr = 0x410fd034; cpu->midr = 0x410fd034;
cpu->revidr = 0x00000000; cpu->revidr = 0x00000000;
cpu->reset_fpsid = 0x41034070; cpu->reset_fpsid = 0x41034070;