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target/arm: fix LORID_EL1 access check

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Secure mode is not exempted from checking SCR_EL3.TLOR, and in the
future HCR_EL2.TLOR when S-EL2 is enabled.

Backports 9bd268bae5c4760870522292fb1d46e7da7e372a
This commit is contained in:
Rémi Denis-Courmont 2021-03-02 13:06:48 -05:00 committed by Lioncash
parent df4413edc7
commit a4053565d6
1 changed files with 5 additions and 14 deletions
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19
qemu/target/arm/helper.c
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@ -6343,9 +6343,10 @@ static uint64_t id_aa64pfr0_read(CPUARMState *env, const ARMCPRegInfo *ri)
#endif #endif
/* Shared logic between LORID and the rest of the LOR* registers. /* Shared logic between LORID and the rest of the LOR* registers.
* Secure state has already been delt with. * Secure state exclusion has already been dealt with.
*/ */
static CPAccessResult access_lor_ns(CPUARMState *env) static CPAccessResult access_lor_ns(CPUARMState *env,
const ARMCPRegInfo *ri, bool isread)
{ {
int el = arm_current_el(env); int el = arm_current_el(env);
@ -6358,16 +6359,6 @@ static CPAccessResult access_lor_ns(CPUARMState *env)
return CP_ACCESS_OK; return CP_ACCESS_OK;
} }
static CPAccessResult access_lorid(CPUARMState *env, const ARMCPRegInfo *ri,
bool isread)
{
if (arm_is_secure_below_el3(env)) {
/* Access ok in secure mode. */
return CP_ACCESS_OK;
}
return access_lor_ns(env);
}
static CPAccessResult access_lor_other(CPUARMState *env, static CPAccessResult access_lor_other(CPUARMState *env,
const ARMCPRegInfo *ri, bool isread) const ARMCPRegInfo *ri, bool isread)
{ {
@ -6375,7 +6366,7 @@ static CPAccessResult access_lor_other(CPUARMState *env,
/* Access denied in secure mode. */ /* Access denied in secure mode. */
return CP_ACCESS_TRAP; return CP_ACCESS_TRAP;
} }
return access_lor_ns(env); return access_lor_ns(env, ri, isread);
} }
/* /*
@ -6402,7 +6393,7 @@ static const ARMCPRegInfo lor_reginfo[] = {
.type = ARM_CP_CONST, .resetvalue = 0 }, .type = ARM_CP_CONST, .resetvalue = 0 },
{ .name = "LORID_EL1", .state = ARM_CP_STATE_AA64, { .name = "LORID_EL1", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 0, .crn = 10, .crm = 4, .opc2 = 7, .opc0 = 3, .opc1 = 0, .crn = 10, .crm = 4, .opc2 = 7,
.access = PL1_R, .accessfn = access_lorid, .access = PL1_R, .accessfn = access_lor_ns,
.type = ARM_CP_CONST, .resetvalue = 0 }, .type = ARM_CP_CONST, .resetvalue = 0 },
REGINFO_SENTINEL REGINFO_SENTINEL
}; };