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target-*: Unconditionally emit tcg_gen_insn_start

Browse source 
While we're at it, emit the opcode adjacent to where we currently
record data for search_pc. This puts gen_io_start et al on the
"correct" side of the marker.

Backports commit 667b8e29c5b1d8c5b4e6ad5f780ca60914eb6e96 from qemu
This commit is contained in:
Richard Henderson 2018-02-11 12:40:56 -05:00 committed by Lioncash
parent b3f9ff667b
commit a64d0ff657
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
6 changed files with 22 additions and 29 deletions
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5
qemu/target-arm/translate-a64.c
View file

@ -11279,15 +11279,12 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
tcg_ctx->gen_opc_instr_start[lj] = 1;
//tcg_ctx->gen_opc_icount[lj] = num_insns;
}
tcg_gen_insn_start(tcg_ctx, dc->pc);
//if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) {
// gen_io_start();
//}
if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) {
tcg_gen_insn_start(tcg_ctx, dc->pc);
}
if (dc->ss_active && !dc->pstate_ss) {
/* Singlestep state is Active-pending.
* If we're in this state at the start of a TB then either

8
qemu/target-arm/translate.c
View file

@ -11477,13 +11477,11 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
tcg_ctx->gen_opc_instr_start[lj] = 1;
//tcg_ctx->gen_opc_icount[lj] = num_insns;
}
tcg_gen_insn_start(tcg_ctx, dc->pc);
//if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
//if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) {
// gen_io_start();
if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) {
tcg_gen_insn_start(tcg_ctx, dc->pc);
}
//}
if (dc->ss_active && !dc->pstate_ss) {
/* Singlestep state is Active-pending.

9
qemu/target-i386/translate.c
View file

@ -5018,10 +5018,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
return s->pc;
}
if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) {
tcg_gen_insn_start(tcg_ctx, pc_start);
}
// Unicorn: trace this instruction on request
if (HOOK_EXISTS_BOUNDED(env->uc, UC_HOOK_CODE, pc_start)) {
if (s->last_cc_op != s->cc_op) {
@ -8733,8 +8729,11 @@ static inline void gen_intermediate_code_internal(uint8_t *gen_opc_cc_op,
tcg_ctx->gen_opc_instr_start[lj] = 1;
// tcg_ctx->gen_opc_icount[lj] = num_insns;
}
//if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
tcg_gen_insn_start(tcg_ctx, pc_start);
//if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) {
// gen_io_start();
//}
// Unicorn: save current PC address to sync EIP
dc->prev_pc = pc_ptr;

10
qemu/target-m68k/translate.c
View file

@ -3035,10 +3035,6 @@ static void disas_m68k_insn(CPUM68KState * env, DisasContext *s)
TCGContext *tcg_ctx = s->uc->tcg_ctx;
uint16_t insn;
if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) {
tcg_gen_insn_start(tcg_ctx, s->pc);
}
// Unicorn: end address tells us to stop emulation
if (s->pc == s->uc->addr_end) {
gen_exception(s, s->pc, EXCP_HLT);
@ -3140,8 +3136,12 @@ gen_intermediate_code_internal(M68kCPU *cpu, TranslationBlock *tb,
tcg_ctx->gen_opc_instr_start[lj] = 1;
//tcg_ctx.gen_opc_icount[lj] = num_insns;
}
//if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
tcg_gen_insn_start(tcg_ctx, s->pc);
//if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) {
// gen_io_start();
//}
dc->insn_pc = dc->pc;
disas_m68k_insn(env, dc);
num_insns++;

9
qemu/target-mips/translate.c
View file

@ -18547,10 +18547,6 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx, bool *insn_need_pa
hook_insn(env, ctx, insn_need_patch, insn_patch_offset, 1);
}
if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) {
tcg_gen_insn_start(tcg_ctx, ctx->pc);
}
op = MASK_OP_MAJOR(ctx->opcode);
rs = (ctx->opcode >> 21) & 0x1f;
rt = (ctx->opcode >> 16) & 0x1f;
@ -19259,8 +19255,11 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb,
tcg_ctx->gen_opc_instr_start[lj] = 1;
tcg_ctx->gen_opc_icount[lj] = num_insns;
}
//if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
tcg_gen_insn_start(tcg_ctx, ctx->pc);
//if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) {
// gen_io_start();
//}
// Unicorn: end address tells us to stop emulation
if (ctx.pc == ctx.uc->addr_end) {

10
qemu/target-sparc/translate.c
View file

@ -2622,10 +2622,6 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
TCGv_i64 cpu_src1_64, cpu_src2_64, cpu_dst_64;
target_long simm;
if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) {
tcg_gen_insn_start(tcg_ctx, dc->pc);
}
// Unicorn: trace this instruction on request
if (hook_insn && HOOK_EXISTS_BOUNDED(dc->uc, UC_HOOK_CODE, dc->pc)) {
gen_uc_tracecode(tcg_ctx, 4, UC_HOOK_CODE_IDX, dc->uc, dc->pc);
@ -5446,8 +5442,12 @@ static inline void gen_intermediate_code_internal(SPARCCPU *cpu,
tcg_ctx->gen_opc_icount[lj] = num_insns;
}
}
//if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
tcg_gen_insn_start(tcg_ctx, dc->pc);
//if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) {
// gen_io_start();
//}
// Unicorn: end address tells us to stop emulation
if (dc->pc == dc->uc->addr_end) {
save_state(dc);