yuzu/unicorn
1
0
Fork 0
mirror of https://github.com/yuzu-emu/unicorn.git synced 2024-12-23 04:15:39 +00:00
Code Issues Packages Projects Releases Wiki Activity

target-sparc: Split cpu_put_psr into side-effect and no-side-effect parts

Browse source 
For inbound migration we really want to be able to set the PSR without
having any side effects, but cpu_put_psr() calls cpu_check_irqs() which
might try to deliver CPU interrupts. Split cpu_put_psr() into the
no-side-effect and side-effect parts.

This includes reordering the cpu_check_irqs() to the end of cpu_put_psr(),
because that function may actually end up calling cpu_interrupt(), which
does not seem like a good thing to happen in the middle of updating the PSR.

Backports commit 4552a09dd4055c806b7df8c595dc0fb8951834be from qemu
This commit is contained in:
Peter Maydell 2018-02-17 21:03:12 -05:00 committed by Lioncash
parent 3dab621825
commit a734ef8156
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
5 changed files with 18 additions and 7 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
qemu/header_gen.py
View file

@ -4179,6 +4179,7 @@ sparc_symbols = (
'cpu_set_cwp',
'cpu_get_psr',
'cpu_put_psr',
'cpu_put_psr_raw',
'cpu_cwp_inc',
'cpu_cwp_dec',
'helper_save',

1
qemu/sparc.h
View file

@ -3210,6 +3210,7 @@
#define cpu_set_cwp cpu_set_cwp_sparc
#define cpu_get_psr cpu_get_psr_sparc
#define cpu_put_psr cpu_put_psr_sparc
#define cpu_put_psr_raw cpu_put_psr_raw_sparc
#define cpu_cwp_inc cpu_cwp_inc_sparc
#define cpu_cwp_dec cpu_cwp_dec_sparc
#define helper_save helper_save_sparc

1
qemu/sparc64.h
View file

@ -3210,6 +3210,7 @@
#define cpu_set_cwp cpu_set_cwp_sparc64
#define cpu_get_psr cpu_get_psr_sparc64
#define cpu_put_psr cpu_put_psr_sparc64
#define cpu_put_psr_raw cpu_put_psr_raw_sparc64
#define cpu_cwp_inc cpu_cwp_inc_sparc64
#define cpu_cwp_dec cpu_cwp_dec_sparc64
#define helper_save helper_save_sparc64

1
qemu/target-sparc/cpu.h
View file

@ -542,6 +542,7 @@ int cpu_sparc_exec(struct uc_struct *uc, CPUState *cpu);
/* win_helper.c */
target_ulong cpu_get_psr(CPUSPARCState *env1);
void cpu_put_psr(CPUSPARCState *env1, target_ulong val);
void cpu_put_psr_raw(CPUSPARCState *env1, target_ulong val);
#ifdef TARGET_SPARC64
target_ulong cpu_get_ccr(CPUSPARCState *env1);
void cpu_put_ccr(CPUSPARCState *env1, target_ulong val);

21
qemu/target-sparc/win_helper.c
View file

@ -63,23 +63,30 @@ target_ulong cpu_get_psr(CPUSPARCState *env)
#endif
}
void cpu_put_psr(CPUSPARCState *env, target_ulong val)
void cpu_put_psr_raw(CPUSPARCState *env, target_ulong val)
{
env->psr = val & PSR_ICC;
#if !defined(TARGET_SPARC64)
env->psref = (val & PSR_EF) ? 1 : 0;
env->psrpil = (val & PSR_PIL) >> 8;
#endif
#if ((!defined(TARGET_SPARC64)) && !defined(CONFIG_USER_ONLY))
//cpu_check_irqs(env);
#endif
#if !defined(TARGET_SPARC64)
env->psrs = (val & PSR_S) ? 1 : 0;
env->psrps = (val & PSR_PS) ? 1 : 0;
env->psret = (val & PSR_ET) ? 1 : 0;
cpu_set_cwp(env, val & PSR_CWP);
#endif
env->cc_op = CC_OP_FLAGS;
#if !defined(TARGET_SPARC64)
cpu_set_cwp(env, val & PSR_CWP);
#endif
}
void cpu_put_psr(CPUSPARCState *env, target_ulong val)
{
cpu_put_psr_raw(env, val);
#if ((!defined(TARGET_SPARC64)) && !defined(CONFIG_USER_ONLY))
// Unicorn: commented out
//cpu_check_irqs(env);
#endif
}
int cpu_cwp_inc(CPUSPARCState *env, int cwp)