Use DEFINE_MACHINE() to register all machines

Convert all machines to use DEFINE_MACHINE() instead of QEMUMachine
automatically using a script.

Backports commit e264d29de28c5b0be3d063307ce9fb613b427cc3 from qemu

qemu/aarch64.h

@@ -2962,7 +2962,7 @@
 #define token_is_operator token_is_operator_aarch64
 #define tokens_append_from_iter tokens_append_from_iter_aarch64
 #define tosa_init tosa_init_aarch64
-#define tosa_machine_init tosa_machine_init_aarch64
+#define tosa_machine_init_register_types tosa_machine_init_register_types_aarch64
 #define translator_loop translator_loop_aarch64
 #define translator_loop_temp_check translator_loop_temp_check_aarch64
 #define tswap32 tswap32_aarch64

qemu/aarch64eb.h

@@ -2962,7 +2962,7 @@
 #define token_is_operator token_is_operator_aarch64eb
 #define tokens_append_from_iter tokens_append_from_iter_aarch64eb
 #define tosa_init tosa_init_aarch64eb
-#define tosa_machine_init tosa_machine_init_aarch64eb
+#define tosa_machine_init_register_types tosa_machine_init_register_types_aarch64eb
 #define translator_loop translator_loop_aarch64eb
 #define translator_loop_temp_check translator_loop_temp_check_aarch64eb
 #define tswap32 tswap32_aarch64eb

qemu/arm.h

@@ -2962,7 +2962,7 @@
 #define token_is_operator token_is_operator_arm
 #define tokens_append_from_iter tokens_append_from_iter_arm
 #define tosa_init tosa_init_arm
-#define tosa_machine_init tosa_machine_init_arm
+#define tosa_machine_init_register_types tosa_machine_init_register_types_arm
 #define translator_loop translator_loop_arm
 #define translator_loop_temp_check translator_loop_temp_check_arm
 #define tswap32 tswap32_arm

qemu/armeb.h

@@ -2962,7 +2962,7 @@
 #define token_is_operator token_is_operator_armeb
 #define tokens_append_from_iter tokens_append_from_iter_armeb
 #define tosa_init tosa_init_armeb
-#define tosa_machine_init tosa_machine_init_armeb
+#define tosa_machine_init_register_types tosa_machine_init_register_types_armeb
 #define translator_loop translator_loop_armeb
 #define translator_loop_temp_check translator_loop_temp_check_armeb
 #define tswap32 tswap32_armeb

qemu/header_gen.py

@@ -2968,7 +2968,7 @@ symbols = (
     'token_is_operator',
     'tokens_append_from_iter',
     'tosa_init',
-    'tosa_machine_init',
+    'tosa_machine_init_register_types',
     'translator_loop',
     'translator_loop_temp_check',
     'tswap32',
@@ -4097,7 +4097,7 @@ mips_symbols = (
     'mips_cpu_unassigned_access',
     'mips_defs',
     'mips_defs_number',
-    'mips_machine_init',
+    'mips_machine_init_register_types',
     'mips_reg_read',
     'mips_reg_reset',
     'mips_reg_write',

qemu/hw/arm/tosa.c

@@ -30,13 +30,11 @@ static int tosa_init(struct uc_struct *uc, MachineState *machine)
     return 0;
 }
 
-void tosa_machine_init(struct uc_struct *uc)
+static void tosa_machine_init(struct uc_struct *uc, MachineClass *mc)
 {
-    static QEMUMachine tosapda_machine = { 0 };
+    mc->init = tosa_init;
-    tosapda_machine.name = "tosa",
+    mc->is_default = 1;
-    tosapda_machine.init = tosa_init,
+    mc->arch = UC_ARCH_ARM;
-    tosapda_machine.is_default = 1,
-    tosapda_machine.arch = UC_ARCH_ARM,
-
-    qemu_register_machine(uc, &tosapda_machine, TYPE_MACHINE, NULL);
 }
+
+DEFINE_MACHINE("tosa", tosa_machine_init)

qemu/hw/m68k/dummy_m68k.c

@@ -38,14 +38,11 @@ static int dummy_m68k_init(struct uc_struct *uc, MachineState *machine)
     return 0;
 }
 
-void dummy_m68k_machine_init(struct uc_struct *uc)
+static void dummy_m68k_machine_init(struct uc_struct *uc, MachineClass *mc)
 {
-    static QEMUMachine dummy_m68k_machine = { 0 };
+    mc->init = dummy_m68k_init;
-    dummy_m68k_machine.name = "dummy",
+    mc->is_default = 1;
-    dummy_m68k_machine.init = dummy_m68k_init,
+    mc->arch = UC_ARCH_M68K;
-    dummy_m68k_machine.is_default = 1,
-    dummy_m68k_machine.arch = UC_ARCH_M68K,
-
-    //printf(">>> dummy_m68k_machine_init\n");
-    qemu_register_machine(uc, &dummy_m68k_machine, TYPE_MACHINE, NULL);
 }
+
+DEFINE_MACHINE("dummy", dummy_m68k_machine_init)

qemu/hw/mips/mips_r4k.c

@@ -45,17 +45,11 @@ static int mips_r4k_init(struct uc_struct *uc, MachineState *machine)
     return 0;
 }
 
-void mips_machine_init(struct uc_struct *uc)
+static void mips_machine_init(struct uc_struct *uc, MachineClass *mc)
 {
-    static QEMUMachine mips_machine = {
+    mc->init = mips_r4k_init;
-        NULL,
+    mc->is_default = 1;
-        "mips",
+    mc->arch = UC_ARCH_MIPS;
-        mips_r4k_init,
-        NULL,
-        0,
-        1,
-        UC_ARCH_MIPS,
-    };
-
-    qemu_register_machine(uc, &mips_machine, TYPE_MACHINE, NULL);
 }
+
+DEFINE_MACHINE("mips", mips_machine_init)

qemu/hw/sparc/leon3.c

@@ -36,7 +36,6 @@
 #include "hw/boards.h"
 #include "exec/address-spaces.h"
 
-
 static int leon3_generic_hw_init(struct uc_struct *uc, MachineState *machine)
 {
     const char *cpu_model = machine->cpu_model;
@@ -59,18 +58,11 @@ static int leon3_generic_hw_init(struct uc_struct *uc, MachineState *machine)
     return 0;
 }
 
-void leon3_machine_init(struct uc_struct *uc)
+static void leon3_generic_machine_init(struct uc_struct *uc, MachineClass *mc)
 {
-    static QEMUMachine leon3_generic_machine = {
+    mc->init = leon3_generic_hw_init;
-        NULL,
+    mc->is_default = 1;
-        "leon3_generic",
+    mc->arch = UC_ARCH_SPARC;
-        leon3_generic_hw_init,
-        NULL,
-        0,
-        1,
-        UC_ARCH_SPARC,
-    };
-
-    //printf(">>> leon3_machine_init\n");
-    qemu_register_machine(uc, &leon3_generic_machine, TYPE_MACHINE, NULL);
 }
+
+DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init)

qemu/hw/sparc64/sun4u.c

@@ -33,7 +33,6 @@
 #include "exec/address-spaces.h"
 #include "qemu/cutils.h"
 
-
 /* Sun4u hardware initialisation */
 static int sun4u_init(struct uc_struct *uc, MachineState *machine)
 {
@@ -52,17 +51,12 @@ static int sun4u_init(struct uc_struct *uc, MachineState *machine)
     return 0;
 }
 
-void sun4u_machine_init(struct uc_struct *uc)
+static void sun4u_machine_init(struct uc_struct *uc, MachineClass *mc)
 {
-    static QEMUMachine sun4u_machine = {
+    mc->init = sun4u_init;
-        NULL,
+    mc->max_cpus = 1; /* XXX for now */
-        "sun4u",
+    mc->is_default = 1;
-        sun4u_init,
+    mc->arch = UC_ARCH_SPARC;
-        NULL,
-        1, // XXX for now
-        1,
-        UC_ARCH_SPARC,
-    };
-
-    qemu_register_machine(uc, &sun4u_machine, TYPE_MACHINE, NULL);
 }
+
+DEFINE_MACHINE("sun4u", sun4u_machine_init)

qemu/include/hw/arm/arm.h

@@ -14,7 +14,7 @@
 #include "exec/memory.h"
 #include "target/arm/cpu-qom.h"
 
-void tosa_machine_init(struct uc_struct *uc);
+void tosa_machine_init_register_types(struct uc_struct *uc);
 void machvirt_machine_init(struct uc_struct *uc);   // ARM64
 
 void arm_cpu_register_types(void *opaque);

qemu/include/hw/boards.h

@@ -133,7 +133,7 @@ struct MachineState {
     static void machine_initfn##_class_init(struct uc_struct *uc, ObjectClass *oc, void *data) \
     { \
         MachineClass *mc = MACHINE_CLASS(uc, oc); \
-        machine_initfn(mc); \
+        machine_initfn(uc, mc); \
     } \
     static const TypeInfo machine_initfn##_typeinfo = { \
         MACHINE_TYPE_NAME(namestr), \

qemu/include/hw/m68k/m68k.h

@@ -3,7 +3,7 @@
 
 #include "uc_priv.h"
 
-void dummy_m68k_machine_init(struct uc_struct *uc);
+void dummy_m68k_machine_init_register_types(struct uc_struct *uc);
 
 void m68k_cpu_register_types(void *opaque);
 

qemu/include/hw/mips/mips.h

@@ -1,7 +1,7 @@
 #ifndef HW_MIPS_H
 #define HW_MIPS_H
 
-void mips_machine_init(struct uc_struct *uc);
+void mips_machine_init_register_types(struct uc_struct *uc);
 void mips_cpu_register_types(void *opaque);
 
 #endif

qemu/include/hw/sparc/sparc.h

@@ -2,7 +2,7 @@
 #define HW_SPARC_H
 
 void sparc_cpu_register_types(void *opaque);
-void leon3_machine_init(struct uc_struct *uc);
+void leon3_generic_machine_init_register_types(struct uc_struct *uc);
-void sun4u_machine_init(struct uc_struct *uc);
+void sun4u_machine_init_register_types(struct uc_struct *uc);
 
 #endif

qemu/m68k.h

@@ -2962,7 +2962,7 @@
 #define token_is_operator token_is_operator_m68k
 #define tokens_append_from_iter tokens_append_from_iter_m68k
 #define tosa_init tosa_init_m68k
-#define tosa_machine_init tosa_machine_init_m68k
+#define tosa_machine_init_register_types tosa_machine_init_register_types_m68k
 #define translator_loop translator_loop_m68k
 #define translator_loop_temp_check translator_loop_temp_check_m68k
 #define tswap32 tswap32_m68k

qemu/mips.h

@@ -2962,7 +2962,7 @@
 #define token_is_operator token_is_operator_mips
 #define tokens_append_from_iter tokens_append_from_iter_mips
 #define tosa_init tosa_init_mips
-#define tosa_machine_init tosa_machine_init_mips
+#define tosa_machine_init_register_types tosa_machine_init_register_types_mips
 #define translator_loop translator_loop_mips
 #define translator_loop_temp_check translator_loop_temp_check_mips
 #define tswap32 tswap32_mips
@@ -3998,7 +3998,7 @@
 #define mips_cpu_unassigned_access mips_cpu_unassigned_access_mips
 #define mips_defs mips_defs_mips
 #define mips_defs_number mips_defs_number_mips
-#define mips_machine_init mips_machine_init_mips
+#define mips_machine_init_register_types mips_machine_init_register_types_mips
 #define mips_reg_read mips_reg_read_mips
 #define mips_reg_reset mips_reg_reset_mips
 #define mips_reg_write mips_reg_write_mips

qemu/mips64.h

@@ -2962,7 +2962,7 @@
 #define token_is_operator token_is_operator_mips64
 #define tokens_append_from_iter tokens_append_from_iter_mips64
 #define tosa_init tosa_init_mips64
-#define tosa_machine_init tosa_machine_init_mips64
+#define tosa_machine_init_register_types tosa_machine_init_register_types_mips64
 #define translator_loop translator_loop_mips64
 #define translator_loop_temp_check translator_loop_temp_check_mips64
 #define tswap32 tswap32_mips64
@@ -3998,7 +3998,7 @@
 #define mips_cpu_unassigned_access mips_cpu_unassigned_access_mips64
 #define mips_defs mips_defs_mips64
 #define mips_defs_number mips_defs_number_mips64
-#define mips_machine_init mips_machine_init_mips64
+#define mips_machine_init_register_types mips_machine_init_register_types_mips64
 #define mips_reg_read mips_reg_read_mips64
 #define mips_reg_reset mips_reg_reset_mips64
 #define mips_reg_write mips_reg_write_mips64

qemu/mips64el.h

@@ -2962,7 +2962,7 @@
 #define token_is_operator token_is_operator_mips64el
 #define tokens_append_from_iter tokens_append_from_iter_mips64el
 #define tosa_init tosa_init_mips64el
-#define tosa_machine_init tosa_machine_init_mips64el
+#define tosa_machine_init_register_types tosa_machine_init_register_types_mips64el
 #define translator_loop translator_loop_mips64el
 #define translator_loop_temp_check translator_loop_temp_check_mips64el
 #define tswap32 tswap32_mips64el
@@ -3998,7 +3998,7 @@
 #define mips_cpu_unassigned_access mips_cpu_unassigned_access_mips64el
 #define mips_defs mips_defs_mips64el
 #define mips_defs_number mips_defs_number_mips64el
-#define mips_machine_init mips_machine_init_mips64el
+#define mips_machine_init_register_types mips_machine_init_register_types_mips64el
 #define mips_reg_read mips_reg_read_mips64el
 #define mips_reg_reset mips_reg_reset_mips64el
 #define mips_reg_write mips_reg_write_mips64el

qemu/mipsel.h

@@ -2962,7 +2962,7 @@
 #define token_is_operator token_is_operator_mipsel
 #define tokens_append_from_iter tokens_append_from_iter_mipsel
 #define tosa_init tosa_init_mipsel
-#define tosa_machine_init tosa_machine_init_mipsel
+#define tosa_machine_init_register_types tosa_machine_init_register_types_mipsel
 #define translator_loop translator_loop_mipsel
 #define translator_loop_temp_check translator_loop_temp_check_mipsel
 #define tswap32 tswap32_mipsel
@@ -3998,7 +3998,7 @@
 #define mips_cpu_unassigned_access mips_cpu_unassigned_access_mipsel
 #define mips_defs mips_defs_mipsel
 #define mips_defs_number mips_defs_number_mipsel
-#define mips_machine_init mips_machine_init_mipsel
+#define mips_machine_init_register_types mips_machine_init_register_types_mipsel
 #define mips_reg_read mips_reg_read_mipsel
 #define mips_reg_reset mips_reg_reset_mipsel
 #define mips_reg_write mips_reg_write_mipsel

qemu/powerpc.h

@@ -2962,7 +2962,7 @@
 #define token_is_operator token_is_operator_powerpc
 #define tokens_append_from_iter tokens_append_from_iter_powerpc
 #define tosa_init tosa_init_powerpc
-#define tosa_machine_init tosa_machine_init_powerpc
+#define tosa_machine_init_register_types tosa_machine_init_register_types_powerpc
 #define translator_loop translator_loop_powerpc
 #define translator_loop_temp_check translator_loop_temp_check_powerpc
 #define tswap32 tswap32_powerpc

qemu/sparc.h

@@ -2962,7 +2962,7 @@
 #define token_is_operator token_is_operator_sparc
 #define tokens_append_from_iter tokens_append_from_iter_sparc
 #define tosa_init tosa_init_sparc
-#define tosa_machine_init tosa_machine_init_sparc
+#define tosa_machine_init_register_types tosa_machine_init_register_types_sparc
 #define translator_loop translator_loop_sparc
 #define translator_loop_temp_check translator_loop_temp_check_sparc
 #define tswap32 tswap32_sparc

qemu/sparc64.h

@@ -2962,7 +2962,7 @@
 #define token_is_operator token_is_operator_sparc64
 #define tokens_append_from_iter tokens_append_from_iter_sparc64
 #define tosa_init tosa_init_sparc64
-#define tosa_machine_init tosa_machine_init_sparc64
+#define tosa_machine_init_register_types tosa_machine_init_register_types_sparc64
 #define translator_loop translator_loop_sparc64
 #define translator_loop_temp_check translator_loop_temp_check_sparc64
 #define tswap32 tswap32_sparc64

qemu/target/arm/unicorn_arm.c

@@ -196,7 +196,7 @@ void arm_uc_init(struct uc_struct* uc)
 {
     register_accel_types(uc);
     arm_cpu_register_types(uc);
-    tosa_machine_init(uc);
+    tosa_machine_init_register_types(uc);
     uc->reg_read = arm_reg_read;
     uc->reg_write = arm_reg_write;
     uc->reg_reset = arm_reg_reset;

qemu/target/m68k/unicorn.c

@@ -98,7 +98,7 @@ void m68k_uc_init(struct uc_struct* uc)
 {
     register_accel_types(uc);
     m68k_cpu_register_types(uc);
-    dummy_m68k_machine_init(uc);
+    dummy_m68k_machine_init_register_types(uc);
     uc->release = m68k_release;
     uc->reg_read = m68k_reg_read;
     uc->reg_write = m68k_reg_write;

qemu/target/mips/unicorn.c

@@ -134,7 +134,7 @@ DEFAULT_VISIBILITY
 {
     register_accel_types(uc);
     mips_cpu_register_types(uc);
-    mips_machine_init(uc);
+    mips_machine_init_register_types(uc);
     uc->reg_read = mips_reg_read;
     uc->reg_write = mips_reg_write;
     uc->reg_reset = mips_reg_reset;

qemu/target/sparc/unicorn.c

@@ -120,7 +120,7 @@ void sparc_uc_init(struct uc_struct* uc)
 {
     register_accel_types(uc);
     sparc_cpu_register_types(uc);
-    leon3_machine_init(uc);
+    leon3_generic_machine_init_register_types(uc);
     uc->release = sparc_release;
     uc->reg_read = sparc_reg_read;
     uc->reg_write = sparc_reg_write;

qemu/target/sparc/unicorn64.c

@@ -110,7 +110,7 @@ void sparc64_uc_init(struct uc_struct* uc)
 {
     register_accel_types(uc);
     sparc_cpu_register_types(uc);
-    sun4u_machine_init(uc);
+    sun4u_machine_init_register_types(uc);
     uc->reg_read = sparc_reg_read;
     uc->reg_write = sparc_reg_write;
     uc->reg_reset = sparc_reg_reset;

qemu/x86_64.h

@@ -2962,7 +2962,7 @@
 #define token_is_operator token_is_operator_x86_64
 #define tokens_append_from_iter tokens_append_from_iter_x86_64
 #define tosa_init tosa_init_x86_64
-#define tosa_machine_init tosa_machine_init_x86_64
+#define tosa_machine_init_register_types tosa_machine_init_register_types_x86_64
 #define translator_loop translator_loop_x86_64
 #define translator_loop_temp_check translator_loop_temp_check_x86_64
 #define tswap32 tswap32_x86_64