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tcg: Make cpu_gpr a TCGv array

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Commit 5d4e1a1081d3f1ec2908ff0eaebe312389971ab4
allows making the type concrete
This commit is contained in:
Lioncash 2018-02-21 00:56:42 -05:00
parent 1defc70341
commit a913b3e468
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GPG key ID: 4E3C3CC1031BA9C7
3 changed files with 517 additions and 527 deletions
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1036
qemu/target-mips/translate.c
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6
qemu/target-mips/unicorn.c
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@ -46,17 +46,11 @@ void mips_release(void *ctx);
void mips_release(void *ctx) void mips_release(void *ctx)
{ {
MIPSCPU* cpu; MIPSCPU* cpu;
int i;
TCGContext *tcg_ctx = (TCGContext *) ctx; TCGContext *tcg_ctx = (TCGContext *) ctx;
release_common(ctx); release_common(ctx);
cpu = MIPS_CPU(tcg_ctx->uc, tcg_ctx->uc->cpu); cpu = MIPS_CPU(tcg_ctx->uc, tcg_ctx->uc->cpu);
g_free(cpu->env.tlb); g_free(cpu->env.tlb);
g_free(cpu->env.mvp); g_free(cpu->env.mvp);
for (i = 0; i < 32; i++) {
g_free(tcg_ctx->cpu_gpr[i]);
}
g_free(tcg_ctx->tb_ctx.tbs); g_free(tcg_ctx->tb_ctx.tbs);
} }

2
qemu/tcg/tcg.h
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@ -812,7 +812,7 @@ struct TCGContext {
/* qemu/target-mips/translate.c */ /* qemu/target-mips/translate.c */
/* global register indices */ /* global register indices */
void *cpu_gpr[32]; TCGv cpu_gpr[32];
TCGv cpu_PC; TCGv cpu_PC;
TCGv cpu_HI[4], cpu_LO[4]; // MIPS_DSP_ACC = 4 in qemu/target-mips/cpu.h TCGv cpu_HI[4], cpu_LO[4]; // MIPS_DSP_ACC = 4 in qemu/target-mips/cpu.h
TCGv cpu_dspctrl; TCGv cpu_dspctrl;