mirror of
https://github.com/yuzu-emu/unicorn.git
synced 2025-01-22 03:11:09 +00:00
memory: Switch memory from using AddressSpace to FlatView
FlatView's will be shared between AddressSpace's and subpage_t and MemoryRegionSection cannot store AS anymore, hence this change. In particular, for: typedef struct subpage_t { MemoryRegion iomem; - AddressSpace *as; + FlatView *fv; hwaddr base; uint16_t sub_section[]; } subpage_t; struct MemoryRegionSection { MemoryRegion *mr; - AddressSpace *address_space; + FlatView *fv; hwaddr offset_within_region; Int128 size; hwaddr offset_within_address_space; bool readonly; }; This should cause no behavioural change. Backports commit 166206845f7fd75e720e6feea0bb01957c8da07f from qemu
This commit is contained in:
parent
06b53d8e40
commit
aa2b76b4e8
|
@ -82,9 +82,6 @@
|
|||
#define address_space_lduw_le_cached address_space_lduw_le_cached_aarch64
|
||||
#define address_space_lookup_region address_space_lookup_region_aarch64
|
||||
#define address_space_map address_space_map_aarch64
|
||||
#define address_space_read address_space_read_aarch64
|
||||
#define address_space_read_continue address_space_read_continue_aarch64
|
||||
#define address_space_read_full address_space_read_full_aarch64
|
||||
#define address_space_rw address_space_rw_aarch64
|
||||
#define address_space_stb address_space_stb_aarch64
|
||||
#define address_space_stb_cached address_space_stb_cached_aarch64
|
||||
|
@ -109,7 +106,7 @@
|
|||
#define address_space_stw_le address_space_stw_le_aarch64
|
||||
#define address_space_stw_le_cached address_space_stw_le_cached_aarch64
|
||||
#define address_space_to_dispatch address_space_to_dispatch_aarch64
|
||||
#define address_space_translate address_space_translate_aarch64
|
||||
#define address_space_to_flatview address_space_to_flatview_aarch64
|
||||
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_aarch64
|
||||
#define address_space_translate_internal address_space_translate_internal_aarch64
|
||||
#define address_space_unmap address_space_unmap_aarch64
|
||||
|
@ -450,9 +447,13 @@
|
|||
#define flatview_init flatview_init_aarch64
|
||||
#define flatview_insert flatview_insert_aarch64
|
||||
#define flatview_lookup flatview_lookup_aarch64
|
||||
#define flatview_read flatview_read_aarch64
|
||||
#define flatview_read_continue flatview_read_continue_aarch64
|
||||
#define flatview_read_full flatview_read_full_aarch64
|
||||
#define flatview_ref flatview_ref_aarch64
|
||||
#define flatview_simplify flatview_simplify_aarch64
|
||||
#define flatview_to_dispatch flatview_to_dispatch_aarch64
|
||||
#define flatview_translate flatview_translate_aarch64
|
||||
#define flatview_unref flatview_unref_aarch64
|
||||
#define float128ToCommonNaN float128ToCommonNaN_aarch64
|
||||
#define float128_add float128_add_aarch64
|
||||
|
|
|
@ -82,9 +82,6 @@
|
|||
#define address_space_lduw_le_cached address_space_lduw_le_cached_aarch64eb
|
||||
#define address_space_lookup_region address_space_lookup_region_aarch64eb
|
||||
#define address_space_map address_space_map_aarch64eb
|
||||
#define address_space_read address_space_read_aarch64eb
|
||||
#define address_space_read_continue address_space_read_continue_aarch64eb
|
||||
#define address_space_read_full address_space_read_full_aarch64eb
|
||||
#define address_space_rw address_space_rw_aarch64eb
|
||||
#define address_space_stb address_space_stb_aarch64eb
|
||||
#define address_space_stb_cached address_space_stb_cached_aarch64eb
|
||||
|
@ -109,7 +106,7 @@
|
|||
#define address_space_stw_le address_space_stw_le_aarch64eb
|
||||
#define address_space_stw_le_cached address_space_stw_le_cached_aarch64eb
|
||||
#define address_space_to_dispatch address_space_to_dispatch_aarch64eb
|
||||
#define address_space_translate address_space_translate_aarch64eb
|
||||
#define address_space_to_flatview address_space_to_flatview_aarch64eb
|
||||
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_aarch64eb
|
||||
#define address_space_translate_internal address_space_translate_internal_aarch64eb
|
||||
#define address_space_unmap address_space_unmap_aarch64eb
|
||||
|
@ -450,9 +447,13 @@
|
|||
#define flatview_init flatview_init_aarch64eb
|
||||
#define flatview_insert flatview_insert_aarch64eb
|
||||
#define flatview_lookup flatview_lookup_aarch64eb
|
||||
#define flatview_read flatview_read_aarch64eb
|
||||
#define flatview_read_continue flatview_read_continue_aarch64eb
|
||||
#define flatview_read_full flatview_read_full_aarch64eb
|
||||
#define flatview_ref flatview_ref_aarch64eb
|
||||
#define flatview_simplify flatview_simplify_aarch64eb
|
||||
#define flatview_to_dispatch flatview_to_dispatch_aarch64eb
|
||||
#define flatview_translate flatview_translate_aarch64eb
|
||||
#define flatview_unref flatview_unref_aarch64eb
|
||||
#define float128ToCommonNaN float128ToCommonNaN_aarch64eb
|
||||
#define float128_add float128_add_aarch64eb
|
||||
|
|
|
@ -82,9 +82,6 @@
|
|||
#define address_space_lduw_le_cached address_space_lduw_le_cached_arm
|
||||
#define address_space_lookup_region address_space_lookup_region_arm
|
||||
#define address_space_map address_space_map_arm
|
||||
#define address_space_read address_space_read_arm
|
||||
#define address_space_read_continue address_space_read_continue_arm
|
||||
#define address_space_read_full address_space_read_full_arm
|
||||
#define address_space_rw address_space_rw_arm
|
||||
#define address_space_stb address_space_stb_arm
|
||||
#define address_space_stb_cached address_space_stb_cached_arm
|
||||
|
@ -109,7 +106,7 @@
|
|||
#define address_space_stw_le address_space_stw_le_arm
|
||||
#define address_space_stw_le_cached address_space_stw_le_cached_arm
|
||||
#define address_space_to_dispatch address_space_to_dispatch_arm
|
||||
#define address_space_translate address_space_translate_arm
|
||||
#define address_space_to_flatview address_space_to_flatview_arm
|
||||
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_arm
|
||||
#define address_space_translate_internal address_space_translate_internal_arm
|
||||
#define address_space_unmap address_space_unmap_arm
|
||||
|
@ -450,9 +447,13 @@
|
|||
#define flatview_init flatview_init_arm
|
||||
#define flatview_insert flatview_insert_arm
|
||||
#define flatview_lookup flatview_lookup_arm
|
||||
#define flatview_read flatview_read_arm
|
||||
#define flatview_read_continue flatview_read_continue_arm
|
||||
#define flatview_read_full flatview_read_full_arm
|
||||
#define flatview_ref flatview_ref_arm
|
||||
#define flatview_simplify flatview_simplify_arm
|
||||
#define flatview_to_dispatch flatview_to_dispatch_arm
|
||||
#define flatview_translate flatview_translate_arm
|
||||
#define flatview_unref flatview_unref_arm
|
||||
#define float128ToCommonNaN float128ToCommonNaN_arm
|
||||
#define float128_add float128_add_arm
|
||||
|
|
|
@ -82,9 +82,6 @@
|
|||
#define address_space_lduw_le_cached address_space_lduw_le_cached_armeb
|
||||
#define address_space_lookup_region address_space_lookup_region_armeb
|
||||
#define address_space_map address_space_map_armeb
|
||||
#define address_space_read address_space_read_armeb
|
||||
#define address_space_read_continue address_space_read_continue_armeb
|
||||
#define address_space_read_full address_space_read_full_armeb
|
||||
#define address_space_rw address_space_rw_armeb
|
||||
#define address_space_stb address_space_stb_armeb
|
||||
#define address_space_stb_cached address_space_stb_cached_armeb
|
||||
|
@ -109,7 +106,7 @@
|
|||
#define address_space_stw_le address_space_stw_le_armeb
|
||||
#define address_space_stw_le_cached address_space_stw_le_cached_armeb
|
||||
#define address_space_to_dispatch address_space_to_dispatch_armeb
|
||||
#define address_space_translate address_space_translate_armeb
|
||||
#define address_space_to_flatview address_space_to_flatview_armeb
|
||||
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_armeb
|
||||
#define address_space_translate_internal address_space_translate_internal_armeb
|
||||
#define address_space_unmap address_space_unmap_armeb
|
||||
|
@ -450,9 +447,13 @@
|
|||
#define flatview_init flatview_init_armeb
|
||||
#define flatview_insert flatview_insert_armeb
|
||||
#define flatview_lookup flatview_lookup_armeb
|
||||
#define flatview_read flatview_read_armeb
|
||||
#define flatview_read_continue flatview_read_continue_armeb
|
||||
#define flatview_read_full flatview_read_full_armeb
|
||||
#define flatview_ref flatview_ref_armeb
|
||||
#define flatview_simplify flatview_simplify_armeb
|
||||
#define flatview_to_dispatch flatview_to_dispatch_armeb
|
||||
#define flatview_translate flatview_translate_armeb
|
||||
#define flatview_unref flatview_unref_armeb
|
||||
#define float128ToCommonNaN float128ToCommonNaN_armeb
|
||||
#define float128_add float128_add_armeb
|
||||
|
|
216
qemu/exec.c
216
qemu/exec.c
|
@ -139,12 +139,13 @@ struct AddressSpaceDispatch {
|
|||
*/
|
||||
PhysPageEntry phys_map;
|
||||
PhysPageMap map;
|
||||
struct uc_struct *uc;
|
||||
};
|
||||
|
||||
#define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
|
||||
typedef struct subpage_t {
|
||||
MemoryRegion iomem;
|
||||
AddressSpace *as;
|
||||
FlatView *fv;
|
||||
hwaddr base;
|
||||
uint16_t sub_section[];
|
||||
} subpage_t;
|
||||
|
@ -217,13 +218,12 @@ static void phys_page_set_level(PhysPageMap *map, PhysPageEntry *lp,
|
|||
}
|
||||
}
|
||||
|
||||
static void phys_page_set(struct uc_struct *uc,
|
||||
AddressSpaceDispatch *d,
|
||||
static void phys_page_set(AddressSpaceDispatch *d,
|
||||
hwaddr index, hwaddr nb,
|
||||
uint16_t leaf)
|
||||
{
|
||||
/* Wildly overreserve - it doesn't matter much. */
|
||||
phys_map_node_reserve(uc, &d->map, 3 * P_L2_LEVELS);
|
||||
phys_map_node_reserve(d->uc, &d->map, 3 * P_L2_LEVELS);
|
||||
|
||||
phys_page_set_level(&d->map, &d->phys_map, &index, &nb, leaf, P_L2_LEVELS - 1);
|
||||
}
|
||||
|
@ -392,23 +392,25 @@ address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *x
|
|||
return section;
|
||||
}
|
||||
|
||||
static MemoryRegionSection address_space_do_translate(AddressSpace *as,
|
||||
hwaddr addr,
|
||||
hwaddr *xlat,
|
||||
hwaddr *plen,
|
||||
bool is_write,
|
||||
bool is_mmio,
|
||||
AddressSpace **target_as)
|
||||
static MemoryRegionSection flatview_do_translate(FlatView *fv,
|
||||
hwaddr addr,
|
||||
hwaddr *xlat,
|
||||
hwaddr *plen,
|
||||
bool is_write,
|
||||
bool is_mmio,
|
||||
AddressSpace **target_as)
|
||||
{
|
||||
IOMMUTLBEntry iotlb;
|
||||
MemoryRegionSection *section;
|
||||
MemoryRegion *mr;
|
||||
MemoryRegionSection failure_section = {0};
|
||||
AddressSpaceDispatch *d = flatview_to_dispatch(fv);
|
||||
|
||||
for (;;) {
|
||||
// Unicorn: atomic_read used instead of atomic_rcu_read
|
||||
AddressSpaceDispatch *d = address_space_to_dispatch(as);
|
||||
section = address_space_translate_internal(d, addr, &addr, plen, is_mmio);
|
||||
section = address_space_translate_internal(
|
||||
flatview_to_dispatch(fv), addr, &addr,
|
||||
plen, is_mmio);
|
||||
mr = section->mr;
|
||||
|
||||
if (!mr->iommu_ops) {
|
||||
|
@ -424,7 +426,7 @@ static MemoryRegionSection address_space_do_translate(AddressSpace *as,
|
|||
goto translate_fail;
|
||||
}
|
||||
|
||||
as = iotlb.target_as;
|
||||
fv = address_space_to_flatview(iotlb.target_as);
|
||||
*target_as = iotlb.target_as;
|
||||
}
|
||||
|
||||
|
@ -433,7 +435,7 @@ static MemoryRegionSection address_space_do_translate(AddressSpace *as,
|
|||
return *section;
|
||||
|
||||
translate_fail:
|
||||
failure_section.mr = &as->uc->io_mem_unassigned;
|
||||
failure_section.mr = &d->uc->io_mem_unassigned;
|
||||
return failure_section;
|
||||
}
|
||||
|
||||
|
@ -448,8 +450,8 @@ IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr,
|
|||
plen = (hwaddr)-1;
|
||||
|
||||
/* This can never be MMIO. */
|
||||
section = address_space_do_translate(as, addr, &xlat, &plen,
|
||||
is_write, false, &as);
|
||||
section = flatview_do_translate(address_space_to_flatview(as), addr,
|
||||
&xlat, &plen, is_write, false, &as);
|
||||
|
||||
/* Illegal translation */
|
||||
if (section.mr == &as->uc->io_mem_unassigned) {
|
||||
|
@ -484,16 +486,15 @@ iotlb_fail:
|
|||
}
|
||||
|
||||
/* Called from RCU critical section */
|
||||
MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr,
|
||||
hwaddr *xlat, hwaddr *plen,
|
||||
bool is_write)
|
||||
MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat,
|
||||
hwaddr *plen, bool is_write)
|
||||
{
|
||||
MemoryRegion *mr;
|
||||
MemoryRegionSection section;
|
||||
AddressSpace *as = NULL;
|
||||
|
||||
/* This can be MMIO, so setup MMIO bit. */
|
||||
section = address_space_do_translate(as, addr, xlat, plen, is_write, true,
|
||||
&as);
|
||||
section = flatview_do_translate(fv, addr, xlat, plen, is_write, true, &as);
|
||||
mr = section.mr;
|
||||
|
||||
// Unicorn: if'd out
|
||||
|
@ -966,8 +967,7 @@ hwaddr memory_region_section_get_iotlb(CPUState *cpu,
|
|||
} else {
|
||||
AddressSpaceDispatch *d;
|
||||
|
||||
// Unicorn: uses atomic_read instead of atomic_rcu_read
|
||||
d = address_space_to_dispatch(section->address_space);
|
||||
d = flatview_to_dispatch(section->fv);
|
||||
iotlb = section - d->map.sections;
|
||||
iotlb += xlat;
|
||||
}
|
||||
|
@ -993,7 +993,7 @@ hwaddr memory_region_section_get_iotlb(CPUState *cpu,
|
|||
|
||||
static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
|
||||
uint16_t section);
|
||||
static subpage_t *subpage_init(AddressSpace *as, hwaddr base);
|
||||
static subpage_t *subpage_init(FlatView *fv, hwaddr base);
|
||||
|
||||
static void *(*phys_mem_alloc)(size_t size, uint64_t *align) =
|
||||
qemu_anon_ram_alloc;
|
||||
|
@ -1050,11 +1050,10 @@ static void phys_sections_free(PhysPageMap *map)
|
|||
g_free(map->nodes);
|
||||
}
|
||||
|
||||
static void register_subpage(AddressSpace *as,
|
||||
AddressSpaceDispatch *d,
|
||||
static void register_subpage(FlatView *fv, AddressSpaceDispatch *d,
|
||||
MemoryRegionSection *section)
|
||||
{
|
||||
struct uc_struct *uc = as->uc;
|
||||
struct uc_struct *uc = d->uc;
|
||||
subpage_t *subpage;
|
||||
hwaddr base = section->offset_within_address_space
|
||||
& TARGET_PAGE_MASK;
|
||||
|
@ -1065,10 +1064,10 @@ static void register_subpage(AddressSpace *as,
|
|||
assert(existing->mr->subpage || existing->mr == &uc->io_mem_unassigned);
|
||||
|
||||
if (!(existing->mr->subpage)) {
|
||||
subpage = subpage_init(as, base);
|
||||
subsection.address_space = as;
|
||||
subpage = subpage_init(fv, base);
|
||||
subsection.fv = fv;
|
||||
subsection.mr = &subpage->iomem;
|
||||
phys_page_set(uc, d, base >> TARGET_PAGE_BITS, 1,
|
||||
phys_page_set(d, base >> TARGET_PAGE_BITS, 1,
|
||||
phys_section_add(&d->map, &subsection));
|
||||
} else {
|
||||
subpage = container_of(existing->mr, subpage_t, iomem);
|
||||
|
@ -1081,8 +1080,7 @@ static void register_subpage(AddressSpace *as,
|
|||
}
|
||||
|
||||
|
||||
static void register_multipage(struct uc_struct *uc,
|
||||
AddressSpaceDispatch *d,
|
||||
static void register_multipage(AddressSpaceDispatch *d,
|
||||
MemoryRegionSection *section)
|
||||
{
|
||||
hwaddr start_addr = section->offset_within_address_space;
|
||||
|
@ -1091,10 +1089,10 @@ static void register_multipage(struct uc_struct *uc,
|
|||
TARGET_PAGE_BITS));
|
||||
|
||||
assert(num_pages);
|
||||
phys_page_set(uc, d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index);
|
||||
phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_index);
|
||||
}
|
||||
|
||||
void mem_add(AddressSpace *as, FlatView *fv, MemoryRegionSection *section)
|
||||
void mem_add(FlatView *fv, MemoryRegionSection *section)
|
||||
{
|
||||
AddressSpaceDispatch *d = flatview_to_dispatch(fv);
|
||||
MemoryRegionSection now = *section, remain = *section;
|
||||
|
@ -1105,7 +1103,7 @@ void mem_add(AddressSpace *as, FlatView *fv, MemoryRegionSection *section)
|
|||
- now.offset_within_address_space;
|
||||
|
||||
now.size = int128_min(int128_make64(left), now.size);
|
||||
register_subpage(as, d, &now);
|
||||
register_subpage(fv, d, &now);
|
||||
} else {
|
||||
now.size = int128_zero();
|
||||
}
|
||||
|
@ -1115,13 +1113,13 @@ void mem_add(AddressSpace *as, FlatView *fv, MemoryRegionSection *section)
|
|||
remain.offset_within_region += int128_get64(now.size);
|
||||
now = remain;
|
||||
if (int128_lt(remain.size, page_size)) {
|
||||
register_subpage(as, d, &now);
|
||||
register_subpage(fv, d, &now);
|
||||
} else if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) {
|
||||
now.size = page_size;
|
||||
register_subpage(as, d, &now);
|
||||
register_subpage(fv, d, &now);
|
||||
} else {
|
||||
now.size = int128_and(now.size, int128_neg(page_size));
|
||||
register_multipage(as->uc, d, &now);
|
||||
register_multipage(d, &now);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -1640,6 +1638,11 @@ ram_addr_t qemu_ram_addr_from_host(struct uc_struct* uc, void *ptr)
|
|||
return block->offset + offset;
|
||||
}
|
||||
|
||||
static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
|
||||
const uint8_t *buf, int len);
|
||||
static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len,
|
||||
bool is_write);
|
||||
|
||||
static MemTxResult subpage_read(struct uc_struct* uc, void *opaque, hwaddr addr,
|
||||
uint64_t *data, unsigned len, MemTxAttrs attrs)
|
||||
{
|
||||
|
@ -1651,8 +1654,7 @@ static MemTxResult subpage_read(struct uc_struct* uc, void *opaque, hwaddr addr,
|
|||
printf("%s: subpage %p len %u addr " TARGET_FMT_plx "\n", __func__,
|
||||
subpage, len, addr);
|
||||
#endif
|
||||
res = address_space_read(subpage->as, addr + subpage->base,
|
||||
attrs, buf, len);
|
||||
res = flatview_read(subpage->fv, addr + subpage->base, attrs, buf, len);
|
||||
if (res) {
|
||||
return res;
|
||||
}
|
||||
|
@ -1701,8 +1703,7 @@ static MemTxResult subpage_write(struct uc_struct* uc, void *opaque, hwaddr addr
|
|||
default:
|
||||
abort();
|
||||
}
|
||||
return address_space_write(subpage->as, addr + subpage->base,
|
||||
attrs, buf, len);
|
||||
return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len);
|
||||
}
|
||||
|
||||
static bool subpage_accepts(void *opaque, hwaddr addr,
|
||||
|
@ -1714,8 +1715,8 @@ static bool subpage_accepts(void *opaque, hwaddr addr,
|
|||
__func__, subpage, is_write ? 'w' : 'r', len, addr);
|
||||
#endif
|
||||
|
||||
return address_space_access_valid(subpage->as, addr + subpage->base,
|
||||
len, is_write);
|
||||
return flatview_access_valid(subpage->fv, addr + subpage->base,
|
||||
len, is_write);
|
||||
}
|
||||
|
||||
static const MemoryRegionOps subpage_ops = {
|
||||
|
@ -1806,15 +1807,16 @@ static void io_mem_init(struct uc_struct* uc)
|
|||
// NULL, UINT64_MAX);
|
||||
}
|
||||
|
||||
static subpage_t *subpage_init(AddressSpace *as, hwaddr base)
|
||||
static subpage_t *subpage_init(FlatView *fv, hwaddr base)
|
||||
{
|
||||
AddressSpaceDispatch *d = flatview_to_dispatch(fv);
|
||||
subpage_t *mmio;
|
||||
|
||||
mmio = g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint16_t));
|
||||
|
||||
mmio->as = as;
|
||||
mmio->fv = fv;
|
||||
mmio->base = base;
|
||||
memory_region_init_io(as->uc, &mmio->iomem, NULL, &subpage_ops, mmio,
|
||||
memory_region_init_io(d->uc, &mmio->iomem, NULL, &subpage_ops, mmio,
|
||||
NULL, TARGET_PAGE_SIZE);
|
||||
mmio->iomem.subpage = true;
|
||||
#if defined(DEBUG_SUBPAGE)
|
||||
|
@ -1826,17 +1828,16 @@ static subpage_t *subpage_init(AddressSpace *as, hwaddr base)
|
|||
return mmio;
|
||||
}
|
||||
|
||||
static uint16_t dummy_section(PhysPageMap *map, AddressSpace *as,
|
||||
MemoryRegion *mr)
|
||||
static uint16_t dummy_section(PhysPageMap *map, FlatView *fv, MemoryRegion *mr)
|
||||
{
|
||||
MemoryRegionSection section = MemoryRegionSection_make(
|
||||
mr, as, 0,
|
||||
mr, fv, 0,
|
||||
int128_2_64(),
|
||||
false,
|
||||
0
|
||||
);
|
||||
|
||||
assert(as);
|
||||
|
||||
assert(fv);
|
||||
|
||||
return phys_section_add(map, §ion);
|
||||
}
|
||||
|
@ -1854,18 +1855,21 @@ MemoryRegion *iotlb_to_region(CPUState *cpu, hwaddr index, MemTxAttrs attrs)
|
|||
|
||||
AddressSpaceDispatch *mem_begin(AddressSpace *as)
|
||||
{
|
||||
FlatView *fv = address_space_to_flatview(as);
|
||||
AddressSpaceDispatch *d = g_new0(AddressSpaceDispatch, 1);
|
||||
uint16_t n;
|
||||
PhysPageEntry ppe = { 1, PHYS_MAP_NODE_NIL };
|
||||
struct uc_struct *uc = as->uc;
|
||||
|
||||
n = dummy_section(&d->map, as, &uc->io_mem_unassigned);
|
||||
d->uc = as->uc;
|
||||
|
||||
n = dummy_section(&d->map, fv, &uc->io_mem_unassigned);
|
||||
assert(n == PHYS_SECTION_UNASSIGNED);
|
||||
n = dummy_section(&d->map, as, &uc->io_mem_notdirty);
|
||||
n = dummy_section(&d->map, fv, &uc->io_mem_notdirty);
|
||||
assert(n == PHYS_SECTION_NOTDIRTY);
|
||||
n = dummy_section(&d->map, as, &uc->io_mem_rom);
|
||||
n = dummy_section(&d->map, fv, &uc->io_mem_rom);
|
||||
assert(n == PHYS_SECTION_ROM);
|
||||
// n = dummy_section(&d->map, as, &uc->io_mem_watch);
|
||||
// n = dummy_section(&d->map, fv, &uc->io_mem_watch);
|
||||
// assert(n == PHYS_SECTION_WATCH);
|
||||
|
||||
d->phys_map = ppe;
|
||||
|
@ -2021,11 +2025,11 @@ static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr)
|
|||
return l;
|
||||
}
|
||||
|
||||
static MemTxResult address_space_write_continue(AddressSpace *as, hwaddr addr,
|
||||
MemTxAttrs attrs,
|
||||
const uint8_t *buf,
|
||||
int len, hwaddr addr1,
|
||||
hwaddr l, MemoryRegion *mr)
|
||||
static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr,
|
||||
MemTxAttrs attrs,
|
||||
const uint8_t *buf,
|
||||
int len, hwaddr addr1,
|
||||
hwaddr l, MemoryRegion *mr)
|
||||
{
|
||||
uint8_t *ptr;
|
||||
uint64_t val;
|
||||
|
@ -2093,7 +2097,7 @@ static MemTxResult address_space_write_continue(AddressSpace *as, hwaddr addr,
|
|||
}
|
||||
|
||||
l = len;
|
||||
mr = address_space_translate(as, addr, &addr1, &l, true);
|
||||
mr = flatview_translate(fv, addr, &addr1, &l, true);
|
||||
}
|
||||
// Unicorn: commented out
|
||||
//rcu_read_unlock();
|
||||
|
@ -2101,8 +2105,8 @@ static MemTxResult address_space_write_continue(AddressSpace *as, hwaddr addr,
|
|||
return result;
|
||||
}
|
||||
|
||||
MemTxResult address_space_write(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
|
||||
const uint8_t *buf, int len)
|
||||
static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
|
||||
const uint8_t *buf, int len)
|
||||
{
|
||||
hwaddr l;
|
||||
hwaddr addr1;
|
||||
|
@ -2113,9 +2117,9 @@ MemTxResult address_space_write(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
|
|||
// Unicorn: commented out
|
||||
//rcu_read_lock();
|
||||
l = len;
|
||||
mr = address_space_translate(as, addr, &addr1, &l, true);
|
||||
result = address_space_write_continue(as, addr, attrs, buf, len,
|
||||
addr1, l, mr);
|
||||
mr = flatview_translate(fv, addr, &addr1, &l, true);
|
||||
result = flatview_write_continue(fv, addr, attrs, buf, len,
|
||||
addr1, l, mr);
|
||||
// Unicorn: commented out
|
||||
//rcu_read_unlock();
|
||||
}
|
||||
|
@ -2123,10 +2127,17 @@ MemTxResult address_space_write(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
|
|||
return result;
|
||||
}
|
||||
|
||||
MemTxResult address_space_read_continue(AddressSpace *as, hwaddr addr,
|
||||
MemTxAttrs attrs, uint8_t *buf,
|
||||
int len, hwaddr addr1, hwaddr l,
|
||||
MemoryRegion *mr)
|
||||
MemTxResult address_space_write(AddressSpace *as, hwaddr addr,
|
||||
MemTxAttrs attrs,
|
||||
const uint8_t *buf, int len)
|
||||
{
|
||||
return flatview_write(address_space_to_flatview(as), addr, attrs, buf, len);
|
||||
}
|
||||
|
||||
MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr,
|
||||
MemTxAttrs attrs, uint8_t *buf,
|
||||
int len, hwaddr addr1, hwaddr l,
|
||||
MemoryRegion *mr)
|
||||
{
|
||||
uint8_t *ptr;
|
||||
uint64_t val;
|
||||
|
@ -2189,14 +2200,14 @@ MemTxResult address_space_read_continue(AddressSpace *as, hwaddr addr,
|
|||
}
|
||||
|
||||
l = len;
|
||||
mr = address_space_translate(as, addr, &addr1, &l, false);
|
||||
mr = flatview_translate(fv, addr, &addr1, &l, false);
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,
|
||||
MemTxAttrs attrs, uint8_t *buf, int len)
|
||||
MemTxResult flatview_read_full(FlatView *fv, hwaddr addr,
|
||||
MemTxAttrs attrs, uint8_t *buf, int len)
|
||||
{
|
||||
hwaddr l;
|
||||
hwaddr addr1;
|
||||
|
@ -2207,25 +2218,33 @@ MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,
|
|||
// Unicorn: commented out
|
||||
//rcu_read_lock();
|
||||
l = len;
|
||||
mr = address_space_translate(as, addr, &addr1, &l, false);
|
||||
result = address_space_read_continue(as, addr, attrs, buf, len,
|
||||
addr1, l, mr);
|
||||
mr = flatview_translate(fv, addr, &addr1, &l, false);
|
||||
result = flatview_read_continue(fv, addr, attrs, buf, len,
|
||||
addr1, l, mr);
|
||||
// Unicorn: commented out
|
||||
//rcu_read_unlock();
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
|
||||
uint8_t *buf, int len, bool is_write)
|
||||
static MemTxResult flatview_rw(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
|
||||
uint8_t *buf, int len, bool is_write)
|
||||
{
|
||||
if (is_write) {
|
||||
return address_space_write(as, addr, attrs, (uint8_t *)buf, len);
|
||||
return flatview_write(fv, addr, attrs, (uint8_t *)buf, len);
|
||||
} else {
|
||||
return address_space_read(as, addr, attrs, (uint8_t *)buf, len);
|
||||
return flatview_read(fv, addr, attrs, (uint8_t *)buf, len);
|
||||
}
|
||||
}
|
||||
|
||||
MemTxResult address_space_rw(AddressSpace *as, hwaddr addr,
|
||||
MemTxAttrs attrs, uint8_t *buf,
|
||||
int len, bool is_write)
|
||||
{
|
||||
return flatview_rw(address_space_to_flatview(as),
|
||||
addr, attrs, buf, len, is_write);
|
||||
}
|
||||
|
||||
bool cpu_physical_memory_rw(AddressSpace *as, hwaddr addr, uint8_t *buf,
|
||||
int len, int is_write)
|
||||
{
|
||||
|
@ -2296,15 +2315,15 @@ void cpu_flush_icache_range(AddressSpace *as, hwaddr start, int len)
|
|||
start, NULL, len, FLUSH_CACHE);
|
||||
}
|
||||
|
||||
|
||||
bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bool is_write)
|
||||
static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len,
|
||||
bool is_write)
|
||||
{
|
||||
MemoryRegion *mr;
|
||||
hwaddr l, xlat;
|
||||
|
||||
while (len > 0) {
|
||||
l = len;
|
||||
mr = address_space_translate(as, addr, &xlat, &l, is_write);
|
||||
mr = flatview_translate(fv, addr, &xlat, &l, is_write);
|
||||
if (!memory_access_is_direct(mr, is_write)) {
|
||||
l = memory_access_size(mr, l, addr);
|
||||
if (!memory_region_access_valid(mr, xlat, l, is_write)) {
|
||||
|
@ -2320,10 +2339,18 @@ bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bool is_
|
|||
return true;
|
||||
}
|
||||
|
||||
bool address_space_access_valid(AddressSpace *as, hwaddr addr,
|
||||
int len, bool is_write)
|
||||
{
|
||||
return flatview_access_valid(address_space_to_flatview(as),
|
||||
addr, len, is_write);
|
||||
}
|
||||
|
||||
static hwaddr
|
||||
address_space_extend_translation(AddressSpace *as, hwaddr addr, hwaddr target_len,
|
||||
MemoryRegion *mr, hwaddr base, hwaddr len,
|
||||
bool is_write)
|
||||
flatview_extend_translation(FlatView *fv, hwaddr addr,
|
||||
hwaddr target_len,
|
||||
MemoryRegion *mr, hwaddr base, hwaddr len,
|
||||
bool is_write)
|
||||
{
|
||||
hwaddr done = 0;
|
||||
hwaddr xlat;
|
||||
|
@ -2338,7 +2365,8 @@ address_space_extend_translation(AddressSpace *as, hwaddr addr, hwaddr target_le
|
|||
}
|
||||
|
||||
len = target_len;
|
||||
this_mr = address_space_translate(as, addr, &xlat, &len, is_write);
|
||||
this_mr = flatview_translate(fv, addr, &xlat,
|
||||
&len, is_write);
|
||||
if (this_mr != mr || xlat != base + done) {
|
||||
return done;
|
||||
}
|
||||
|
@ -2361,13 +2389,14 @@ void *address_space_map(AddressSpace *as,
|
|||
hwaddr l, xlat;
|
||||
MemoryRegion *mr;
|
||||
void *ptr;
|
||||
FlatView *fv = address_space_to_flatview(as);
|
||||
|
||||
if (len == 0) {
|
||||
return NULL;
|
||||
}
|
||||
|
||||
l = len;
|
||||
mr = address_space_translate(as, addr, &xlat, &l, is_write);
|
||||
mr = flatview_translate(fv, addr, &xlat, &l, is_write);
|
||||
if (!memory_access_is_direct(mr, is_write)) {
|
||||
if (atomic_xchg(&as->uc->bounce.in_use, true)) {
|
||||
return NULL;
|
||||
|
@ -2381,8 +2410,8 @@ void *address_space_map(AddressSpace *as,
|
|||
memory_region_ref(mr);
|
||||
as->uc->bounce.mr = mr;
|
||||
if (!is_write) {
|
||||
address_space_read(as, addr, MEMTXATTRS_UNSPECIFIED,
|
||||
as->uc->bounce.buffer, l);
|
||||
flatview_read(fv, addr, MEMTXATTRS_UNSPECIFIED,
|
||||
as->uc->bounce.buffer, l);
|
||||
}
|
||||
|
||||
*plen = l;
|
||||
|
@ -2390,7 +2419,8 @@ void *address_space_map(AddressSpace *as,
|
|||
}
|
||||
|
||||
memory_region_ref(mr);
|
||||
*plen = address_space_extend_translation(as, addr, len, mr, xlat, l, is_write);
|
||||
*plen = flatview_extend_translation(fv, addr, len, mr, xlat,
|
||||
l, is_write);
|
||||
ptr = qemu_ram_ptr_length(mr->uc, mr->ram_block, xlat, plen, true);
|
||||
return ptr;
|
||||
}
|
||||
|
|
|
@ -88,9 +88,6 @@ symbols = (
|
|||
'address_space_lduw_le_cached',
|
||||
'address_space_lookup_region',
|
||||
'address_space_map',
|
||||
'address_space_read',
|
||||
'address_space_read_continue',
|
||||
'address_space_read_full',
|
||||
'address_space_rw',
|
||||
'address_space_stb',
|
||||
'address_space_stb_cached',
|
||||
|
@ -115,7 +112,7 @@ symbols = (
|
|||
'address_space_stw_le',
|
||||
'address_space_stw_le_cached',
|
||||
'address_space_to_dispatch',
|
||||
'address_space_translate',
|
||||
'address_space_to_flatview',
|
||||
'address_space_translate_for_iotlb',
|
||||
'address_space_translate_internal',
|
||||
'address_space_unmap',
|
||||
|
@ -456,9 +453,13 @@ symbols = (
|
|||
'flatview_init',
|
||||
'flatview_insert',
|
||||
'flatview_lookup',
|
||||
'flatview_read',
|
||||
'flatview_read_continue',
|
||||
'flatview_read_full',
|
||||
'flatview_ref',
|
||||
'flatview_simplify',
|
||||
'flatview_to_dispatch',
|
||||
'flatview_translate',
|
||||
'flatview_unref',
|
||||
'float128ToCommonNaN',
|
||||
'float128_add',
|
||||
|
|
|
@ -27,7 +27,7 @@ extern const MemoryRegionOps unassigned_mem_ops;
|
|||
bool memory_region_access_valid(MemoryRegion *mr, hwaddr addr,
|
||||
unsigned size, bool is_write);
|
||||
|
||||
void mem_add(AddressSpace *as, FlatView *fv, MemoryRegionSection *section);
|
||||
void mem_add(FlatView *fv, MemoryRegionSection *section);
|
||||
AddressSpaceDispatch *mem_begin(AddressSpace *as);
|
||||
void mem_commit(AddressSpaceDispatch *d);
|
||||
|
||||
|
|
|
@ -37,6 +37,7 @@
|
|||
|
||||
typedef struct MemoryRegionOps MemoryRegionOps;
|
||||
typedef struct MemoryRegionMmio MemoryRegionMmio;
|
||||
typedef struct FlatView FlatView;
|
||||
|
||||
struct MemoryRegionMmio {
|
||||
CPUReadMemoryFunc *read[3];
|
||||
|
@ -230,6 +231,8 @@ struct AddressSpace {
|
|||
QTAILQ_ENTRY(AddressSpace) address_spaces_link;
|
||||
};
|
||||
|
||||
FlatView *address_space_to_flatview(AddressSpace *as);
|
||||
|
||||
/**
|
||||
* MemoryRegionSection: describes a fragment of a #MemoryRegion
|
||||
*
|
||||
|
@ -243,19 +246,19 @@ struct AddressSpace {
|
|||
*/
|
||||
struct MemoryRegionSection {
|
||||
MemoryRegion *mr;
|
||||
AddressSpace *address_space;
|
||||
FlatView *fv;
|
||||
hwaddr offset_within_region;
|
||||
Int128 size;
|
||||
hwaddr offset_within_address_space;
|
||||
bool readonly;
|
||||
};
|
||||
|
||||
static inline MemoryRegionSection MemoryRegionSection_make(MemoryRegion *mr, AddressSpace *address_space,
|
||||
static inline MemoryRegionSection MemoryRegionSection_make(MemoryRegion *mr, FlatView *fv,
|
||||
hwaddr offset_within_region, Int128 size, hwaddr offset_within_address_space, bool readonly)
|
||||
{
|
||||
MemoryRegionSection section;
|
||||
section.mr = mr;
|
||||
section.address_space = address_space;
|
||||
section.fv = fv;
|
||||
section.offset_within_region = offset_within_region;
|
||||
section.size = size;
|
||||
section.offset_within_address_space = offset_within_address_space;
|
||||
|
@ -1222,9 +1225,17 @@ IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr,
|
|||
* @len: pointer to length
|
||||
* @is_write: indicates the transfer direction
|
||||
*/
|
||||
MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr,
|
||||
hwaddr *xlat, hwaddr *len,
|
||||
bool is_write);
|
||||
MemoryRegion *flatview_translate(FlatView *fv,
|
||||
hwaddr addr, hwaddr *xlat,
|
||||
hwaddr *len, bool is_write);
|
||||
|
||||
static inline MemoryRegion *address_space_translate(AddressSpace *as,
|
||||
hwaddr addr, hwaddr *xlat,
|
||||
hwaddr *len, bool is_write)
|
||||
{
|
||||
return flatview_translate(address_space_to_flatview(as),
|
||||
addr, xlat, len, is_write);
|
||||
}
|
||||
|
||||
/* address_space_access_valid: check for validity of accessing an address
|
||||
* space range
|
||||
|
@ -1281,13 +1292,13 @@ void memory_unmap(struct uc_struct *uc, MemoryRegion *mr);
|
|||
int memory_free(struct uc_struct *uc);
|
||||
|
||||
/* Internal functions, part of the implementation of address_space_read. */
|
||||
MemTxResult address_space_read_continue(AddressSpace *as, hwaddr addr,
|
||||
MemTxAttrs attrs, uint8_t *buf,
|
||||
int len, hwaddr addr1, hwaddr l,
|
||||
MemoryRegion *mr);
|
||||
MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr,
|
||||
MemTxAttrs attrs, uint8_t *buf,
|
||||
int len, hwaddr addr1, hwaddr l,
|
||||
MemoryRegion *mr);
|
||||
|
||||
MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,
|
||||
MemTxAttrs attrs, uint8_t *buf, int len);
|
||||
MemTxResult flatview_read_full(FlatView *fv, hwaddr addr,
|
||||
MemTxAttrs attrs, uint8_t *buf, int len);
|
||||
void *qemu_map_ram_ptr(struct uc_struct *uc, RAMBlock *ram_block,
|
||||
ram_addr_t addr);
|
||||
|
||||
|
@ -1315,8 +1326,8 @@ static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write)
|
|||
* @buf: buffer with the data transferred
|
||||
*/
|
||||
static inline
|
||||
MemTxResult address_space_read(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
|
||||
uint8_t *buf, int len)
|
||||
MemTxResult flatview_read(FlatView *fv, hwaddr addr, MemTxAttrs attrs,
|
||||
uint8_t *buf, int len)
|
||||
{
|
||||
MemTxResult result = MEMTX_OK;
|
||||
/* Unicorn: commented out
|
||||
|
@ -1329,23 +1340,30 @@ MemTxResult address_space_read(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
|
|||
// Unicorn: commented out
|
||||
//rcu_read_lock();
|
||||
l = len;
|
||||
mr = address_space_translate(as, addr, &addr1, &l, false);
|
||||
mr = flatview_translate(fv, addr, &addr1, &l, false);
|
||||
if (len == l && memory_access_is_direct(mr, false)) {
|
||||
ptr = qemu_map_ram_ptr(mr->uc, mr->ram_block, addr1);
|
||||
memcpy(buf, ptr, len);
|
||||
} else {
|
||||
result = address_space_read_continue(as, addr, attrs, buf, len,
|
||||
addr1, l, mr);
|
||||
result = flatview_read_continue(fv, addr, attrs, buf, len,
|
||||
addr1, l, mr);
|
||||
}
|
||||
// Unicorn: commented out
|
||||
//rcu_read_unlock();
|
||||
}
|
||||
} else {*/
|
||||
result = address_space_read_full(as, addr, attrs, buf, len);
|
||||
result = flatview_read_full(fv, addr, attrs, buf, len);
|
||||
//}
|
||||
return result;
|
||||
}
|
||||
|
||||
static inline MemTxResult address_space_read(AddressSpace *as, hwaddr addr,
|
||||
MemTxAttrs attrs, uint8_t *buf,
|
||||
int len)
|
||||
{
|
||||
return flatview_read(address_space_to_flatview(as), addr, attrs, buf, len);
|
||||
}
|
||||
|
||||
/**
|
||||
* address_space_read_cached: read from a cached RAM region
|
||||
*
|
||||
|
|
|
@ -82,9 +82,6 @@
|
|||
#define address_space_lduw_le_cached address_space_lduw_le_cached_m68k
|
||||
#define address_space_lookup_region address_space_lookup_region_m68k
|
||||
#define address_space_map address_space_map_m68k
|
||||
#define address_space_read address_space_read_m68k
|
||||
#define address_space_read_continue address_space_read_continue_m68k
|
||||
#define address_space_read_full address_space_read_full_m68k
|
||||
#define address_space_rw address_space_rw_m68k
|
||||
#define address_space_stb address_space_stb_m68k
|
||||
#define address_space_stb_cached address_space_stb_cached_m68k
|
||||
|
@ -109,7 +106,7 @@
|
|||
#define address_space_stw_le address_space_stw_le_m68k
|
||||
#define address_space_stw_le_cached address_space_stw_le_cached_m68k
|
||||
#define address_space_to_dispatch address_space_to_dispatch_m68k
|
||||
#define address_space_translate address_space_translate_m68k
|
||||
#define address_space_to_flatview address_space_to_flatview_m68k
|
||||
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_m68k
|
||||
#define address_space_translate_internal address_space_translate_internal_m68k
|
||||
#define address_space_unmap address_space_unmap_m68k
|
||||
|
@ -450,9 +447,13 @@
|
|||
#define flatview_init flatview_init_m68k
|
||||
#define flatview_insert flatview_insert_m68k
|
||||
#define flatview_lookup flatview_lookup_m68k
|
||||
#define flatview_read flatview_read_m68k
|
||||
#define flatview_read_continue flatview_read_continue_m68k
|
||||
#define flatview_read_full flatview_read_full_m68k
|
||||
#define flatview_ref flatview_ref_m68k
|
||||
#define flatview_simplify flatview_simplify_m68k
|
||||
#define flatview_to_dispatch flatview_to_dispatch_m68k
|
||||
#define flatview_translate flatview_translate_m68k
|
||||
#define flatview_unref flatview_unref_m68k
|
||||
#define float128ToCommonNaN float128ToCommonNaN_m68k
|
||||
#define float128_add float128_add_m68k
|
||||
|
|
|
@ -236,12 +236,12 @@ enum ListenerDirection { Forward, Reverse };
|
|||
/* No need to ref/unref .mr, the FlatRange keeps it alive. */
|
||||
#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, ...) \
|
||||
do { \
|
||||
MemoryRegionSection mrs = section_from_flat_range(fr, as); \
|
||||
MemoryRegionSection mrs = section_from_flat_range(fr, \
|
||||
address_space_to_flatview(as)); \
|
||||
MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##__VA_ARGS__); \
|
||||
} while(0);
|
||||
|
||||
typedef struct FlatRange FlatRange;
|
||||
typedef struct FlatView FlatView;
|
||||
|
||||
/* Range of memory in the global map. Addresses are absolute. */
|
||||
struct FlatRange {
|
||||
|
@ -269,11 +269,11 @@ typedef struct AddressSpaceOps AddressSpaceOps;
|
|||
for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
|
||||
|
||||
static inline MemoryRegionSection
|
||||
section_from_flat_range(FlatRange *fr, AddressSpace *as)
|
||||
section_from_flat_range(FlatRange *fr, FlatView *fv)
|
||||
{
|
||||
MemoryRegionSection s = {0};
|
||||
s.mr = fr->mr;
|
||||
s.address_space = as;
|
||||
s.fv = fv;
|
||||
s.offset_within_region = fr->offset_in_region;
|
||||
s.size = fr->addr.size;
|
||||
s.offset_within_address_space = int128_get64(fr->addr.start);
|
||||
|
@ -342,7 +342,7 @@ static void flatview_unref(FlatView *view)
|
|||
}
|
||||
}
|
||||
|
||||
static FlatView *address_space_to_flatview(AddressSpace *as)
|
||||
FlatView *address_space_to_flatview(AddressSpace *as)
|
||||
{
|
||||
// Unicorn: atomic_read used instead of atomic_rcu_read
|
||||
return atomic_read(&as->current_map);
|
||||
|
@ -784,8 +784,8 @@ static void address_space_update_topology(AddressSpace *as)
|
|||
new_view->dispatch = mem_begin(as);
|
||||
for (i = 0; i < new_view->nr; i++) {
|
||||
MemoryRegionSection mrs =
|
||||
section_from_flat_range(&new_view->ranges[i], as);
|
||||
mem_add(as, new_view, &mrs);
|
||||
section_from_flat_range(&new_view->ranges[i], new_view);
|
||||
mem_add(new_view, &mrs);
|
||||
}
|
||||
mem_commit(new_view->dispatch);
|
||||
|
||||
|
@ -1678,8 +1678,7 @@ static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
|
|||
}
|
||||
range = addrrange_make(int128_make64(addr), int128_make64(size));
|
||||
|
||||
// Unicorn: Uses atomic_read instead of atomic_rcu_read
|
||||
view = atomic_read(&as->current_map);
|
||||
view = address_space_to_flatview(as);
|
||||
fr = flatview_lookup(view, range);
|
||||
if (!fr) {
|
||||
return ret;
|
||||
|
@ -1690,7 +1689,7 @@ static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
|
|||
}
|
||||
|
||||
ret.mr = fr->mr;
|
||||
ret.address_space = as;
|
||||
ret.fv = view;
|
||||
range = addrrange_intersection(range, fr->addr);
|
||||
ret.offset_within_region = fr->offset_in_region;
|
||||
ret.offset_within_region += int128_get64(int128_sub(range.start,
|
||||
|
@ -1747,7 +1746,7 @@ static QEMU_UNUSED_FUNC void listener_add_address_space(MemoryListener *listener
|
|||
FOR_EACH_FLAT_RANGE(fr, view) {
|
||||
MemoryRegionSection section = MemoryRegionSection_make(
|
||||
fr->mr,
|
||||
as,
|
||||
view,
|
||||
fr->offset_in_region,
|
||||
fr->addr.size,
|
||||
int128_get64(fr->addr.start),
|
||||
|
|
|
@ -82,9 +82,6 @@
|
|||
#define address_space_lduw_le_cached address_space_lduw_le_cached_mips
|
||||
#define address_space_lookup_region address_space_lookup_region_mips
|
||||
#define address_space_map address_space_map_mips
|
||||
#define address_space_read address_space_read_mips
|
||||
#define address_space_read_continue address_space_read_continue_mips
|
||||
#define address_space_read_full address_space_read_full_mips
|
||||
#define address_space_rw address_space_rw_mips
|
||||
#define address_space_stb address_space_stb_mips
|
||||
#define address_space_stb_cached address_space_stb_cached_mips
|
||||
|
@ -109,7 +106,7 @@
|
|||
#define address_space_stw_le address_space_stw_le_mips
|
||||
#define address_space_stw_le_cached address_space_stw_le_cached_mips
|
||||
#define address_space_to_dispatch address_space_to_dispatch_mips
|
||||
#define address_space_translate address_space_translate_mips
|
||||
#define address_space_to_flatview address_space_to_flatview_mips
|
||||
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_mips
|
||||
#define address_space_translate_internal address_space_translate_internal_mips
|
||||
#define address_space_unmap address_space_unmap_mips
|
||||
|
@ -450,9 +447,13 @@
|
|||
#define flatview_init flatview_init_mips
|
||||
#define flatview_insert flatview_insert_mips
|
||||
#define flatview_lookup flatview_lookup_mips
|
||||
#define flatview_read flatview_read_mips
|
||||
#define flatview_read_continue flatview_read_continue_mips
|
||||
#define flatview_read_full flatview_read_full_mips
|
||||
#define flatview_ref flatview_ref_mips
|
||||
#define flatview_simplify flatview_simplify_mips
|
||||
#define flatview_to_dispatch flatview_to_dispatch_mips
|
||||
#define flatview_translate flatview_translate_mips
|
||||
#define flatview_unref flatview_unref_mips
|
||||
#define float128ToCommonNaN float128ToCommonNaN_mips
|
||||
#define float128_add float128_add_mips
|
||||
|
|
|
@ -82,9 +82,6 @@
|
|||
#define address_space_lduw_le_cached address_space_lduw_le_cached_mips64
|
||||
#define address_space_lookup_region address_space_lookup_region_mips64
|
||||
#define address_space_map address_space_map_mips64
|
||||
#define address_space_read address_space_read_mips64
|
||||
#define address_space_read_continue address_space_read_continue_mips64
|
||||
#define address_space_read_full address_space_read_full_mips64
|
||||
#define address_space_rw address_space_rw_mips64
|
||||
#define address_space_stb address_space_stb_mips64
|
||||
#define address_space_stb_cached address_space_stb_cached_mips64
|
||||
|
@ -109,7 +106,7 @@
|
|||
#define address_space_stw_le address_space_stw_le_mips64
|
||||
#define address_space_stw_le_cached address_space_stw_le_cached_mips64
|
||||
#define address_space_to_dispatch address_space_to_dispatch_mips64
|
||||
#define address_space_translate address_space_translate_mips64
|
||||
#define address_space_to_flatview address_space_to_flatview_mips64
|
||||
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_mips64
|
||||
#define address_space_translate_internal address_space_translate_internal_mips64
|
||||
#define address_space_unmap address_space_unmap_mips64
|
||||
|
@ -450,9 +447,13 @@
|
|||
#define flatview_init flatview_init_mips64
|
||||
#define flatview_insert flatview_insert_mips64
|
||||
#define flatview_lookup flatview_lookup_mips64
|
||||
#define flatview_read flatview_read_mips64
|
||||
#define flatview_read_continue flatview_read_continue_mips64
|
||||
#define flatview_read_full flatview_read_full_mips64
|
||||
#define flatview_ref flatview_ref_mips64
|
||||
#define flatview_simplify flatview_simplify_mips64
|
||||
#define flatview_to_dispatch flatview_to_dispatch_mips64
|
||||
#define flatview_translate flatview_translate_mips64
|
||||
#define flatview_unref flatview_unref_mips64
|
||||
#define float128ToCommonNaN float128ToCommonNaN_mips64
|
||||
#define float128_add float128_add_mips64
|
||||
|
|
|
@ -82,9 +82,6 @@
|
|||
#define address_space_lduw_le_cached address_space_lduw_le_cached_mips64el
|
||||
#define address_space_lookup_region address_space_lookup_region_mips64el
|
||||
#define address_space_map address_space_map_mips64el
|
||||
#define address_space_read address_space_read_mips64el
|
||||
#define address_space_read_continue address_space_read_continue_mips64el
|
||||
#define address_space_read_full address_space_read_full_mips64el
|
||||
#define address_space_rw address_space_rw_mips64el
|
||||
#define address_space_stb address_space_stb_mips64el
|
||||
#define address_space_stb_cached address_space_stb_cached_mips64el
|
||||
|
@ -109,7 +106,7 @@
|
|||
#define address_space_stw_le address_space_stw_le_mips64el
|
||||
#define address_space_stw_le_cached address_space_stw_le_cached_mips64el
|
||||
#define address_space_to_dispatch address_space_to_dispatch_mips64el
|
||||
#define address_space_translate address_space_translate_mips64el
|
||||
#define address_space_to_flatview address_space_to_flatview_mips64el
|
||||
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_mips64el
|
||||
#define address_space_translate_internal address_space_translate_internal_mips64el
|
||||
#define address_space_unmap address_space_unmap_mips64el
|
||||
|
@ -450,9 +447,13 @@
|
|||
#define flatview_init flatview_init_mips64el
|
||||
#define flatview_insert flatview_insert_mips64el
|
||||
#define flatview_lookup flatview_lookup_mips64el
|
||||
#define flatview_read flatview_read_mips64el
|
||||
#define flatview_read_continue flatview_read_continue_mips64el
|
||||
#define flatview_read_full flatview_read_full_mips64el
|
||||
#define flatview_ref flatview_ref_mips64el
|
||||
#define flatview_simplify flatview_simplify_mips64el
|
||||
#define flatview_to_dispatch flatview_to_dispatch_mips64el
|
||||
#define flatview_translate flatview_translate_mips64el
|
||||
#define flatview_unref flatview_unref_mips64el
|
||||
#define float128ToCommonNaN float128ToCommonNaN_mips64el
|
||||
#define float128_add float128_add_mips64el
|
||||
|
|
|
@ -82,9 +82,6 @@
|
|||
#define address_space_lduw_le_cached address_space_lduw_le_cached_mipsel
|
||||
#define address_space_lookup_region address_space_lookup_region_mipsel
|
||||
#define address_space_map address_space_map_mipsel
|
||||
#define address_space_read address_space_read_mipsel
|
||||
#define address_space_read_continue address_space_read_continue_mipsel
|
||||
#define address_space_read_full address_space_read_full_mipsel
|
||||
#define address_space_rw address_space_rw_mipsel
|
||||
#define address_space_stb address_space_stb_mipsel
|
||||
#define address_space_stb_cached address_space_stb_cached_mipsel
|
||||
|
@ -109,7 +106,7 @@
|
|||
#define address_space_stw_le address_space_stw_le_mipsel
|
||||
#define address_space_stw_le_cached address_space_stw_le_cached_mipsel
|
||||
#define address_space_to_dispatch address_space_to_dispatch_mipsel
|
||||
#define address_space_translate address_space_translate_mipsel
|
||||
#define address_space_to_flatview address_space_to_flatview_mipsel
|
||||
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_mipsel
|
||||
#define address_space_translate_internal address_space_translate_internal_mipsel
|
||||
#define address_space_unmap address_space_unmap_mipsel
|
||||
|
@ -450,9 +447,13 @@
|
|||
#define flatview_init flatview_init_mipsel
|
||||
#define flatview_insert flatview_insert_mipsel
|
||||
#define flatview_lookup flatview_lookup_mipsel
|
||||
#define flatview_read flatview_read_mipsel
|
||||
#define flatview_read_continue flatview_read_continue_mipsel
|
||||
#define flatview_read_full flatview_read_full_mipsel
|
||||
#define flatview_ref flatview_ref_mipsel
|
||||
#define flatview_simplify flatview_simplify_mipsel
|
||||
#define flatview_to_dispatch flatview_to_dispatch_mipsel
|
||||
#define flatview_translate flatview_translate_mipsel
|
||||
#define flatview_unref flatview_unref_mipsel
|
||||
#define float128ToCommonNaN float128ToCommonNaN_mipsel
|
||||
#define float128_add float128_add_mipsel
|
||||
|
|
|
@ -82,9 +82,6 @@
|
|||
#define address_space_lduw_le_cached address_space_lduw_le_cached_powerpc
|
||||
#define address_space_lookup_region address_space_lookup_region_powerpc
|
||||
#define address_space_map address_space_map_powerpc
|
||||
#define address_space_read address_space_read_powerpc
|
||||
#define address_space_read_continue address_space_read_continue_powerpc
|
||||
#define address_space_read_full address_space_read_full_powerpc
|
||||
#define address_space_rw address_space_rw_powerpc
|
||||
#define address_space_stb address_space_stb_powerpc
|
||||
#define address_space_stb_cached address_space_stb_cached_powerpc
|
||||
|
@ -109,7 +106,7 @@
|
|||
#define address_space_stw_le address_space_stw_le_powerpc
|
||||
#define address_space_stw_le_cached address_space_stw_le_cached_powerpc
|
||||
#define address_space_to_dispatch address_space_to_dispatch_powerpc
|
||||
#define address_space_translate address_space_translate_powerpc
|
||||
#define address_space_to_flatview address_space_to_flatview_powerpc
|
||||
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_powerpc
|
||||
#define address_space_translate_internal address_space_translate_internal_powerpc
|
||||
#define address_space_unmap address_space_unmap_powerpc
|
||||
|
@ -450,9 +447,13 @@
|
|||
#define flatview_init flatview_init_powerpc
|
||||
#define flatview_insert flatview_insert_powerpc
|
||||
#define flatview_lookup flatview_lookup_powerpc
|
||||
#define flatview_read flatview_read_powerpc
|
||||
#define flatview_read_continue flatview_read_continue_powerpc
|
||||
#define flatview_read_full flatview_read_full_powerpc
|
||||
#define flatview_ref flatview_ref_powerpc
|
||||
#define flatview_simplify flatview_simplify_powerpc
|
||||
#define flatview_to_dispatch flatview_to_dispatch_powerpc
|
||||
#define flatview_translate flatview_translate_powerpc
|
||||
#define flatview_unref flatview_unref_powerpc
|
||||
#define float128ToCommonNaN float128ToCommonNaN_powerpc
|
||||
#define float128_add float128_add_powerpc
|
||||
|
|
|
@ -82,9 +82,6 @@
|
|||
#define address_space_lduw_le_cached address_space_lduw_le_cached_sparc
|
||||
#define address_space_lookup_region address_space_lookup_region_sparc
|
||||
#define address_space_map address_space_map_sparc
|
||||
#define address_space_read address_space_read_sparc
|
||||
#define address_space_read_continue address_space_read_continue_sparc
|
||||
#define address_space_read_full address_space_read_full_sparc
|
||||
#define address_space_rw address_space_rw_sparc
|
||||
#define address_space_stb address_space_stb_sparc
|
||||
#define address_space_stb_cached address_space_stb_cached_sparc
|
||||
|
@ -109,7 +106,7 @@
|
|||
#define address_space_stw_le address_space_stw_le_sparc
|
||||
#define address_space_stw_le_cached address_space_stw_le_cached_sparc
|
||||
#define address_space_to_dispatch address_space_to_dispatch_sparc
|
||||
#define address_space_translate address_space_translate_sparc
|
||||
#define address_space_to_flatview address_space_to_flatview_sparc
|
||||
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_sparc
|
||||
#define address_space_translate_internal address_space_translate_internal_sparc
|
||||
#define address_space_unmap address_space_unmap_sparc
|
||||
|
@ -450,9 +447,13 @@
|
|||
#define flatview_init flatview_init_sparc
|
||||
#define flatview_insert flatview_insert_sparc
|
||||
#define flatview_lookup flatview_lookup_sparc
|
||||
#define flatview_read flatview_read_sparc
|
||||
#define flatview_read_continue flatview_read_continue_sparc
|
||||
#define flatview_read_full flatview_read_full_sparc
|
||||
#define flatview_ref flatview_ref_sparc
|
||||
#define flatview_simplify flatview_simplify_sparc
|
||||
#define flatview_to_dispatch flatview_to_dispatch_sparc
|
||||
#define flatview_translate flatview_translate_sparc
|
||||
#define flatview_unref flatview_unref_sparc
|
||||
#define float128ToCommonNaN float128ToCommonNaN_sparc
|
||||
#define float128_add float128_add_sparc
|
||||
|
|
|
@ -82,9 +82,6 @@
|
|||
#define address_space_lduw_le_cached address_space_lduw_le_cached_sparc64
|
||||
#define address_space_lookup_region address_space_lookup_region_sparc64
|
||||
#define address_space_map address_space_map_sparc64
|
||||
#define address_space_read address_space_read_sparc64
|
||||
#define address_space_read_continue address_space_read_continue_sparc64
|
||||
#define address_space_read_full address_space_read_full_sparc64
|
||||
#define address_space_rw address_space_rw_sparc64
|
||||
#define address_space_stb address_space_stb_sparc64
|
||||
#define address_space_stb_cached address_space_stb_cached_sparc64
|
||||
|
@ -109,7 +106,7 @@
|
|||
#define address_space_stw_le address_space_stw_le_sparc64
|
||||
#define address_space_stw_le_cached address_space_stw_le_cached_sparc64
|
||||
#define address_space_to_dispatch address_space_to_dispatch_sparc64
|
||||
#define address_space_translate address_space_translate_sparc64
|
||||
#define address_space_to_flatview address_space_to_flatview_sparc64
|
||||
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_sparc64
|
||||
#define address_space_translate_internal address_space_translate_internal_sparc64
|
||||
#define address_space_unmap address_space_unmap_sparc64
|
||||
|
@ -450,9 +447,13 @@
|
|||
#define flatview_init flatview_init_sparc64
|
||||
#define flatview_insert flatview_insert_sparc64
|
||||
#define flatview_lookup flatview_lookup_sparc64
|
||||
#define flatview_read flatview_read_sparc64
|
||||
#define flatview_read_continue flatview_read_continue_sparc64
|
||||
#define flatview_read_full flatview_read_full_sparc64
|
||||
#define flatview_ref flatview_ref_sparc64
|
||||
#define flatview_simplify flatview_simplify_sparc64
|
||||
#define flatview_to_dispatch flatview_to_dispatch_sparc64
|
||||
#define flatview_translate flatview_translate_sparc64
|
||||
#define flatview_unref flatview_unref_sparc64
|
||||
#define float128ToCommonNaN float128ToCommonNaN_sparc64
|
||||
#define float128_add float128_add_sparc64
|
||||
|
|
|
@ -82,9 +82,6 @@
|
|||
#define address_space_lduw_le_cached address_space_lduw_le_cached_x86_64
|
||||
#define address_space_lookup_region address_space_lookup_region_x86_64
|
||||
#define address_space_map address_space_map_x86_64
|
||||
#define address_space_read address_space_read_x86_64
|
||||
#define address_space_read_continue address_space_read_continue_x86_64
|
||||
#define address_space_read_full address_space_read_full_x86_64
|
||||
#define address_space_rw address_space_rw_x86_64
|
||||
#define address_space_stb address_space_stb_x86_64
|
||||
#define address_space_stb_cached address_space_stb_cached_x86_64
|
||||
|
@ -109,7 +106,7 @@
|
|||
#define address_space_stw_le address_space_stw_le_x86_64
|
||||
#define address_space_stw_le_cached address_space_stw_le_cached_x86_64
|
||||
#define address_space_to_dispatch address_space_to_dispatch_x86_64
|
||||
#define address_space_translate address_space_translate_x86_64
|
||||
#define address_space_to_flatview address_space_to_flatview_x86_64
|
||||
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_x86_64
|
||||
#define address_space_translate_internal address_space_translate_internal_x86_64
|
||||
#define address_space_unmap address_space_unmap_x86_64
|
||||
|
@ -450,9 +447,13 @@
|
|||
#define flatview_init flatview_init_x86_64
|
||||
#define flatview_insert flatview_insert_x86_64
|
||||
#define flatview_lookup flatview_lookup_x86_64
|
||||
#define flatview_read flatview_read_x86_64
|
||||
#define flatview_read_continue flatview_read_continue_x86_64
|
||||
#define flatview_read_full flatview_read_full_x86_64
|
||||
#define flatview_ref flatview_ref_x86_64
|
||||
#define flatview_simplify flatview_simplify_x86_64
|
||||
#define flatview_to_dispatch flatview_to_dispatch_x86_64
|
||||
#define flatview_translate flatview_translate_x86_64
|
||||
#define flatview_unref flatview_unref_x86_64
|
||||
#define float128ToCommonNaN float128ToCommonNaN_x86_64
|
||||
#define float128_add float128_add_x86_64
|
||||
|
|
Loading…
Reference in a new issue