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target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
This bug was introduced in: commit 5ecdd3e47cadae83a62dc92b472f1fe163b56f59 target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER Backports commit 62c7ec3488fe0dcbabffd543f458914e27736115 from qemu
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@ -5134,17 +5134,17 @@ void register_cp_regs_for_features(ARMCPU *cpu)
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char *pmevtyper_name = g_strdup_printf("PMEVTYPER%d", i);
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char *pmevtyper_el0_name = g_strdup_printf("PMEVTYPER%d_EL0", i);
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ARMCPRegInfo pmev_regs[] = {
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{ pmevcntr_name, 15, 15, 8 | (3 & (i >> 3)), 0,0,i & 7,
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{ pmevcntr_name, 15, 14, 8 | (3 & (i >> 3)), 0,0,i & 7,
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0, ARM_CP_IO | ARM_CP_ALIAS, PL0_RW, 0, NULL, 0, 0, {0, 0},
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pmreg_access, pmevcntr_readfn, pmevcntr_writefn },
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{ pmevcntr_el0_name, 0,15, 8 | (3 & (i >> 3)), 3,3,i & 7,
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{ pmevcntr_el0_name, 0,14, 8 | (3 & (i >> 3)), 3,3,i & 7,
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ARM_CP_STATE_AA64, ARM_CP_IO, PL0_RW, 0, NULL, 0, 0, {0, 0},
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pmreg_access, pmevcntr_readfn, pmevcntr_writefn,
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pmevcntr_rawread, pmevcntr_rawwrite },
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{ pmevtyper_name, 15,15,12 | (3 & (i >> 3)), 0,0,i & 7,
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{ pmevtyper_name, 15,14,12 | (3 & (i >> 3)), 0,0,i & 7,
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0, ARM_CP_IO | ARM_CP_ALIAS, PL0_RW, 0, NULL, 0, 0, {0, 0},
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pmreg_access, pmevtyper_readfn, pmevtyper_writefn },
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{ pmevtyper_el0_name, 0,15,12 | (3 & (i >> 3)), 3,3,i & 7,
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{ pmevtyper_el0_name, 0,14,12 | (3 & (i >> 3)), 3,3,i & 7,
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ARM_CP_STATE_AA64, ARM_CP_IO, PL0_RW, 0, NULL, 0, 0, {0, 0},
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pmreg_access, pmevtyper_readfn, pmevtyper_writefn, NULL,
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pmevtyper_rawwrite },
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