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target/arm: Fix aa64 ldp register writeback
Backports commit 3e4d91b94ce400326fae0850578d9e9f30a71adb from qemu
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37cdcbf771
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afb67fc002
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@ -1986,29 +1986,34 @@ static void disas_ldst_pair(DisasContext *s, uint32_t insn)
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} else {
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do_fp_st(s, rt, tcg_addr, size);
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}
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} else {
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TCGv_i64 tcg_rt = cpu_reg(s, rt);
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if (is_load) {
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do_gpr_ld(s, tcg_rt, tcg_addr, size, is_signed, false);
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} else {
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do_gpr_st(s, tcg_rt, tcg_addr, size);
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}
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}
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tcg_gen_addi_i64(tcg_ctx, tcg_addr, tcg_addr, 1ULL << size);
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if (is_vector) {
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tcg_gen_addi_i64(tcg_ctx, tcg_addr, tcg_addr, 1 << size);
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if (is_load) {
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do_fp_ld(s, rt2, tcg_addr, size);
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} else {
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do_fp_st(s, rt2, tcg_addr, size);
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}
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} else {
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TCGv_i64 tcg_rt = cpu_reg(s, rt);
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TCGv_i64 tcg_rt2 = cpu_reg(s, rt2);
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if (is_load) {
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TCGv_i64 tmp = tcg_temp_new_i64(tcg_ctx);
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/* Do not modify tcg_rt before recognizing any exception
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* from the second load.
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*/
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do_gpr_ld(s, tmp, tcg_addr, size, is_signed, false);
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tcg_gen_addi_i64(tcg_ctx, tcg_addr, tcg_addr, 1 << size);
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do_gpr_ld(s, tcg_rt2, tcg_addr, size, is_signed, false);
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tcg_gen_mov_i64(tcg_ctx, tcg_rt, tmp);
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tcg_temp_free_i64(tcg_ctx, tmp);
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} else {
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do_gpr_st(s, tcg_rt, tcg_addr, size);
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tcg_gen_addi_i64(tcg_ctx, tcg_addr, tcg_addr, 1 << size);
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do_gpr_st(s, tcg_rt2, tcg_addr, size);
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}
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}
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}
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if (wback) {
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if (postindex) {
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