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target/arm: Vectorize integer comparison vs zero

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These instructions are often used in glibc's string routines.
They were the final uses of the 32-bit at a time neon helpers.

Backports commit 6b375d3546b009d1e63e07397ec9c6af256e15e9 from qemu
This commit is contained in:
Richard Henderson 2020-04-30 21:13:56 -04:00 committed by Lioncash
parent bc097bd2ae
commit b26b4c06cd
22 changed files with 478 additions and 363 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

30
qemu/aarch64.h
View file

@ -1131,6 +1131,16 @@
#define helper_gvec_andc helper_gvec_andc_aarch64
#define helper_gvec_ands helper_gvec_ands_aarch64
#define helper_gvec_bitsel helper_gvec_bitsel_aarch64
#define helper_gvec_ceq0_b helper_gvec_ceq0_b_aarch64
#define helper_gvec_ceq0_h helper_gvec_ceq0_h_aarch64
#define helper_gvec_cge0_b helper_gvec_cge0_b_aarch64
#define helper_gvec_cge0_h helper_gvec_cge0_h_aarch64
#define helper_gvec_cgt0_b helper_gvec_cgt0_b_aarch64
#define helper_gvec_cgt0_h helper_gvec_cgt0_h_aarch64
#define helper_gvec_cle0_b helper_gvec_cle0_b_aarch64
#define helper_gvec_cle0_h helper_gvec_cle0_h_aarch64
#define helper_gvec_clt0_b helper_gvec_clt0_b_aarch64
#define helper_gvec_clt0_h helper_gvec_clt0_h_aarch64
#define helper_gvec_dup8 helper_gvec_dup8_aarch64
#define helper_gvec_dup16 helper_gvec_dup16_aarch64
#define helper_gvec_dup32 helper_gvec_dup32_aarch64
@ -1478,23 +1488,8 @@
#define helper_neon_addl_u16 helper_neon_addl_u16_aarch64
#define helper_neon_addl_u32 helper_neon_addl_u32_aarch64
#define helper_neon_ceq_f32 helper_neon_ceq_f32_aarch64
#define helper_neon_ceq_u16 helper_neon_ceq_u16_aarch64
#define helper_neon_ceq_u32 helper_neon_ceq_u32_aarch64
#define helper_neon_ceq_u8 helper_neon_ceq_u8_aarch64
#define helper_neon_cge_f32 helper_neon_cge_f32_aarch64
#define helper_neon_cge_s16 helper_neon_cge_s16_aarch64
#define helper_neon_cge_s32 helper_neon_cge_s32_aarch64
#define helper_neon_cge_s8 helper_neon_cge_s8_aarch64
#define helper_neon_cge_u16 helper_neon_cge_u16_aarch64
#define helper_neon_cge_u32 helper_neon_cge_u32_aarch64
#define helper_neon_cge_u8 helper_neon_cge_u8_aarch64
#define helper_neon_cgt_f32 helper_neon_cgt_f32_aarch64
#define helper_neon_cgt_s16 helper_neon_cgt_s16_aarch64
#define helper_neon_cgt_s32 helper_neon_cgt_s32_aarch64
#define helper_neon_cgt_s8 helper_neon_cgt_s8_aarch64
#define helper_neon_cgt_u16 helper_neon_cgt_u16_aarch64
#define helper_neon_cgt_u32 helper_neon_cgt_u32_aarch64
#define helper_neon_cgt_u8 helper_neon_cgt_u8_aarch64
#define helper_neon_cls_s16 helper_neon_cls_s16_aarch64
#define helper_neon_cls_s32 helper_neon_cls_s32_aarch64
#define helper_neon_cls_s8 helper_neon_cls_s8_aarch64
@ -3416,6 +3411,11 @@
#define bif_op bif_op_aarch64
#define bit_op bit_op_aarch64
#define bsl_op bsl_op_aarch64
#define ceq0_op ceq0_op_aarch64
#define cge0_op cge0_op_aarch64
#define cgt0_op cgt0_op_aarch64
#define cle0_op cle0_op_aarch64
#define clt0_op clt0_op_aarch64
#define cmtst_op cmtst_op_aarch64
#define cpu_mmu_index cpu_mmu_index_aarch64
#define cpu_reg cpu_reg_aarch64

30
qemu/aarch64eb.h
View file

@ -1131,6 +1131,16 @@
#define helper_gvec_andc helper_gvec_andc_aarch64eb
#define helper_gvec_ands helper_gvec_ands_aarch64eb
#define helper_gvec_bitsel helper_gvec_bitsel_aarch64eb
#define helper_gvec_ceq0_b helper_gvec_ceq0_b_aarch64eb
#define helper_gvec_ceq0_h helper_gvec_ceq0_h_aarch64eb
#define helper_gvec_cge0_b helper_gvec_cge0_b_aarch64eb
#define helper_gvec_cge0_h helper_gvec_cge0_h_aarch64eb
#define helper_gvec_cgt0_b helper_gvec_cgt0_b_aarch64eb
#define helper_gvec_cgt0_h helper_gvec_cgt0_h_aarch64eb
#define helper_gvec_cle0_b helper_gvec_cle0_b_aarch64eb
#define helper_gvec_cle0_h helper_gvec_cle0_h_aarch64eb
#define helper_gvec_clt0_b helper_gvec_clt0_b_aarch64eb
#define helper_gvec_clt0_h helper_gvec_clt0_h_aarch64eb
#define helper_gvec_dup8 helper_gvec_dup8_aarch64eb
#define helper_gvec_dup16 helper_gvec_dup16_aarch64eb
#define helper_gvec_dup32 helper_gvec_dup32_aarch64eb
@ -1478,23 +1488,8 @@
#define helper_neon_addl_u16 helper_neon_addl_u16_aarch64eb
#define helper_neon_addl_u32 helper_neon_addl_u32_aarch64eb
#define helper_neon_ceq_f32 helper_neon_ceq_f32_aarch64eb
#define helper_neon_ceq_u16 helper_neon_ceq_u16_aarch64eb
#define helper_neon_ceq_u32 helper_neon_ceq_u32_aarch64eb
#define helper_neon_ceq_u8 helper_neon_ceq_u8_aarch64eb
#define helper_neon_cge_f32 helper_neon_cge_f32_aarch64eb
#define helper_neon_cge_s16 helper_neon_cge_s16_aarch64eb
#define helper_neon_cge_s32 helper_neon_cge_s32_aarch64eb
#define helper_neon_cge_s8 helper_neon_cge_s8_aarch64eb
#define helper_neon_cge_u16 helper_neon_cge_u16_aarch64eb
#define helper_neon_cge_u32 helper_neon_cge_u32_aarch64eb
#define helper_neon_cge_u8 helper_neon_cge_u8_aarch64eb
#define helper_neon_cgt_f32 helper_neon_cgt_f32_aarch64eb
#define helper_neon_cgt_s16 helper_neon_cgt_s16_aarch64eb
#define helper_neon_cgt_s32 helper_neon_cgt_s32_aarch64eb
#define helper_neon_cgt_s8 helper_neon_cgt_s8_aarch64eb
#define helper_neon_cgt_u16 helper_neon_cgt_u16_aarch64eb
#define helper_neon_cgt_u32 helper_neon_cgt_u32_aarch64eb
#define helper_neon_cgt_u8 helper_neon_cgt_u8_aarch64eb
#define helper_neon_cls_s16 helper_neon_cls_s16_aarch64eb
#define helper_neon_cls_s32 helper_neon_cls_s32_aarch64eb
#define helper_neon_cls_s8 helper_neon_cls_s8_aarch64eb
@ -3416,6 +3411,11 @@
#define bif_op bif_op_aarch64eb
#define bit_op bit_op_aarch64eb
#define bsl_op bsl_op_aarch64eb
#define ceq0_op ceq0_op_aarch64eb
#define cge0_op cge0_op_aarch64eb
#define cgt0_op cgt0_op_aarch64eb
#define cle0_op cle0_op_aarch64eb
#define clt0_op clt0_op_aarch64eb
#define cmtst_op cmtst_op_aarch64eb
#define cpu_mmu_index cpu_mmu_index_aarch64eb
#define cpu_reg cpu_reg_aarch64eb

34
qemu/arm.h
View file

@ -1131,6 +1131,16 @@
#define helper_gvec_andc helper_gvec_andc_arm
#define helper_gvec_ands helper_gvec_ands_arm
#define helper_gvec_bitsel helper_gvec_bitsel_arm
#define helper_gvec_ceq0_b helper_gvec_ceq0_b_arm
#define helper_gvec_ceq0_h helper_gvec_ceq0_h_arm
#define helper_gvec_cge0_b helper_gvec_cge0_b_arm
#define helper_gvec_cge0_h helper_gvec_cge0_h_arm
#define helper_gvec_cgt0_b helper_gvec_cgt0_b_arm
#define helper_gvec_cgt0_h helper_gvec_cgt0_h_arm
#define helper_gvec_cle0_b helper_gvec_cle0_b_arm
#define helper_gvec_cle0_h helper_gvec_cle0_h_arm
#define helper_gvec_clt0_b helper_gvec_clt0_b_arm
#define helper_gvec_clt0_h helper_gvec_clt0_h_arm
#define helper_gvec_dup8 helper_gvec_dup8_arm
#define helper_gvec_dup16 helper_gvec_dup16_arm
#define helper_gvec_dup32 helper_gvec_dup32_arm
@ -1478,23 +1488,8 @@
#define helper_neon_addl_u16 helper_neon_addl_u16_arm
#define helper_neon_addl_u32 helper_neon_addl_u32_arm
#define helper_neon_ceq_f32 helper_neon_ceq_f32_arm
#define helper_neon_ceq_u16 helper_neon_ceq_u16_arm
#define helper_neon_ceq_u32 helper_neon_ceq_u32_arm
#define helper_neon_ceq_u8 helper_neon_ceq_u8_arm
#define helper_neon_cge_f32 helper_neon_cge_f32_arm
#define helper_neon_cge_s16 helper_neon_cge_s16_arm
#define helper_neon_cge_s32 helper_neon_cge_s32_arm
#define helper_neon_cge_s8 helper_neon_cge_s8_arm
#define helper_neon_cge_u16 helper_neon_cge_u16_arm
#define helper_neon_cge_u32 helper_neon_cge_u32_arm
#define helper_neon_cge_u8 helper_neon_cge_u8_arm
#define helper_neon_cgt_f32 helper_neon_cgt_f32_arm
#define helper_neon_cgt_s16 helper_neon_cgt_s16_arm
#define helper_neon_cgt_s32 helper_neon_cgt_s32_arm
#define helper_neon_cgt_s8 helper_neon_cgt_s8_arm
#define helper_neon_cgt_u16 helper_neon_cgt_u16_arm
#define helper_neon_cgt_u32 helper_neon_cgt_u32_arm
#define helper_neon_cgt_u8 helper_neon_cgt_u8_arm
#define helper_neon_cls_s16 helper_neon_cls_s16_arm
#define helper_neon_cls_s32 helper_neon_cls_s32_arm
#define helper_neon_cls_s8 helper_neon_cls_s8_arm
@ -3405,11 +3400,20 @@
#define arm_set_cpu_off arm_set_cpu_off_arm
#define arm_set_cpu_on arm_set_cpu_on_arm
#define arm_stage1_mmu_idx arm_stage1_mmu_idx_arm
#define ceq0_op ceq0_op_arm
#define cge0_op cge0_op_arm
#define cgt0_op cgt0_op_arm
#define cle0_op cle0_op_arm
#define clt0_op clt0_op_arm
#define cmtst_op cmtst_op_arm
#define cpu_mmu_index cpu_mmu_index_arm
#define fp_exception_el fp_exception_el_arm
#define gen_cmtst_i64 gen_cmtst_i64_arm
#define get_phys_addr get_phys_addr_arm
#define gen_sshl_i32 gen_sshl_i32_arm
#define gen_sshl_i64 gen_sshl_i64_arm
#define gen_ushl_i32 gen_ushl_i32_arm
#define gen_ushl_i64 gen_ushl_i64_arm
#define helper_fjcvtzs helper_fjcvtzs_arm
#define helper_vjcvt helper_vjcvt_arm
#define pmu_init pmu_init_arm

34
qemu/armeb.h
View file

@ -1131,6 +1131,16 @@
#define helper_gvec_andc helper_gvec_andc_armeb
#define helper_gvec_ands helper_gvec_ands_armeb
#define helper_gvec_bitsel helper_gvec_bitsel_armeb
#define helper_gvec_ceq0_b helper_gvec_ceq0_b_armeb
#define helper_gvec_ceq0_h helper_gvec_ceq0_h_armeb
#define helper_gvec_cge0_b helper_gvec_cge0_b_armeb
#define helper_gvec_cge0_h helper_gvec_cge0_h_armeb
#define helper_gvec_cgt0_b helper_gvec_cgt0_b_armeb
#define helper_gvec_cgt0_h helper_gvec_cgt0_h_armeb
#define helper_gvec_cle0_b helper_gvec_cle0_b_armeb
#define helper_gvec_cle0_h helper_gvec_cle0_h_armeb
#define helper_gvec_clt0_b helper_gvec_clt0_b_armeb
#define helper_gvec_clt0_h helper_gvec_clt0_h_armeb
#define helper_gvec_dup8 helper_gvec_dup8_armeb
#define helper_gvec_dup16 helper_gvec_dup16_armeb
#define helper_gvec_dup32 helper_gvec_dup32_armeb
@ -1478,23 +1488,8 @@
#define helper_neon_addl_u16 helper_neon_addl_u16_armeb
#define helper_neon_addl_u32 helper_neon_addl_u32_armeb
#define helper_neon_ceq_f32 helper_neon_ceq_f32_armeb
#define helper_neon_ceq_u16 helper_neon_ceq_u16_armeb
#define helper_neon_ceq_u32 helper_neon_ceq_u32_armeb
#define helper_neon_ceq_u8 helper_neon_ceq_u8_armeb
#define helper_neon_cge_f32 helper_neon_cge_f32_armeb
#define helper_neon_cge_s16 helper_neon_cge_s16_armeb
#define helper_neon_cge_s32 helper_neon_cge_s32_armeb
#define helper_neon_cge_s8 helper_neon_cge_s8_armeb
#define helper_neon_cge_u16 helper_neon_cge_u16_armeb
#define helper_neon_cge_u32 helper_neon_cge_u32_armeb
#define helper_neon_cge_u8 helper_neon_cge_u8_armeb
#define helper_neon_cgt_f32 helper_neon_cgt_f32_armeb
#define helper_neon_cgt_s16 helper_neon_cgt_s16_armeb
#define helper_neon_cgt_s32 helper_neon_cgt_s32_armeb
#define helper_neon_cgt_s8 helper_neon_cgt_s8_armeb
#define helper_neon_cgt_u16 helper_neon_cgt_u16_armeb
#define helper_neon_cgt_u32 helper_neon_cgt_u32_armeb
#define helper_neon_cgt_u8 helper_neon_cgt_u8_armeb
#define helper_neon_cls_s16 helper_neon_cls_s16_armeb
#define helper_neon_cls_s32 helper_neon_cls_s32_armeb
#define helper_neon_cls_s8 helper_neon_cls_s8_armeb
@ -3405,11 +3400,20 @@
#define arm_set_cpu_off arm_set_cpu_off_armeb
#define arm_set_cpu_on arm_set_cpu_on_armeb
#define arm_stage1_mmu_idx arm_stage1_mmu_idx_armeb
#define ceq0_op ceq0_op_armeb
#define cge0_op cge0_op_armeb
#define cgt0_op cgt0_op_armeb
#define cle0_op cle0_op_armeb
#define clt0_op clt0_op_armeb
#define cmtst_op cmtst_op_armeb
#define cpu_mmu_index cpu_mmu_index_armeb
#define fp_exception_el fp_exception_el_armeb
#define gen_cmtst_i64 gen_cmtst_i64_armeb
#define get_phys_addr get_phys_addr_armeb
#define gen_sshl_i32 gen_sshl_i32_armeb
#define gen_sshl_i64 gen_sshl_i64_armeb
#define gen_ushl_i32 gen_ushl_i32_armeb
#define gen_ushl_i64 gen_ushl_i64_armeb
#define helper_fjcvtzs helper_fjcvtzs_armeb
#define helper_vjcvt helper_vjcvt_armeb
#define pmu_init pmu_init_armeb

35
qemu/header_gen.py
View file

@ -1137,6 +1137,16 @@ symbols = (
'helper_gvec_andc',
'helper_gvec_ands',
'helper_gvec_bitsel',
'helper_gvec_ceq0_b',
'helper_gvec_ceq0_h',
'helper_gvec_cge0_b',
'helper_gvec_cge0_h',
'helper_gvec_cgt0_b',
'helper_gvec_cgt0_h',
'helper_gvec_cle0_b',
'helper_gvec_cle0_h',
'helper_gvec_clt0_b',
'helper_gvec_clt0_h',
'helper_gvec_dup8',
'helper_gvec_dup16',
'helper_gvec_dup32',
@ -1484,23 +1494,8 @@ symbols = (
'helper_neon_addl_u16',
'helper_neon_addl_u32',
'helper_neon_ceq_f32',
'helper_neon_ceq_u16',
'helper_neon_ceq_u32',
'helper_neon_ceq_u8',
'helper_neon_cge_f32',
'helper_neon_cge_s16',
'helper_neon_cge_s32',
'helper_neon_cge_s8',
'helper_neon_cge_u16',
'helper_neon_cge_u32',
'helper_neon_cge_u8',
'helper_neon_cgt_f32',
'helper_neon_cgt_s16',
'helper_neon_cgt_s32',
'helper_neon_cgt_s8',
'helper_neon_cgt_u16',
'helper_neon_cgt_u32',
'helper_neon_cgt_u8',
'helper_neon_cls_s16',
'helper_neon_cls_s32',
'helper_neon_cls_s8',
@ -3414,6 +3409,11 @@ arm_symbols = (
'arm_set_cpu_off',
'arm_set_cpu_on',
'arm_stage1_mmu_idx',
'ceq0_op',
'cge0_op',
'cgt0_op',
'cle0_op',
'clt0_op',
'cmtst_op',
'cpu_mmu_index',
'fp_exception_el',
@ -3482,6 +3482,11 @@ aarch64_symbols = (
'bif_op',
'bit_op',
'bsl_op',
'ceq0_op',
'cge0_op',
'cgt0_op',
'cle0_op',
'clt0_op',
'cmtst_op',
'cpu_mmu_index',
'cpu_reg',

25
qemu/m68k.h
View file

@ -1131,6 +1131,16 @@
#define helper_gvec_andc helper_gvec_andc_m68k
#define helper_gvec_ands helper_gvec_ands_m68k
#define helper_gvec_bitsel helper_gvec_bitsel_m68k
#define helper_gvec_ceq0_b helper_gvec_ceq0_b_m68k
#define helper_gvec_ceq0_h helper_gvec_ceq0_h_m68k
#define helper_gvec_cge0_b helper_gvec_cge0_b_m68k
#define helper_gvec_cge0_h helper_gvec_cge0_h_m68k
#define helper_gvec_cgt0_b helper_gvec_cgt0_b_m68k
#define helper_gvec_cgt0_h helper_gvec_cgt0_h_m68k
#define helper_gvec_cle0_b helper_gvec_cle0_b_m68k
#define helper_gvec_cle0_h helper_gvec_cle0_h_m68k
#define helper_gvec_clt0_b helper_gvec_clt0_b_m68k
#define helper_gvec_clt0_h helper_gvec_clt0_h_m68k
#define helper_gvec_dup8 helper_gvec_dup8_m68k
#define helper_gvec_dup16 helper_gvec_dup16_m68k
#define helper_gvec_dup32 helper_gvec_dup32_m68k
@ -1478,23 +1488,8 @@
#define helper_neon_addl_u16 helper_neon_addl_u16_m68k
#define helper_neon_addl_u32 helper_neon_addl_u32_m68k
#define helper_neon_ceq_f32 helper_neon_ceq_f32_m68k
#define helper_neon_ceq_u16 helper_neon_ceq_u16_m68k
#define helper_neon_ceq_u32 helper_neon_ceq_u32_m68k
#define helper_neon_ceq_u8 helper_neon_ceq_u8_m68k
#define helper_neon_cge_f32 helper_neon_cge_f32_m68k
#define helper_neon_cge_s16 helper_neon_cge_s16_m68k
#define helper_neon_cge_s32 helper_neon_cge_s32_m68k
#define helper_neon_cge_s8 helper_neon_cge_s8_m68k
#define helper_neon_cge_u16 helper_neon_cge_u16_m68k
#define helper_neon_cge_u32 helper_neon_cge_u32_m68k
#define helper_neon_cge_u8 helper_neon_cge_u8_m68k
#define helper_neon_cgt_f32 helper_neon_cgt_f32_m68k
#define helper_neon_cgt_s16 helper_neon_cgt_s16_m68k
#define helper_neon_cgt_s32 helper_neon_cgt_s32_m68k
#define helper_neon_cgt_s8 helper_neon_cgt_s8_m68k
#define helper_neon_cgt_u16 helper_neon_cgt_u16_m68k
#define helper_neon_cgt_u32 helper_neon_cgt_u32_m68k
#define helper_neon_cgt_u8 helper_neon_cgt_u8_m68k
#define helper_neon_cls_s16 helper_neon_cls_s16_m68k
#define helper_neon_cls_s32 helper_neon_cls_s32_m68k
#define helper_neon_cls_s8 helper_neon_cls_s8_m68k

25
qemu/mips.h
View file

@ -1131,6 +1131,16 @@
#define helper_gvec_andc helper_gvec_andc_mips
#define helper_gvec_ands helper_gvec_ands_mips
#define helper_gvec_bitsel helper_gvec_bitsel_mips
#define helper_gvec_ceq0_b helper_gvec_ceq0_b_mips
#define helper_gvec_ceq0_h helper_gvec_ceq0_h_mips
#define helper_gvec_cge0_b helper_gvec_cge0_b_mips
#define helper_gvec_cge0_h helper_gvec_cge0_h_mips
#define helper_gvec_cgt0_b helper_gvec_cgt0_b_mips
#define helper_gvec_cgt0_h helper_gvec_cgt0_h_mips
#define helper_gvec_cle0_b helper_gvec_cle0_b_mips
#define helper_gvec_cle0_h helper_gvec_cle0_h_mips
#define helper_gvec_clt0_b helper_gvec_clt0_b_mips
#define helper_gvec_clt0_h helper_gvec_clt0_h_mips
#define helper_gvec_dup8 helper_gvec_dup8_mips
#define helper_gvec_dup16 helper_gvec_dup16_mips
#define helper_gvec_dup32 helper_gvec_dup32_mips
@ -1478,23 +1488,8 @@
#define helper_neon_addl_u16 helper_neon_addl_u16_mips
#define helper_neon_addl_u32 helper_neon_addl_u32_mips
#define helper_neon_ceq_f32 helper_neon_ceq_f32_mips
#define helper_neon_ceq_u16 helper_neon_ceq_u16_mips
#define helper_neon_ceq_u32 helper_neon_ceq_u32_mips
#define helper_neon_ceq_u8 helper_neon_ceq_u8_mips
#define helper_neon_cge_f32 helper_neon_cge_f32_mips
#define helper_neon_cge_s16 helper_neon_cge_s16_mips
#define helper_neon_cge_s32 helper_neon_cge_s32_mips
#define helper_neon_cge_s8 helper_neon_cge_s8_mips
#define helper_neon_cge_u16 helper_neon_cge_u16_mips
#define helper_neon_cge_u32 helper_neon_cge_u32_mips
#define helper_neon_cge_u8 helper_neon_cge_u8_mips
#define helper_neon_cgt_f32 helper_neon_cgt_f32_mips
#define helper_neon_cgt_s16 helper_neon_cgt_s16_mips
#define helper_neon_cgt_s32 helper_neon_cgt_s32_mips
#define helper_neon_cgt_s8 helper_neon_cgt_s8_mips
#define helper_neon_cgt_u16 helper_neon_cgt_u16_mips
#define helper_neon_cgt_u32 helper_neon_cgt_u32_mips
#define helper_neon_cgt_u8 helper_neon_cgt_u8_mips
#define helper_neon_cls_s16 helper_neon_cls_s16_mips
#define helper_neon_cls_s32 helper_neon_cls_s32_mips
#define helper_neon_cls_s8 helper_neon_cls_s8_mips

25
qemu/mips64.h
View file

@ -1131,6 +1131,16 @@
#define helper_gvec_andc helper_gvec_andc_mips64
#define helper_gvec_ands helper_gvec_ands_mips64
#define helper_gvec_bitsel helper_gvec_bitsel_mips64
#define helper_gvec_ceq0_b helper_gvec_ceq0_b_mips64
#define helper_gvec_ceq0_h helper_gvec_ceq0_h_mips64
#define helper_gvec_cge0_b helper_gvec_cge0_b_mips64
#define helper_gvec_cge0_h helper_gvec_cge0_h_mips64
#define helper_gvec_cgt0_b helper_gvec_cgt0_b_mips64
#define helper_gvec_cgt0_h helper_gvec_cgt0_h_mips64
#define helper_gvec_cle0_b helper_gvec_cle0_b_mips64
#define helper_gvec_cle0_h helper_gvec_cle0_h_mips64
#define helper_gvec_clt0_b helper_gvec_clt0_b_mips64
#define helper_gvec_clt0_h helper_gvec_clt0_h_mips64
#define helper_gvec_dup8 helper_gvec_dup8_mips64
#define helper_gvec_dup16 helper_gvec_dup16_mips64
#define helper_gvec_dup32 helper_gvec_dup32_mips64
@ -1478,23 +1488,8 @@
#define helper_neon_addl_u16 helper_neon_addl_u16_mips64
#define helper_neon_addl_u32 helper_neon_addl_u32_mips64
#define helper_neon_ceq_f32 helper_neon_ceq_f32_mips64
#define helper_neon_ceq_u16 helper_neon_ceq_u16_mips64
#define helper_neon_ceq_u32 helper_neon_ceq_u32_mips64
#define helper_neon_ceq_u8 helper_neon_ceq_u8_mips64
#define helper_neon_cge_f32 helper_neon_cge_f32_mips64
#define helper_neon_cge_s16 helper_neon_cge_s16_mips64
#define helper_neon_cge_s32 helper_neon_cge_s32_mips64
#define helper_neon_cge_s8 helper_neon_cge_s8_mips64
#define helper_neon_cge_u16 helper_neon_cge_u16_mips64
#define helper_neon_cge_u32 helper_neon_cge_u32_mips64
#define helper_neon_cge_u8 helper_neon_cge_u8_mips64
#define helper_neon_cgt_f32 helper_neon_cgt_f32_mips64
#define helper_neon_cgt_s16 helper_neon_cgt_s16_mips64
#define helper_neon_cgt_s32 helper_neon_cgt_s32_mips64
#define helper_neon_cgt_s8 helper_neon_cgt_s8_mips64
#define helper_neon_cgt_u16 helper_neon_cgt_u16_mips64
#define helper_neon_cgt_u32 helper_neon_cgt_u32_mips64
#define helper_neon_cgt_u8 helper_neon_cgt_u8_mips64
#define helper_neon_cls_s16 helper_neon_cls_s16_mips64
#define helper_neon_cls_s32 helper_neon_cls_s32_mips64
#define helper_neon_cls_s8 helper_neon_cls_s8_mips64

25
qemu/mips64el.h
View file

@ -1131,6 +1131,16 @@
#define helper_gvec_andc helper_gvec_andc_mips64el
#define helper_gvec_ands helper_gvec_ands_mips64el
#define helper_gvec_bitsel helper_gvec_bitsel_mips64el
#define helper_gvec_ceq0_b helper_gvec_ceq0_b_mips64el
#define helper_gvec_ceq0_h helper_gvec_ceq0_h_mips64el
#define helper_gvec_cge0_b helper_gvec_cge0_b_mips64el
#define helper_gvec_cge0_h helper_gvec_cge0_h_mips64el
#define helper_gvec_cgt0_b helper_gvec_cgt0_b_mips64el
#define helper_gvec_cgt0_h helper_gvec_cgt0_h_mips64el
#define helper_gvec_cle0_b helper_gvec_cle0_b_mips64el
#define helper_gvec_cle0_h helper_gvec_cle0_h_mips64el
#define helper_gvec_clt0_b helper_gvec_clt0_b_mips64el
#define helper_gvec_clt0_h helper_gvec_clt0_h_mips64el
#define helper_gvec_dup8 helper_gvec_dup8_mips64el
#define helper_gvec_dup16 helper_gvec_dup16_mips64el
#define helper_gvec_dup32 helper_gvec_dup32_mips64el
@ -1478,23 +1488,8 @@
#define helper_neon_addl_u16 helper_neon_addl_u16_mips64el
#define helper_neon_addl_u32 helper_neon_addl_u32_mips64el
#define helper_neon_ceq_f32 helper_neon_ceq_f32_mips64el
#define helper_neon_ceq_u16 helper_neon_ceq_u16_mips64el
#define helper_neon_ceq_u32 helper_neon_ceq_u32_mips64el
#define helper_neon_ceq_u8 helper_neon_ceq_u8_mips64el
#define helper_neon_cge_f32 helper_neon_cge_f32_mips64el
#define helper_neon_cge_s16 helper_neon_cge_s16_mips64el
#define helper_neon_cge_s32 helper_neon_cge_s32_mips64el
#define helper_neon_cge_s8 helper_neon_cge_s8_mips64el
#define helper_neon_cge_u16 helper_neon_cge_u16_mips64el
#define helper_neon_cge_u32 helper_neon_cge_u32_mips64el
#define helper_neon_cge_u8 helper_neon_cge_u8_mips64el
#define helper_neon_cgt_f32 helper_neon_cgt_f32_mips64el
#define helper_neon_cgt_s16 helper_neon_cgt_s16_mips64el
#define helper_neon_cgt_s32 helper_neon_cgt_s32_mips64el
#define helper_neon_cgt_s8 helper_neon_cgt_s8_mips64el
#define helper_neon_cgt_u16 helper_neon_cgt_u16_mips64el
#define helper_neon_cgt_u32 helper_neon_cgt_u32_mips64el
#define helper_neon_cgt_u8 helper_neon_cgt_u8_mips64el
#define helper_neon_cls_s16 helper_neon_cls_s16_mips64el
#define helper_neon_cls_s32 helper_neon_cls_s32_mips64el
#define helper_neon_cls_s8 helper_neon_cls_s8_mips64el

25
qemu/mipsel.h
View file

@ -1131,6 +1131,16 @@
#define helper_gvec_andc helper_gvec_andc_mipsel
#define helper_gvec_ands helper_gvec_ands_mipsel
#define helper_gvec_bitsel helper_gvec_bitsel_mipsel
#define helper_gvec_ceq0_b helper_gvec_ceq0_b_mipsel
#define helper_gvec_ceq0_h helper_gvec_ceq0_h_mipsel
#define helper_gvec_cge0_b helper_gvec_cge0_b_mipsel
#define helper_gvec_cge0_h helper_gvec_cge0_h_mipsel
#define helper_gvec_cgt0_b helper_gvec_cgt0_b_mipsel
#define helper_gvec_cgt0_h helper_gvec_cgt0_h_mipsel
#define helper_gvec_cle0_b helper_gvec_cle0_b_mipsel
#define helper_gvec_cle0_h helper_gvec_cle0_h_mipsel
#define helper_gvec_clt0_b helper_gvec_clt0_b_mipsel
#define helper_gvec_clt0_h helper_gvec_clt0_h_mipsel
#define helper_gvec_dup8 helper_gvec_dup8_mipsel
#define helper_gvec_dup16 helper_gvec_dup16_mipsel
#define helper_gvec_dup32 helper_gvec_dup32_mipsel
@ -1478,23 +1488,8 @@
#define helper_neon_addl_u16 helper_neon_addl_u16_mipsel
#define helper_neon_addl_u32 helper_neon_addl_u32_mipsel
#define helper_neon_ceq_f32 helper_neon_ceq_f32_mipsel
#define helper_neon_ceq_u16 helper_neon_ceq_u16_mipsel
#define helper_neon_ceq_u32 helper_neon_ceq_u32_mipsel
#define helper_neon_ceq_u8 helper_neon_ceq_u8_mipsel
#define helper_neon_cge_f32 helper_neon_cge_f32_mipsel
#define helper_neon_cge_s16 helper_neon_cge_s16_mipsel
#define helper_neon_cge_s32 helper_neon_cge_s32_mipsel
#define helper_neon_cge_s8 helper_neon_cge_s8_mipsel
#define helper_neon_cge_u16 helper_neon_cge_u16_mipsel
#define helper_neon_cge_u32 helper_neon_cge_u32_mipsel
#define helper_neon_cge_u8 helper_neon_cge_u8_mipsel
#define helper_neon_cgt_f32 helper_neon_cgt_f32_mipsel
#define helper_neon_cgt_s16 helper_neon_cgt_s16_mipsel
#define helper_neon_cgt_s32 helper_neon_cgt_s32_mipsel
#define helper_neon_cgt_s8 helper_neon_cgt_s8_mipsel
#define helper_neon_cgt_u16 helper_neon_cgt_u16_mipsel
#define helper_neon_cgt_u32 helper_neon_cgt_u32_mipsel
#define helper_neon_cgt_u8 helper_neon_cgt_u8_mipsel
#define helper_neon_cls_s16 helper_neon_cls_s16_mipsel
#define helper_neon_cls_s32 helper_neon_cls_s32_mipsel
#define helper_neon_cls_s8 helper_neon_cls_s8_mipsel

25
qemu/powerpc.h
View file

@ -1131,6 +1131,16 @@
#define helper_gvec_andc helper_gvec_andc_powerpc
#define helper_gvec_ands helper_gvec_ands_powerpc
#define helper_gvec_bitsel helper_gvec_bitsel_powerpc
#define helper_gvec_ceq0_b helper_gvec_ceq0_b_powerpc
#define helper_gvec_ceq0_h helper_gvec_ceq0_h_powerpc
#define helper_gvec_cge0_b helper_gvec_cge0_b_powerpc
#define helper_gvec_cge0_h helper_gvec_cge0_h_powerpc
#define helper_gvec_cgt0_b helper_gvec_cgt0_b_powerpc
#define helper_gvec_cgt0_h helper_gvec_cgt0_h_powerpc
#define helper_gvec_cle0_b helper_gvec_cle0_b_powerpc
#define helper_gvec_cle0_h helper_gvec_cle0_h_powerpc
#define helper_gvec_clt0_b helper_gvec_clt0_b_powerpc
#define helper_gvec_clt0_h helper_gvec_clt0_h_powerpc
#define helper_gvec_dup8 helper_gvec_dup8_powerpc
#define helper_gvec_dup16 helper_gvec_dup16_powerpc
#define helper_gvec_dup32 helper_gvec_dup32_powerpc
@ -1478,23 +1488,8 @@
#define helper_neon_addl_u16 helper_neon_addl_u16_powerpc
#define helper_neon_addl_u32 helper_neon_addl_u32_powerpc
#define helper_neon_ceq_f32 helper_neon_ceq_f32_powerpc
#define helper_neon_ceq_u16 helper_neon_ceq_u16_powerpc
#define helper_neon_ceq_u32 helper_neon_ceq_u32_powerpc
#define helper_neon_ceq_u8 helper_neon_ceq_u8_powerpc
#define helper_neon_cge_f32 helper_neon_cge_f32_powerpc
#define helper_neon_cge_s16 helper_neon_cge_s16_powerpc
#define helper_neon_cge_s32 helper_neon_cge_s32_powerpc
#define helper_neon_cge_s8 helper_neon_cge_s8_powerpc
#define helper_neon_cge_u16 helper_neon_cge_u16_powerpc
#define helper_neon_cge_u32 helper_neon_cge_u32_powerpc
#define helper_neon_cge_u8 helper_neon_cge_u8_powerpc
#define helper_neon_cgt_f32 helper_neon_cgt_f32_powerpc
#define helper_neon_cgt_s16 helper_neon_cgt_s16_powerpc
#define helper_neon_cgt_s32 helper_neon_cgt_s32_powerpc
#define helper_neon_cgt_s8 helper_neon_cgt_s8_powerpc
#define helper_neon_cgt_u16 helper_neon_cgt_u16_powerpc
#define helper_neon_cgt_u32 helper_neon_cgt_u32_powerpc
#define helper_neon_cgt_u8 helper_neon_cgt_u8_powerpc
#define helper_neon_cls_s16 helper_neon_cls_s16_powerpc
#define helper_neon_cls_s32 helper_neon_cls_s32_powerpc
#define helper_neon_cls_s8 helper_neon_cls_s8_powerpc

25
qemu/riscv32.h
View file

@ -1131,6 +1131,16 @@
#define helper_gvec_andc helper_gvec_andc_riscv32
#define helper_gvec_ands helper_gvec_ands_riscv32
#define helper_gvec_bitsel helper_gvec_bitsel_riscv32
#define helper_gvec_ceq0_b helper_gvec_ceq0_b_riscv32
#define helper_gvec_ceq0_h helper_gvec_ceq0_h_riscv32
#define helper_gvec_cge0_b helper_gvec_cge0_b_riscv32
#define helper_gvec_cge0_h helper_gvec_cge0_h_riscv32
#define helper_gvec_cgt0_b helper_gvec_cgt0_b_riscv32
#define helper_gvec_cgt0_h helper_gvec_cgt0_h_riscv32
#define helper_gvec_cle0_b helper_gvec_cle0_b_riscv32
#define helper_gvec_cle0_h helper_gvec_cle0_h_riscv32
#define helper_gvec_clt0_b helper_gvec_clt0_b_riscv32
#define helper_gvec_clt0_h helper_gvec_clt0_h_riscv32
#define helper_gvec_dup8 helper_gvec_dup8_riscv32
#define helper_gvec_dup16 helper_gvec_dup16_riscv32
#define helper_gvec_dup32 helper_gvec_dup32_riscv32
@ -1478,23 +1488,8 @@
#define helper_neon_addl_u16 helper_neon_addl_u16_riscv32
#define helper_neon_addl_u32 helper_neon_addl_u32_riscv32
#define helper_neon_ceq_f32 helper_neon_ceq_f32_riscv32
#define helper_neon_ceq_u16 helper_neon_ceq_u16_riscv32
#define helper_neon_ceq_u32 helper_neon_ceq_u32_riscv32
#define helper_neon_ceq_u8 helper_neon_ceq_u8_riscv32
#define helper_neon_cge_f32 helper_neon_cge_f32_riscv32
#define helper_neon_cge_s16 helper_neon_cge_s16_riscv32
#define helper_neon_cge_s32 helper_neon_cge_s32_riscv32
#define helper_neon_cge_s8 helper_neon_cge_s8_riscv32
#define helper_neon_cge_u16 helper_neon_cge_u16_riscv32
#define helper_neon_cge_u32 helper_neon_cge_u32_riscv32
#define helper_neon_cge_u8 helper_neon_cge_u8_riscv32
#define helper_neon_cgt_f32 helper_neon_cgt_f32_riscv32
#define helper_neon_cgt_s16 helper_neon_cgt_s16_riscv32
#define helper_neon_cgt_s32 helper_neon_cgt_s32_riscv32
#define helper_neon_cgt_s8 helper_neon_cgt_s8_riscv32
#define helper_neon_cgt_u16 helper_neon_cgt_u16_riscv32
#define helper_neon_cgt_u32 helper_neon_cgt_u32_riscv32
#define helper_neon_cgt_u8 helper_neon_cgt_u8_riscv32
#define helper_neon_cls_s16 helper_neon_cls_s16_riscv32
#define helper_neon_cls_s32 helper_neon_cls_s32_riscv32
#define helper_neon_cls_s8 helper_neon_cls_s8_riscv32

25
qemu/riscv64.h
View file

@ -1131,6 +1131,16 @@
#define helper_gvec_andc helper_gvec_andc_riscv64
#define helper_gvec_ands helper_gvec_ands_riscv64
#define helper_gvec_bitsel helper_gvec_bitsel_riscv64
#define helper_gvec_ceq0_b helper_gvec_ceq0_b_riscv64
#define helper_gvec_ceq0_h helper_gvec_ceq0_h_riscv64
#define helper_gvec_cge0_b helper_gvec_cge0_b_riscv64
#define helper_gvec_cge0_h helper_gvec_cge0_h_riscv64
#define helper_gvec_cgt0_b helper_gvec_cgt0_b_riscv64
#define helper_gvec_cgt0_h helper_gvec_cgt0_h_riscv64
#define helper_gvec_cle0_b helper_gvec_cle0_b_riscv64
#define helper_gvec_cle0_h helper_gvec_cle0_h_riscv64
#define helper_gvec_clt0_b helper_gvec_clt0_b_riscv64
#define helper_gvec_clt0_h helper_gvec_clt0_h_riscv64
#define helper_gvec_dup8 helper_gvec_dup8_riscv64
#define helper_gvec_dup16 helper_gvec_dup16_riscv64
#define helper_gvec_dup32 helper_gvec_dup32_riscv64
@ -1478,23 +1488,8 @@
#define helper_neon_addl_u16 helper_neon_addl_u16_riscv64
#define helper_neon_addl_u32 helper_neon_addl_u32_riscv64
#define helper_neon_ceq_f32 helper_neon_ceq_f32_riscv64
#define helper_neon_ceq_u16 helper_neon_ceq_u16_riscv64
#define helper_neon_ceq_u32 helper_neon_ceq_u32_riscv64
#define helper_neon_ceq_u8 helper_neon_ceq_u8_riscv64
#define helper_neon_cge_f32 helper_neon_cge_f32_riscv64
#define helper_neon_cge_s16 helper_neon_cge_s16_riscv64
#define helper_neon_cge_s32 helper_neon_cge_s32_riscv64
#define helper_neon_cge_s8 helper_neon_cge_s8_riscv64
#define helper_neon_cge_u16 helper_neon_cge_u16_riscv64
#define helper_neon_cge_u32 helper_neon_cge_u32_riscv64
#define helper_neon_cge_u8 helper_neon_cge_u8_riscv64
#define helper_neon_cgt_f32 helper_neon_cgt_f32_riscv64
#define helper_neon_cgt_s16 helper_neon_cgt_s16_riscv64
#define helper_neon_cgt_s32 helper_neon_cgt_s32_riscv64
#define helper_neon_cgt_s8 helper_neon_cgt_s8_riscv64
#define helper_neon_cgt_u16 helper_neon_cgt_u16_riscv64
#define helper_neon_cgt_u32 helper_neon_cgt_u32_riscv64
#define helper_neon_cgt_u8 helper_neon_cgt_u8_riscv64
#define helper_neon_cls_s16 helper_neon_cls_s16_riscv64
#define helper_neon_cls_s32 helper_neon_cls_s32_riscv64
#define helper_neon_cls_s8 helper_neon_cls_s8_riscv64

25
qemu/sparc.h
View file

@ -1131,6 +1131,16 @@
#define helper_gvec_andc helper_gvec_andc_sparc
#define helper_gvec_ands helper_gvec_ands_sparc
#define helper_gvec_bitsel helper_gvec_bitsel_sparc
#define helper_gvec_ceq0_b helper_gvec_ceq0_b_sparc
#define helper_gvec_ceq0_h helper_gvec_ceq0_h_sparc
#define helper_gvec_cge0_b helper_gvec_cge0_b_sparc
#define helper_gvec_cge0_h helper_gvec_cge0_h_sparc
#define helper_gvec_cgt0_b helper_gvec_cgt0_b_sparc
#define helper_gvec_cgt0_h helper_gvec_cgt0_h_sparc
#define helper_gvec_cle0_b helper_gvec_cle0_b_sparc
#define helper_gvec_cle0_h helper_gvec_cle0_h_sparc
#define helper_gvec_clt0_b helper_gvec_clt0_b_sparc
#define helper_gvec_clt0_h helper_gvec_clt0_h_sparc
#define helper_gvec_dup8 helper_gvec_dup8_sparc
#define helper_gvec_dup16 helper_gvec_dup16_sparc
#define helper_gvec_dup32 helper_gvec_dup32_sparc
@ -1478,23 +1488,8 @@
#define helper_neon_addl_u16 helper_neon_addl_u16_sparc
#define helper_neon_addl_u32 helper_neon_addl_u32_sparc
#define helper_neon_ceq_f32 helper_neon_ceq_f32_sparc
#define helper_neon_ceq_u16 helper_neon_ceq_u16_sparc
#define helper_neon_ceq_u32 helper_neon_ceq_u32_sparc
#define helper_neon_ceq_u8 helper_neon_ceq_u8_sparc
#define helper_neon_cge_f32 helper_neon_cge_f32_sparc
#define helper_neon_cge_s16 helper_neon_cge_s16_sparc
#define helper_neon_cge_s32 helper_neon_cge_s32_sparc
#define helper_neon_cge_s8 helper_neon_cge_s8_sparc
#define helper_neon_cge_u16 helper_neon_cge_u16_sparc
#define helper_neon_cge_u32 helper_neon_cge_u32_sparc
#define helper_neon_cge_u8 helper_neon_cge_u8_sparc
#define helper_neon_cgt_f32 helper_neon_cgt_f32_sparc
#define helper_neon_cgt_s16 helper_neon_cgt_s16_sparc
#define helper_neon_cgt_s32 helper_neon_cgt_s32_sparc
#define helper_neon_cgt_s8 helper_neon_cgt_s8_sparc
#define helper_neon_cgt_u16 helper_neon_cgt_u16_sparc
#define helper_neon_cgt_u32 helper_neon_cgt_u32_sparc
#define helper_neon_cgt_u8 helper_neon_cgt_u8_sparc
#define helper_neon_cls_s16 helper_neon_cls_s16_sparc
#define helper_neon_cls_s32 helper_neon_cls_s32_sparc
#define helper_neon_cls_s8 helper_neon_cls_s8_sparc

25
qemu/sparc64.h
View file

@ -1131,6 +1131,16 @@
#define helper_gvec_andc helper_gvec_andc_sparc64
#define helper_gvec_ands helper_gvec_ands_sparc64
#define helper_gvec_bitsel helper_gvec_bitsel_sparc64
#define helper_gvec_ceq0_b helper_gvec_ceq0_b_sparc64
#define helper_gvec_ceq0_h helper_gvec_ceq0_h_sparc64
#define helper_gvec_cge0_b helper_gvec_cge0_b_sparc64
#define helper_gvec_cge0_h helper_gvec_cge0_h_sparc64
#define helper_gvec_cgt0_b helper_gvec_cgt0_b_sparc64
#define helper_gvec_cgt0_h helper_gvec_cgt0_h_sparc64
#define helper_gvec_cle0_b helper_gvec_cle0_b_sparc64
#define helper_gvec_cle0_h helper_gvec_cle0_h_sparc64
#define helper_gvec_clt0_b helper_gvec_clt0_b_sparc64
#define helper_gvec_clt0_h helper_gvec_clt0_h_sparc64
#define helper_gvec_dup8 helper_gvec_dup8_sparc64
#define helper_gvec_dup16 helper_gvec_dup16_sparc64
#define helper_gvec_dup32 helper_gvec_dup32_sparc64
@ -1478,23 +1488,8 @@
#define helper_neon_addl_u16 helper_neon_addl_u16_sparc64
#define helper_neon_addl_u32 helper_neon_addl_u32_sparc64
#define helper_neon_ceq_f32 helper_neon_ceq_f32_sparc64
#define helper_neon_ceq_u16 helper_neon_ceq_u16_sparc64
#define helper_neon_ceq_u32 helper_neon_ceq_u32_sparc64
#define helper_neon_ceq_u8 helper_neon_ceq_u8_sparc64
#define helper_neon_cge_f32 helper_neon_cge_f32_sparc64
#define helper_neon_cge_s16 helper_neon_cge_s16_sparc64
#define helper_neon_cge_s32 helper_neon_cge_s32_sparc64
#define helper_neon_cge_s8 helper_neon_cge_s8_sparc64
#define helper_neon_cge_u16 helper_neon_cge_u16_sparc64
#define helper_neon_cge_u32 helper_neon_cge_u32_sparc64
#define helper_neon_cge_u8 helper_neon_cge_u8_sparc64
#define helper_neon_cgt_f32 helper_neon_cgt_f32_sparc64
#define helper_neon_cgt_s16 helper_neon_cgt_s16_sparc64
#define helper_neon_cgt_s32 helper_neon_cgt_s32_sparc64
#define helper_neon_cgt_s8 helper_neon_cgt_s8_sparc64
#define helper_neon_cgt_u16 helper_neon_cgt_u16_sparc64
#define helper_neon_cgt_u32 helper_neon_cgt_u32_sparc64
#define helper_neon_cgt_u8 helper_neon_cgt_u8_sparc64
#define helper_neon_cls_s16 helper_neon_cls_s16_sparc64
#define helper_neon_cls_s32 helper_neon_cls_s32_sparc64
#define helper_neon_cls_s8 helper_neon_cls_s8_sparc64

27
qemu/target/arm/helper.h
View file

@ -271,19 +271,6 @@ DEF_HELPER_2(neon_hsub_u16, i32, i32, i32)
DEF_HELPER_2(neon_hsub_s32, s32, s32, s32)
DEF_HELPER_2(neon_hsub_u32, i32, i32, i32)
DEF_HELPER_2(neon_cgt_u8, i32, i32, i32)
DEF_HELPER_2(neon_cgt_s8, i32, i32, i32)
DEF_HELPER_2(neon_cgt_u16, i32, i32, i32)
DEF_HELPER_2(neon_cgt_s16, i32, i32, i32)
DEF_HELPER_2(neon_cgt_u32, i32, i32, i32)
DEF_HELPER_2(neon_cgt_s32, i32, i32, i32)
DEF_HELPER_2(neon_cge_u8, i32, i32, i32)
DEF_HELPER_2(neon_cge_s8, i32, i32, i32)
DEF_HELPER_2(neon_cge_u16, i32, i32, i32)
DEF_HELPER_2(neon_cge_s16, i32, i32, i32)
DEF_HELPER_2(neon_cge_u32, i32, i32, i32)
DEF_HELPER_2(neon_cge_s32, i32, i32, i32)
DEF_HELPER_2(neon_pmin_u8, i32, i32, i32)
DEF_HELPER_2(neon_pmin_s8, i32, i32, i32)
DEF_HELPER_2(neon_pmin_u16, i32, i32, i32)
@ -343,9 +330,6 @@ DEF_HELPER_2(neon_mul_u16, i32, i32, i32)
DEF_HELPER_2(neon_tst_u8, i32, i32, i32)
DEF_HELPER_2(neon_tst_u16, i32, i32, i32)
DEF_HELPER_2(neon_tst_u32, i32, i32, i32)
DEF_HELPER_2(neon_ceq_u8, i32, i32, i32)
DEF_HELPER_2(neon_ceq_u16, i32, i32, i32)
DEF_HELPER_2(neon_ceq_u32, i32, i32, i32)
DEF_HELPER_1(neon_clz_u8, i32, i32)
DEF_HELPER_1(neon_clz_u16, i32, i32)
@ -682,6 +666,17 @@ DEF_HELPER_FLAGS_2(frint64_s, TCG_CALL_NO_RWG, f32, f32, ptr)
DEF_HELPER_FLAGS_2(frint32_d, TCG_CALL_NO_RWG, f64, f64, ptr)
DEF_HELPER_FLAGS_2(frint64_d, TCG_CALL_NO_RWG, f64, f64, ptr)
DEF_HELPER_FLAGS_3(gvec_ceq0_b, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
DEF_HELPER_FLAGS_3(gvec_ceq0_h, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
DEF_HELPER_FLAGS_3(gvec_clt0_b, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
DEF_HELPER_FLAGS_3(gvec_clt0_h, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
DEF_HELPER_FLAGS_3(gvec_cle0_b, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
DEF_HELPER_FLAGS_3(gvec_cle0_h, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
DEF_HELPER_FLAGS_3(gvec_cgt0_b, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
DEF_HELPER_FLAGS_3(gvec_cgt0_h, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
DEF_HELPER_FLAGS_3(gvec_cge0_b, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
DEF_HELPER_FLAGS_3(gvec_cge0_h, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(gvec_sshl_b, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(gvec_sshl_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(gvec_ushl_b, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)

24
qemu/target/arm/neon_helper.c
View file

@ -563,24 +563,6 @@ uint32_t HELPER(neon_hsub_u32)(uint32_t src1, uint32_t src2)
return dest;
}
#define NEON_FN(dest, src1, src2) dest = (src1 > src2) ? ~0 : 0
NEON_VOP(cgt_s8, neon_s8, 4)
NEON_VOP(cgt_u8, neon_u8, 4)
NEON_VOP(cgt_s16, neon_s16, 2)
NEON_VOP(cgt_u16, neon_u16, 2)
NEON_VOP(cgt_s32, neon_s32, 1)
NEON_VOP(cgt_u32, neon_u32, 1)
#undef NEON_FN
#define NEON_FN(dest, src1, src2) dest = (src1 >= src2) ? ~0 : 0
NEON_VOP(cge_s8, neon_s8, 4)
NEON_VOP(cge_u8, neon_u8, 4)
NEON_VOP(cge_s16, neon_s16, 2)
NEON_VOP(cge_u16, neon_u16, 2)
NEON_VOP(cge_s32, neon_s32, 1)
NEON_VOP(cge_u32, neon_u32, 1)
#undef NEON_FN
#define NEON_FN(dest, src1, src2) dest = (src1 < src2) ? src1 : src2
NEON_POP(pmin_s8, neon_s8, 4)
NEON_POP(pmin_u8, neon_u8, 4)
@ -1147,12 +1129,6 @@ NEON_VOP(tst_u16, neon_u16, 2)
NEON_VOP(tst_u32, neon_u32, 1)
#undef NEON_FN
#define NEON_FN(dest, src1, src2) dest = (src1 == src2) ? -1 : 0
NEON_VOP(ceq_u8, neon_u8, 4)
NEON_VOP(ceq_u16, neon_u16, 2)
NEON_VOP(ceq_u32, neon_u32, 1)
#undef NEON_FN
/* Count Leading Sign/Zero Bits. */
static inline int do_clz8(uint8_t x)
{

66
qemu/target/arm/translate-a64.c
View file

@ -758,6 +758,16 @@ static void gen_gvec_fn3(DisasContext *s, bool is_q, int rd, int rn, int rm,
vec_full_reg_offset(s, rm), is_q ? 16 : 8, vec_full_reg_size(s));
}
/* Expand a 2-operand AdvSIMD vector operation using an op descriptor. */
static void gen_gvec_op2(DisasContext *s, bool is_q, int rd,
int rn, const GVecGen2 *gvec_op)
{
TCGContext *tcg_ctx = s->uc->tcg_ctx;
tcg_gen_gvec_2(tcg_ctx, vec_full_reg_offset(s, rd), vec_full_reg_offset(s, rn),
is_q ? 16 : 8, vec_full_reg_size(s), gvec_op);
}
/* Expand a 2-operand + immediate AdvSIMD vector operation using
* an op descriptor.
*/
@ -12671,6 +12681,15 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
return;
}
break;
case 0x8: /* CMGT, CMGE */
gen_gvec_op2(s, is_q, rd, rn, u ? &cge0_op[size] : &cgt0_op[size]);
return;
case 0x9: /* CMEQ, CMLE */
gen_gvec_op2(s, is_q, rd, rn, u ? &cle0_op[size] : &ceq0_op[size]);
return;
case 0xa: /* CMLT */
gen_gvec_op2(s, is_q, rd, rn, &clt0_op[size]);
return;
case 0xb:
if (u) { /* ABS, NEG */
gen_gvec_fn2(s, is_q, rd, rn, tcg_gen_gvec_neg, size);
@ -12708,29 +12727,12 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
for (pass = 0; pass < (is_q ? 4 : 2); pass++) {
TCGv_i32 tcg_op = tcg_temp_new_i32(tcg_ctx);
TCGv_i32 tcg_res = tcg_temp_new_i32(tcg_ctx);
TCGCond cond;
read_vec_element_i32(s, tcg_op, rn, pass, MO_32);
if (size == 2) {
/* Special cases for 32 bit elements */
switch (opcode) {
case 0xa: /* CMLT */
/* 32 bit integer comparison against zero, result is
* test ? (2^32 - 1) : 0. We implement via setcond(test)
* and inverting.
*/
cond = TCG_COND_LT;
do_cmop:
tcg_gen_setcondi_i32(tcg_ctx, cond, tcg_res, tcg_op, 0);
tcg_gen_neg_i32(tcg_ctx, tcg_res, tcg_res);
break;
case 0x8: /* CMGT, CMGE */
cond = u ? TCG_COND_GE : TCG_COND_GT;
goto do_cmop;
case 0x9: /* CMEQ, CMLE */
cond = u ? TCG_COND_LE : TCG_COND_EQ;
goto do_cmop;
case 0x4: /* CLS */
if (u) {
tcg_gen_clzi_i32(tcg_ctx, tcg_res, tcg_op, 32);
@ -12827,36 +12829,6 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
genfn(tcg_ctx, tcg_res, tcg_ctx->cpu_env, tcg_op);
break;
}
case 0x8: /* CMGT, CMGE */
case 0x9: /* CMEQ, CMLE */
case 0xa: /* CMLT */
{
static NeonGenTwoOpFn * const fns[3][2] = {
{ gen_helper_neon_cgt_s8, gen_helper_neon_cgt_s16 },
{ gen_helper_neon_cge_s8, gen_helper_neon_cge_s16 },
{ gen_helper_neon_ceq_u8, gen_helper_neon_ceq_u16 },
};
NeonGenTwoOpFn *genfn;
int comp;
bool reverse;
TCGv_i32 tcg_zero = tcg_const_i32(tcg_ctx, 0);
/* comp = index into [CMGT, CMGE, CMEQ, CMLE, CMLT] */
comp = (opcode - 0x8) * 2 + u;
/* ...but LE, LT are implemented as reverse GE, GT */
reverse = (comp > 2);
if (reverse) {
comp = 4 - comp;
}
genfn = fns[comp][size];
if (reverse) {
genfn(tcg_ctx, tcg_res, tcg_zero, tcg_op);
} else {
genfn(tcg_ctx, tcg_res, tcg_op, tcg_zero);
}
tcg_temp_free_i32(tcg_ctx, tcg_zero);
break;
}
case 0x4: /* CLS, CLZ */
if (u) {
if (size == 0) {

256
qemu/target/arm/translate.c
View file

@ -4048,6 +4048,205 @@ static int do_v81_helper(DisasContext *s, gen_helper_gvec_3_ptr *fn,
return 1;
}
static void gen_ceq0_i32(TCGContext *s, TCGv_i32 d, TCGv_i32 a)
{
tcg_gen_setcondi_i32(s, TCG_COND_EQ, d, a, 0);
tcg_gen_neg_i32(s, d, d);
}
static void gen_ceq0_i64(TCGContext *s, TCGv_i64 d, TCGv_i64 a)
{
tcg_gen_setcondi_i64(s, TCG_COND_EQ, d, a, 0);
tcg_gen_neg_i64(s, d, d);
}
static void gen_ceq0_vec(TCGContext *s, unsigned vece, TCGv_vec d, TCGv_vec a)
{
TCGv_vec zero = tcg_const_zeros_vec_matching(s, d);
tcg_gen_cmp_vec(s, TCG_COND_EQ, vece, d, a, zero);
tcg_temp_free_vec(s, zero);
}
static const TCGOpcode vecop_list_cmp[] = {
INDEX_op_cmp_vec, 0
};
const GVecGen2 ceq0_op[4] = {
{ .fno = gen_helper_gvec_ceq0_b,
.fniv = gen_ceq0_vec,
.opt_opc = vecop_list_cmp,
.vece = MO_8 },
{ .fno = gen_helper_gvec_ceq0_h,
.fniv = gen_ceq0_vec,
.opt_opc = vecop_list_cmp,
.vece = MO_16 },
{ .fni4 = gen_ceq0_i32,
.fniv = gen_ceq0_vec,
.opt_opc = vecop_list_cmp,
.vece = MO_32 },
{ .fni8 = gen_ceq0_i64,
.fniv = gen_ceq0_vec,
.opt_opc = vecop_list_cmp,
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
.vece = MO_64 },
};
static void gen_cle0_i32(TCGContext *s, TCGv_i32 d, TCGv_i32 a)
{
tcg_gen_setcondi_i32(s, TCG_COND_LE, d, a, 0);
tcg_gen_neg_i32(s, d, d);
}
static void gen_cle0_i64(TCGContext *s, TCGv_i64 d, TCGv_i64 a)
{
tcg_gen_setcondi_i64(s, TCG_COND_LE, d, a, 0);
tcg_gen_neg_i64(s, d, d);
}
static void gen_cle0_vec(TCGContext *s, unsigned vece, TCGv_vec d, TCGv_vec a)
{
TCGv_vec zero = tcg_const_zeros_vec_matching(s, d);
tcg_gen_cmp_vec(s, TCG_COND_LE, vece, d, a, zero);
tcg_temp_free_vec(s, zero);
}
const GVecGen2 cle0_op[4] = {
{ .fno = gen_helper_gvec_cle0_b,
.fniv = gen_cle0_vec,
.opt_opc = vecop_list_cmp,
.vece = MO_8 },
{ .fno = gen_helper_gvec_cle0_h,
.fniv = gen_cle0_vec,
.opt_opc = vecop_list_cmp,
.vece = MO_16 },
{ .fni4 = gen_cle0_i32,
.fniv = gen_cle0_vec,
.opt_opc = vecop_list_cmp,
.vece = MO_32 },
{ .fni8 = gen_cle0_i64,
.fniv = gen_cle0_vec,
.opt_opc = vecop_list_cmp,
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
.vece = MO_64 },
};
static void gen_cge0_i32(TCGContext *s, TCGv_i32 d, TCGv_i32 a)
{
tcg_gen_setcondi_i32(s, TCG_COND_GE, d, a, 0);
tcg_gen_neg_i32(s, d, d);
}
static void gen_cge0_i64(TCGContext *s, TCGv_i64 d, TCGv_i64 a)
{
tcg_gen_setcondi_i64(s, TCG_COND_GE, d, a, 0);
tcg_gen_neg_i64(s, d, d);
}
static void gen_cge0_vec(TCGContext *s, unsigned vece, TCGv_vec d, TCGv_vec a)
{
TCGv_vec zero = tcg_const_zeros_vec_matching(s, d);
tcg_gen_cmp_vec(s, TCG_COND_GE, vece, d, a, zero);
tcg_temp_free_vec(s, zero);
}
const GVecGen2 cge0_op[4] = {
{ .fno = gen_helper_gvec_cge0_b,
.fniv = gen_cge0_vec,
.opt_opc = vecop_list_cmp,
.vece = MO_8 },
{ .fno = gen_helper_gvec_cge0_h,
.fniv = gen_cge0_vec,
.opt_opc = vecop_list_cmp,
.vece = MO_16 },
{ .fni4 = gen_cge0_i32,
.fniv = gen_cge0_vec,
.opt_opc = vecop_list_cmp,
.vece = MO_32 },
{ .fni8 = gen_cge0_i64,
.fniv = gen_cge0_vec,
.opt_opc = vecop_list_cmp,
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
.vece = MO_64 },
};
static void gen_clt0_i32(TCGContext *s, TCGv_i32 d, TCGv_i32 a)
{
tcg_gen_setcondi_i32(s, TCG_COND_LT, d, a, 0);
tcg_gen_neg_i32(s, d, d);
}
static void gen_clt0_i64(TCGContext *s, TCGv_i64 d, TCGv_i64 a)
{
tcg_gen_setcondi_i64(s, TCG_COND_LT, d, a, 0);
tcg_gen_neg_i64(s, d, d);
}
static void gen_clt0_vec(TCGContext *s, unsigned vece, TCGv_vec d, TCGv_vec a)
{
TCGv_vec zero = tcg_const_zeros_vec_matching(s, d);
tcg_gen_cmp_vec(s, TCG_COND_LT, vece, d, a, zero);
tcg_temp_free_vec(s, zero);
}
const GVecGen2 clt0_op[4] = {
{ .fno = gen_helper_gvec_clt0_b,
.fniv = gen_clt0_vec,
.opt_opc = vecop_list_cmp,
.vece = MO_8 },
{ .fno = gen_helper_gvec_clt0_h,
.fniv = gen_clt0_vec,
.opt_opc = vecop_list_cmp,
.vece = MO_16 },
{ .fni4 = gen_clt0_i32,
.fniv = gen_clt0_vec,
.opt_opc = vecop_list_cmp,
.vece = MO_32 },
{ .fni8 = gen_clt0_i64,
.fniv = gen_clt0_vec,
.opt_opc = vecop_list_cmp,
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
.vece = MO_64 },
};
static void gen_cgt0_i32(TCGContext *s, TCGv_i32 d, TCGv_i32 a)
{
tcg_gen_setcondi_i32(s, TCG_COND_GT, d, a, 0);
tcg_gen_neg_i32(s, d, d);
}
static void gen_cgt0_i64(TCGContext *s, TCGv_i64 d, TCGv_i64 a)
{
tcg_gen_setcondi_i64(s, TCG_COND_GT, d, a, 0);
tcg_gen_neg_i64(s, d, d);
}
static void gen_cgt0_vec(TCGContext *s, unsigned vece, TCGv_vec d, TCGv_vec a)
{
TCGv_vec zero = tcg_const_zeros_vec_matching(s, d);
tcg_gen_cmp_vec(s, TCG_COND_GT, vece, d, a, zero);
tcg_temp_free_vec(s, zero);
}
const GVecGen2 cgt0_op[4] = {
{ .fno = gen_helper_gvec_cgt0_b,
.fniv = gen_cgt0_vec,
.opt_opc = vecop_list_cmp,
.vece = MO_8 },
{ .fno = gen_helper_gvec_cgt0_h,
.fniv = gen_cgt0_vec,
.opt_opc = vecop_list_cmp,
.vece = MO_16 },
{ .fni4 = gen_cgt0_i32,
.fniv = gen_cgt0_vec,
.opt_opc = vecop_list_cmp,
.vece = MO_32 },
{ .fni8 = gen_cgt0_i64,
.fniv = gen_cgt0_vec,
.opt_opc = vecop_list_cmp,
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
.vece = MO_64 },
};
static void gen_ssra8_i64(TCGContext *s, TCGv_i64 d, TCGv_i64 a, int64_t shift)
{
tcg_gen_vec_sar8i_i64(s, a, a, shift);
@ -6613,6 +6812,27 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
tcg_gen_gvec_abs(tcg_ctx, size, rd_ofs, rm_ofs, vec_size, vec_size);
break;
case NEON_2RM_VCEQ0:
tcg_gen_gvec_2(tcg_ctx, rd_ofs, rm_ofs, vec_size,
vec_size, &ceq0_op[size]);
break;
case NEON_2RM_VCGT0:
tcg_gen_gvec_2(tcg_ctx, rd_ofs, rm_ofs, vec_size,
vec_size, &cgt0_op[size]);
break;
case NEON_2RM_VCLE0:
tcg_gen_gvec_2(tcg_ctx, rd_ofs, rm_ofs, vec_size,
vec_size, &cle0_op[size]);
break;
case NEON_2RM_VCGE0:
tcg_gen_gvec_2(tcg_ctx, rd_ofs, rm_ofs, vec_size,
vec_size, &cge0_op[size]);
break;
case NEON_2RM_VCLT0:
tcg_gen_gvec_2(tcg_ctx, rd_ofs, rm_ofs, vec_size,
vec_size, &clt0_op[size]);
break;
default:
elementwise:
for (pass = 0; pass < (q ? 4 : 2); pass++) {
@ -6675,42 +6895,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
default: abort();
}
break;
case NEON_2RM_VCGT0: case NEON_2RM_VCLE0:
tmp2 = tcg_const_i32(tcg_ctx, 0);
switch(size) {
case 0: gen_helper_neon_cgt_s8(tcg_ctx, tmp, tmp, tmp2); break;
case 1: gen_helper_neon_cgt_s16(tcg_ctx, tmp, tmp, tmp2); break;
case 2: gen_helper_neon_cgt_s32(tcg_ctx, tmp, tmp, tmp2); break;
default: abort();
}
tcg_temp_free_i32(tcg_ctx, tmp2);
if (op == NEON_2RM_VCLE0) {
tcg_gen_not_i32(tcg_ctx, tmp, tmp);
}
break;
case NEON_2RM_VCGE0: case NEON_2RM_VCLT0:
tmp2 = tcg_const_i32(tcg_ctx, 0);
switch(size) {
case 0: gen_helper_neon_cge_s8(tcg_ctx, tmp, tmp, tmp2); break;
case 1: gen_helper_neon_cge_s16(tcg_ctx, tmp, tmp, tmp2); break;
case 2: gen_helper_neon_cge_s32(tcg_ctx, tmp, tmp, tmp2); break;
default: abort();
}
tcg_temp_free_i32(tcg_ctx, tmp2);
if (op == NEON_2RM_VCLT0) {
tcg_gen_not_i32(tcg_ctx, tmp, tmp);
}
break;
case NEON_2RM_VCEQ0:
tmp2 = tcg_const_i32(tcg_ctx, 0);
switch(size) {
case 0: gen_helper_neon_ceq_u8(tcg_ctx, tmp, tmp, tmp2); break;
case 1: gen_helper_neon_ceq_u16(tcg_ctx, tmp, tmp, tmp2); break;
case 2: gen_helper_neon_ceq_u32(tcg_ctx, tmp, tmp, tmp2); break;
default: abort();
}
tcg_temp_free_i32(tcg_ctx, tmp2);
break;
case NEON_2RM_VCGT0_F:
{
TCGv_ptr fpstatus = get_fpstatus_ptr(s, 1);

5
qemu/target/arm/translate.h
View file

@ -282,6 +282,11 @@ static inline void gen_swstep_exception(DisasContext *s, int isv, int ex)
uint64_t vfp_expand_imm(int size, uint8_t imm8);
/* Vector operations shared between ARM and AArch64. */
extern const GVecGen2 ceq0_op[4];
extern const GVecGen2 clt0_op[4];
extern const GVecGen2 cgt0_op[4];
extern const GVecGen2 cle0_op[4];
extern const GVecGen2 cge0_op[4];
extern const GVecGen3 mla_op[4];
extern const GVecGen3 mls_op[4];
extern const GVecGen3 cmtst_op[4];

25
qemu/target/arm/vec_helper.c
View file

@ -1258,3 +1258,28 @@ void HELPER(sve2_pmull_h)(void *vd, void *vn, void *vm, uint32_t desc)
}
}
#endif
#define DO_CMP0(NAME, TYPE, OP) \
void HELPER(NAME)(void *vd, void *vn, uint32_t desc) \
{ \
intptr_t i, opr_sz = simd_oprsz(desc); \
for (i = 0; i < opr_sz; i += sizeof(TYPE)) { \
TYPE nn = *(TYPE *)(vn + i); \
*(TYPE *)(vd + i) = -(nn OP 0); \
} \
clear_tail(vd, opr_sz, simd_maxsz(desc)); \
}
DO_CMP0(gvec_ceq0_b, int8_t, ==)
DO_CMP0(gvec_clt0_b, int8_t, <)
DO_CMP0(gvec_cle0_b, int8_t, <=)
DO_CMP0(gvec_cgt0_b, int8_t, >)
DO_CMP0(gvec_cge0_b, int8_t, >=)
DO_CMP0(gvec_ceq0_h, int16_t, ==)
DO_CMP0(gvec_clt0_h, int16_t, <)
DO_CMP0(gvec_cle0_h, int16_t, <=)
DO_CMP0(gvec_cgt0_h, int16_t, >)
DO_CMP0(gvec_cge0_h, int16_t, >=)
#undef DO_CMP0

25
qemu/x86_64.h
View file

@ -1131,6 +1131,16 @@
#define helper_gvec_andc helper_gvec_andc_x86_64
#define helper_gvec_ands helper_gvec_ands_x86_64
#define helper_gvec_bitsel helper_gvec_bitsel_x86_64
#define helper_gvec_ceq0_b helper_gvec_ceq0_b_x86_64
#define helper_gvec_ceq0_h helper_gvec_ceq0_h_x86_64
#define helper_gvec_cge0_b helper_gvec_cge0_b_x86_64
#define helper_gvec_cge0_h helper_gvec_cge0_h_x86_64
#define helper_gvec_cgt0_b helper_gvec_cgt0_b_x86_64
#define helper_gvec_cgt0_h helper_gvec_cgt0_h_x86_64
#define helper_gvec_cle0_b helper_gvec_cle0_b_x86_64
#define helper_gvec_cle0_h helper_gvec_cle0_h_x86_64
#define helper_gvec_clt0_b helper_gvec_clt0_b_x86_64
#define helper_gvec_clt0_h helper_gvec_clt0_h_x86_64
#define helper_gvec_dup8 helper_gvec_dup8_x86_64
#define helper_gvec_dup16 helper_gvec_dup16_x86_64
#define helper_gvec_dup32 helper_gvec_dup32_x86_64
@ -1478,23 +1488,8 @@
#define helper_neon_addl_u16 helper_neon_addl_u16_x86_64
#define helper_neon_addl_u32 helper_neon_addl_u32_x86_64
#define helper_neon_ceq_f32 helper_neon_ceq_f32_x86_64
#define helper_neon_ceq_u16 helper_neon_ceq_u16_x86_64
#define helper_neon_ceq_u32 helper_neon_ceq_u32_x86_64
#define helper_neon_ceq_u8 helper_neon_ceq_u8_x86_64
#define helper_neon_cge_f32 helper_neon_cge_f32_x86_64
#define helper_neon_cge_s16 helper_neon_cge_s16_x86_64
#define helper_neon_cge_s32 helper_neon_cge_s32_x86_64
#define helper_neon_cge_s8 helper_neon_cge_s8_x86_64
#define helper_neon_cge_u16 helper_neon_cge_u16_x86_64
#define helper_neon_cge_u32 helper_neon_cge_u32_x86_64
#define helper_neon_cge_u8 helper_neon_cge_u8_x86_64
#define helper_neon_cgt_f32 helper_neon_cgt_f32_x86_64
#define helper_neon_cgt_s16 helper_neon_cgt_s16_x86_64
#define helper_neon_cgt_s32 helper_neon_cgt_s32_x86_64
#define helper_neon_cgt_s8 helper_neon_cgt_s8_x86_64
#define helper_neon_cgt_u16 helper_neon_cgt_u16_x86_64
#define helper_neon_cgt_u32 helper_neon_cgt_u32_x86_64
#define helper_neon_cgt_u8 helper_neon_cgt_u8_x86_64
#define helper_neon_cls_s16 helper_neon_cls_s16_x86_64
#define helper_neon_cls_s32 helper_neon_cls_s32_x86_64
#define helper_neon_cls_s8 helper_neon_cls_s8_x86_64