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target-sparc: Implement ldstub_asi inline
Backports commit fbb4bbb62e5603c991b880e25dc4bb30d342b944 from qemu
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adf9faf075
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@ -2158,6 +2158,21 @@ static void gen_swap(DisasContext *dc, TCGv dst, TCGv src,
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tcg_temp_free(tcg_ctx, t0);
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tcg_temp_free(tcg_ctx, t0);
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}
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}
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static void gen_ldstub(DisasContext *dc, TCGv dst, TCGv addr, int mmu_idx)
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{
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/* ??? Should be atomic. */
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TCGContext *tcg_ctx = dc->uc->tcg_ctx;
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TCGv_i32 t0 = tcg_temp_new_i32(tcg_ctx);
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TCGv_i32 t1 = tcg_const_i32(tcg_ctx, 0xff);
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gen_address_mask(dc, addr);
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tcg_gen_qemu_ld_i32(dc->uc, t0, addr, mmu_idx, MO_UB);
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tcg_gen_qemu_st_i32(dc->uc, t1, addr, mmu_idx, MO_UB);
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tcg_gen_extu_i32_tl(tcg_ctx, dst, t0);
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tcg_temp_free_i32(tcg_ctx, t0);
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tcg_temp_free_i32(tcg_ctx, t1);
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}
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/* asi moves */
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/* asi moves */
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#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
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#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
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typedef enum {
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typedef enum {
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@ -2499,31 +2514,17 @@ static void gen_cas_asi(DisasContext *dc, TCGv addr, TCGv val2,
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static void gen_ldstub_asi(DisasContext *dc, TCGv dst, TCGv addr, int insn)
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static void gen_ldstub_asi(DisasContext *dc, TCGv dst, TCGv addr, int insn)
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{
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{
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TCGContext *tcg_ctx = dc->uc->tcg_ctx;
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DisasASI da = get_asi(dc, insn, MO_UB);
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DisasASI da = get_asi(dc, insn, MO_UB);
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switch (da.type) {
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switch (da.type) {
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case GET_ASI_EXCP:
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case GET_ASI_EXCP:
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break;
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break;
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case GET_ASI_DIRECT:
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gen_ldstub(dc, dst, addr, da.mem_idx);
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break;
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default:
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default:
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{
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/* ??? Should be DAE_invalid_asi. */
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TCGv_i32 r_asi = tcg_const_i32(tcg_ctx, da.asi);
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gen_exception(dc, TT_DATA_ACCESS);
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TCGv_i32 r_mop = tcg_const_i32(tcg_ctx, MO_UB);
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TCGv_i64 s64, t64;
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save_state(dc);
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t64 = tcg_temp_new_i64(tcg_ctx);
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gen_helper_ld_asi(tcg_ctx, t64, tcg_ctx->cpu_env, addr, r_asi, r_mop);
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s64 = tcg_const_i64(tcg_ctx, 0xff);
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gen_helper_st_asi(tcg_ctx, tcg_ctx->cpu_env, addr, s64, r_asi, r_mop);
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tcg_temp_free_i64(tcg_ctx, s64);
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tcg_temp_free_i32(tcg_ctx, r_mop);
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tcg_temp_free_i32(tcg_ctx, r_asi);
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tcg_gen_trunc_i64_tl(tcg_ctx, dst, t64);
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tcg_temp_free_i64(tcg_ctx, t64);
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}
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break;
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break;
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}
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}
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}
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}
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@ -5368,19 +5369,8 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
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gen_address_mask(dc, cpu_addr);
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gen_address_mask(dc, cpu_addr);
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tcg_gen_qemu_ld16s(dc->uc, cpu_val, cpu_addr, dc->mem_idx);
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tcg_gen_qemu_ld16s(dc->uc, cpu_val, cpu_addr, dc->mem_idx);
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break;
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break;
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case 0xd: /* ldstub -- XXX: should be atomically */
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case 0xd: /* ldstub */
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{
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gen_ldstub(dc, cpu_val, cpu_addr, dc->mem_idx);
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TCGv r_const;
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TCGv tmp = tcg_temp_new(tcg_ctx);
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gen_address_mask(dc, cpu_addr);
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tcg_gen_qemu_ld8u(dc->uc, tmp, cpu_addr, dc->mem_idx);
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r_const = tcg_const_tl(tcg_ctx, 0xff);
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tcg_gen_qemu_st8(dc->uc, r_const, cpu_addr, dc->mem_idx);
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tcg_gen_mov_tl(tcg_ctx, cpu_val, tmp);
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tcg_temp_free(tcg_ctx, r_const);
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tcg_temp_free(tcg_ctx, tmp);
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}
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break;
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break;
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case 0x0f:
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case 0x0f:
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/* swap, swap register with memory. Also atomically */
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/* swap, swap register with memory. Also atomically */
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