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exec: Hard code size with MO_{8|16|32|64}

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Temporarily no-op size_memop was introduced to aid the conversion of
memory_region_dispatch_{read|write} operand "unsigned size" into
"MemOp op".

Now size_memop is implemented, again hard coded size but with
MO_{8|16|32|64}. This is more expressive and avoids size_memop calls.

Backports commit 07f0834f264a79d6225202bd35ca37f74afb8df1 from qemu
This commit is contained in:
Tony Nguyen 2020-01-07 18:33:12 -05:00 committed by Lioncash
parent cb5688009e
commit b335c4756a
1 changed files with 9 additions and 9 deletions
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18
qemu/memory_ldst.inc.c
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@ -42,7 +42,7 @@ static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
//release_lock |= prepare_mmio_access(mr); //release_lock |= prepare_mmio_access(mr);
/* I/O case */ /* I/O case */
r = memory_region_dispatch_read(mr, addr1, &val, size_memop(4), attrs); r = memory_region_dispatch_read(mr, addr1, &val, MO_32, attrs);
#if defined(TARGET_WORDS_BIGENDIAN) #if defined(TARGET_WORDS_BIGENDIAN)
if (endian == DEVICE_LITTLE_ENDIAN) { if (endian == DEVICE_LITTLE_ENDIAN) {
val = bswap32(val); val = bswap32(val);
@ -142,7 +142,7 @@ static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL,
//release_lock |= prepare_mmio_access(mr); //release_lock |= prepare_mmio_access(mr);
/* I/O case */ /* I/O case */
r = memory_region_dispatch_read(mr, addr1, &val, size_memop(8), attrs); r = memory_region_dispatch_read(mr, addr1, &val, MO_64, attrs);
#if defined(TARGET_WORDS_BIGENDIAN) #if defined(TARGET_WORDS_BIGENDIAN)
if (endian == DEVICE_LITTLE_ENDIAN) { if (endian == DEVICE_LITTLE_ENDIAN) {
val = bswap64(val); val = bswap64(val);
@ -240,7 +240,7 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1_DECL,
//release_lock |= prepare_mmio_access(mr); //release_lock |= prepare_mmio_access(mr);
/* I/O case */ /* I/O case */
r = memory_region_dispatch_read(mr, addr1, &val, size_memop(1), attrs); r = memory_region_dispatch_read(mr, addr1, &val, MO_8, attrs);
} else { } else {
/* RAM case */ /* RAM case */
ptr = qemu_map_ram_ptr(mr->uc, mr->ram_block, addr1); ptr = qemu_map_ram_ptr(mr->uc, mr->ram_block, addr1);
@ -288,7 +288,7 @@ static inline uint32_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL,
//release_lock |= prepare_mmio_access(mr); //release_lock |= prepare_mmio_access(mr);
/* I/O case */ /* I/O case */
r = memory_region_dispatch_read(mr, addr1, &val, size_memop(2), attrs); r = memory_region_dispatch_read(mr, addr1, &val, MO_16, attrs);
#if defined(TARGET_WORDS_BIGENDIAN) #if defined(TARGET_WORDS_BIGENDIAN)
if (endian == DEVICE_LITTLE_ENDIAN) { if (endian == DEVICE_LITTLE_ENDIAN) {
val = bswap16(val); val = bswap16(val);
@ -387,7 +387,7 @@ void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL,
// Unicorn: commented out // Unicorn: commented out
//release_lock |= prepare_mmio_access(mr); //release_lock |= prepare_mmio_access(mr);
r = memory_region_dispatch_write(mr, addr1, val, size_memop(4), attrs); r = memory_region_dispatch_write(mr, addr1, val, MO_32, attrs);
} else { } else {
ptr = qemu_map_ram_ptr(mr->uc, mr->ram_block, addr1); ptr = qemu_map_ram_ptr(mr->uc, mr->ram_block, addr1);
stl_p(ptr, val); stl_p(ptr, val);
@ -440,7 +440,7 @@ static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
val = bswap32(val); val = bswap32(val);
} }
#endif #endif
r = memory_region_dispatch_write(mr, addr1, val, size_memop(4), attrs); r = memory_region_dispatch_write(mr, addr1, val, MO_32, attrs);
} else { } else {
/* RAM case */ /* RAM case */
ptr = qemu_map_ram_ptr(mr->uc, mr->ram_block, addr1); ptr = qemu_map_ram_ptr(mr->uc, mr->ram_block, addr1);
@ -526,7 +526,7 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL,
if (!memory_access_is_direct(mr, true)) { if (!memory_access_is_direct(mr, true)) {
// Unicorn: commented out // Unicorn: commented out
//release_lock |= prepare_mmio_access(mr); //release_lock |= prepare_mmio_access(mr);
r = memory_region_dispatch_write(mr, addr1, val, size_memop(1), attrs); r = memory_region_dispatch_write(mr, addr1, val, MO_8, attrs);
} else { } else {
/* RAM case */ /* RAM case */
ptr = qemu_map_ram_ptr(mr->uc, mr->ram_block, addr1); ptr = qemu_map_ram_ptr(mr->uc, mr->ram_block, addr1);
@ -581,7 +581,7 @@ static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL,
val = bswap16(val); val = bswap16(val);
} }
#endif #endif
r = memory_region_dispatch_write(mr, addr1, val, size_memop(2), attrs); r = memory_region_dispatch_write(mr, addr1, val, MO_16, attrs);
} else { } else {
/* RAM case */ /* RAM case */
ptr = qemu_map_ram_ptr(mr->uc, mr->ram_block, addr1); ptr = qemu_map_ram_ptr(mr->uc, mr->ram_block, addr1);
@ -678,7 +678,7 @@ static void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
val = bswap64(val); val = bswap64(val);
} }
#endif #endif
r = memory_region_dispatch_write(mr, addr1, val, size_memop(8), attrs); r = memory_region_dispatch_write(mr, addr1, val, MO_64, attrs);
} else { } else {
/* RAM case */ /* RAM case */
ptr = qemu_map_ram_ptr(mr->uc, mr->ram_block, addr1); ptr = qemu_map_ram_ptr(mr->uc, mr->ram_block, addr1);