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target/arm: Forbid unprivileged mode for M Baseline

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MSR handling is the only place where CONTROL.nPRIV is modified.

Backports commit def183446cebc0090f6d885383a6502302249f33 from qemu
This commit is contained in:
Julia Suvorova 2018-08-16 06:34:22 -04:00 committed by Lioncash
parent 2fc23292ad
commit b67b948feb
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 8 additions and 4 deletions
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12
qemu/target/arm/helper.c
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@ -9933,8 +9933,10 @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t maskreg, uint32_t val)
write_v7m_control_spsel_for_secstate(env, write_v7m_control_spsel_for_secstate(env,
val & R_V7M_CONTROL_SPSEL_MASK, val & R_V7M_CONTROL_SPSEL_MASK,
M_REG_NS); M_REG_NS);
env->v7m.control[M_REG_NS] &= ~R_V7M_CONTROL_NPRIV_MASK; if (arm_feature(env, ARM_FEATURE_M_MAIN)) {
env->v7m.control[M_REG_NS] |= val & R_V7M_CONTROL_NPRIV_MASK; env->v7m.control[M_REG_NS] &= ~R_V7M_CONTROL_NPRIV_MASK;
env->v7m.control[M_REG_NS] |= val & R_V7M_CONTROL_NPRIV_MASK;
}
return; return;
case 0x98: /* SP_NS */ case 0x98: /* SP_NS */
{ {
@ -10034,8 +10036,10 @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t maskreg, uint32_t val)
!arm_v7m_is_handler_mode(env)) { !arm_v7m_is_handler_mode(env)) {
write_v7m_control_spsel(env, (val & R_V7M_CONTROL_SPSEL_MASK) != 0); write_v7m_control_spsel(env, (val & R_V7M_CONTROL_SPSEL_MASK) != 0);
} }
env->v7m.control[env->v7m.secure] &= ~R_V7M_CONTROL_NPRIV_MASK; if (arm_feature(env, ARM_FEATURE_M_MAIN)) {
env->v7m.control[env->v7m.secure] |= val & R_V7M_CONTROL_NPRIV_MASK; env->v7m.control[env->v7m.secure] &= ~R_V7M_CONTROL_NPRIV_MASK;
env->v7m.control[env->v7m.secure] |= val & R_V7M_CONTROL_NPRIV_MASK;
}
break; break;
default: default:
bad_reg: bad_reg: