mirror of
https://github.com/yuzu-emu/unicorn.git
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target/riscv: vector floating-point compare instructions
Backports 2a68e9e568faddf4d689a37fa6895bcb8404a677
This commit is contained in:
LIU Zhiwei
Lioncash
parent
31978f270b
commit
b859be12b9
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@ -7124,6 +7124,42 @@ riscv_symbols = (
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'helper_vfsgnjx_vf_h',
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'helper_vfsgnjx_vf_w',
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'helper_vfsgnjx_vf_d',
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'helper_vmfeq_vv_h',
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'helper_vmfeq_vv_w',
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'helper_vmfeq_vv_d',
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'helper_vmfne_vv_h',
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'helper_vmfne_vv_w',
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'helper_vmfne_vv_d',
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'helper_vmflt_vv_h',
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'helper_vmflt_vv_w',
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'helper_vmflt_vv_d',
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'helper_vmfle_vv_h',
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'helper_vmfle_vv_w',
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'helper_vmfle_vv_d',
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'helper_vmfeq_vf_h',
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'helper_vmfeq_vf_w',
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'helper_vmfeq_vf_d',
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'helper_vmfne_vf_h',
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'helper_vmfne_vf_w',
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'helper_vmfne_vf_d',
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'helper_vmflt_vf_h',
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'helper_vmflt_vf_w',
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'helper_vmflt_vf_d',
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'helper_vmfle_vf_h',
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'helper_vmfle_vf_w',
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'helper_vmfle_vf_d',
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'helper_vmfgt_vf_h',
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'helper_vmfgt_vf_w',
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'helper_vmfgt_vf_d',
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'helper_vmfge_vf_h',
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'helper_vmfge_vf_w',
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'helper_vmfge_vf_d',
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'helper_vmford_vv_h',
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'helper_vmford_vv_w',
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'helper_vmford_vv_d',
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'helper_vmford_vf_h',
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'helper_vmford_vf_w',
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'helper_vmford_vf_d',
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'pmp_hart_has_privs',
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'pmpaddr_csr_read',
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'pmpaddr_csr_write',
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@ -4560,6 +4560,42 @@
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#define helper_vfsgnjx_vf_h helper_vfsgnjx_vf_h_riscv32
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#define helper_vfsgnjx_vf_w helper_vfsgnjx_vf_w_riscv32
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#define helper_vfsgnjx_vf_d helper_vfsgnjx_vf_d_riscv32
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#define helper_vmfeq_vv_h helper_vmfeq_vv_h_riscv32
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#define helper_vmfeq_vv_w helper_vmfeq_vv_w_riscv32
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#define helper_vmfeq_vv_d helper_vmfeq_vv_d_riscv32
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#define helper_vmfne_vv_h helper_vmfne_vv_h_riscv32
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#define helper_vmfne_vv_w helper_vmfne_vv_w_riscv32
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#define helper_vmfne_vv_d helper_vmfne_vv_d_riscv32
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#define helper_vmflt_vv_h helper_vmflt_vv_h_riscv32
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#define helper_vmflt_vv_w helper_vmflt_vv_w_riscv32
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#define helper_vmflt_vv_d helper_vmflt_vv_d_riscv32
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#define helper_vmfle_vv_h helper_vmfle_vv_h_riscv32
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#define helper_vmfle_vv_w helper_vmfle_vv_w_riscv32
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#define helper_vmfle_vv_d helper_vmfle_vv_d_riscv32
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#define helper_vmfeq_vf_h helper_vmfeq_vf_h_riscv32
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#define helper_vmfeq_vf_w helper_vmfeq_vf_w_riscv32
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#define helper_vmfeq_vf_d helper_vmfeq_vf_d_riscv32
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#define helper_vmfne_vf_h helper_vmfne_vf_h_riscv32
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#define helper_vmfne_vf_w helper_vmfne_vf_w_riscv32
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#define helper_vmfne_vf_d helper_vmfne_vf_d_riscv32
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#define helper_vmflt_vf_h helper_vmflt_vf_h_riscv32
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#define helper_vmflt_vf_w helper_vmflt_vf_w_riscv32
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#define helper_vmflt_vf_d helper_vmflt_vf_d_riscv32
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#define helper_vmfle_vf_h helper_vmfle_vf_h_riscv32
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#define helper_vmfle_vf_w helper_vmfle_vf_w_riscv32
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#define helper_vmfle_vf_d helper_vmfle_vf_d_riscv32
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#define helper_vmfgt_vf_h helper_vmfgt_vf_h_riscv32
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#define helper_vmfgt_vf_w helper_vmfgt_vf_w_riscv32
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#define helper_vmfgt_vf_d helper_vmfgt_vf_d_riscv32
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#define helper_vmfge_vf_h helper_vmfge_vf_h_riscv32
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#define helper_vmfge_vf_w helper_vmfge_vf_w_riscv32
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#define helper_vmfge_vf_d helper_vmfge_vf_d_riscv32
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#define helper_vmford_vv_h helper_vmford_vv_h_riscv32
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#define helper_vmford_vv_w helper_vmford_vv_w_riscv32
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#define helper_vmford_vv_d helper_vmford_vv_d_riscv32
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#define helper_vmford_vf_h helper_vmford_vf_h_riscv32
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#define helper_vmford_vf_w helper_vmford_vf_w_riscv32
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#define helper_vmford_vf_d helper_vmford_vf_d_riscv32
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#define pmp_hart_has_privs pmp_hart_has_privs_riscv32
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#define pmpaddr_csr_read pmpaddr_csr_read_riscv32
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#define pmpaddr_csr_write pmpaddr_csr_write_riscv32
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@ -4560,6 +4560,42 @@
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#define helper_vfsgnjx_vf_h helper_vfsgnjx_vf_h_riscv64
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#define helper_vfsgnjx_vf_w helper_vfsgnjx_vf_w_riscv64
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#define helper_vfsgnjx_vf_d helper_vfsgnjx_vf_d_riscv64
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#define helper_vmfeq_vv_h helper_vmfeq_vv_h_riscv64
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#define helper_vmfeq_vv_w helper_vmfeq_vv_w_riscv64
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#define helper_vmfeq_vv_d helper_vmfeq_vv_d_riscv64
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#define helper_vmfne_vv_h helper_vmfne_vv_h_riscv64
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#define helper_vmfne_vv_w helper_vmfne_vv_w_riscv64
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#define helper_vmfne_vv_d helper_vmfne_vv_d_riscv64
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#define helper_vmflt_vv_h helper_vmflt_vv_h_riscv64
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#define helper_vmflt_vv_w helper_vmflt_vv_w_riscv64
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#define helper_vmflt_vv_d helper_vmflt_vv_d_riscv64
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#define helper_vmfle_vv_h helper_vmfle_vv_h_riscv64
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#define helper_vmfle_vv_w helper_vmfle_vv_w_riscv64
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#define helper_vmfle_vv_d helper_vmfle_vv_d_riscv64
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#define helper_vmfeq_vf_h helper_vmfeq_vf_h_riscv64
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#define helper_vmfeq_vf_w helper_vmfeq_vf_w_riscv64
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#define helper_vmfeq_vf_d helper_vmfeq_vf_d_riscv64
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#define helper_vmfne_vf_h helper_vmfne_vf_h_riscv64
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#define helper_vmfne_vf_w helper_vmfne_vf_w_riscv64
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#define helper_vmfne_vf_d helper_vmfne_vf_d_riscv64
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#define helper_vmflt_vf_h helper_vmflt_vf_h_riscv64
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#define helper_vmflt_vf_w helper_vmflt_vf_w_riscv64
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#define helper_vmflt_vf_d helper_vmflt_vf_d_riscv64
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#define helper_vmfle_vf_h helper_vmfle_vf_h_riscv64
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#define helper_vmfle_vf_w helper_vmfle_vf_w_riscv64
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#define helper_vmfle_vf_d helper_vmfle_vf_d_riscv64
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#define helper_vmfgt_vf_h helper_vmfgt_vf_h_riscv64
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#define helper_vmfgt_vf_w helper_vmfgt_vf_w_riscv64
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#define helper_vmfgt_vf_d helper_vmfgt_vf_d_riscv64
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#define helper_vmfge_vf_h helper_vmfge_vf_h_riscv64
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#define helper_vmfge_vf_w helper_vmfge_vf_w_riscv64
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#define helper_vmfge_vf_d helper_vmfge_vf_d_riscv64
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#define helper_vmford_vv_h helper_vmford_vv_h_riscv64
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#define helper_vmford_vv_w helper_vmford_vv_w_riscv64
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#define helper_vmford_vv_d helper_vmford_vv_d_riscv64
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#define helper_vmford_vf_h helper_vmford_vf_h_riscv64
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#define helper_vmford_vf_w helper_vmford_vf_w_riscv64
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#define helper_vmford_vf_d helper_vmford_vf_d_riscv64
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#define pmp_hart_has_privs pmp_hart_has_privs_riscv64
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#define pmpaddr_csr_read pmpaddr_csr_read_riscv64
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#define pmpaddr_csr_write pmpaddr_csr_write_riscv64
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@ -962,3 +962,40 @@ DEF_HELPER_6(vfsgnjn_vf_d, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vfsgnjx_vf_h, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vfsgnjx_vf_w, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vfsgnjx_vf_d, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmfeq_vv_h, void, ptr, ptr, ptr, ptr, env, i32)
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DEF_HELPER_6(vmfeq_vv_w, void, ptr, ptr, ptr, ptr, env, i32)
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DEF_HELPER_6(vmfeq_vv_d, void, ptr, ptr, ptr, ptr, env, i32)
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DEF_HELPER_6(vmfne_vv_h, void, ptr, ptr, ptr, ptr, env, i32)
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DEF_HELPER_6(vmfne_vv_w, void, ptr, ptr, ptr, ptr, env, i32)
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DEF_HELPER_6(vmfne_vv_d, void, ptr, ptr, ptr, ptr, env, i32)
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DEF_HELPER_6(vmflt_vv_h, void, ptr, ptr, ptr, ptr, env, i32)
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DEF_HELPER_6(vmflt_vv_w, void, ptr, ptr, ptr, ptr, env, i32)
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DEF_HELPER_6(vmflt_vv_d, void, ptr, ptr, ptr, ptr, env, i32)
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DEF_HELPER_6(vmfle_vv_h, void, ptr, ptr, ptr, ptr, env, i32)
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DEF_HELPER_6(vmfle_vv_w, void, ptr, ptr, ptr, ptr, env, i32)
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DEF_HELPER_6(vmfle_vv_d, void, ptr, ptr, ptr, ptr, env, i32)
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DEF_HELPER_6(vmfeq_vf_h, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmfeq_vf_w, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmfeq_vf_d, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmfne_vf_h, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmfne_vf_w, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmfne_vf_d, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmflt_vf_h, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmflt_vf_w, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmflt_vf_d, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmfle_vf_h, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmfle_vf_w, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmfle_vf_d, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmfgt_vf_h, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmfgt_vf_w, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmfgt_vf_d, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmfge_vf_h, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmfge_vf_w, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmfge_vf_d, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmford_vv_h, void, ptr, ptr, ptr, ptr, env, i32)
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DEF_HELPER_6(vmford_vv_w, void, ptr, ptr, ptr, ptr, env, i32)
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DEF_HELPER_6(vmford_vv_d, void, ptr, ptr, ptr, ptr, env, i32)
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DEF_HELPER_6(vmford_vf_h, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmford_vf_w, void, ptr, ptr, i64, ptr, env, i32)
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DEF_HELPER_6(vmford_vf_d, void, ptr, ptr, i64, ptr, env, i32)
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@ -502,6 +502,18 @@ vfsgnjn_vv 001001 . ..... ..... 001 ..... 1010111 @r_vm
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vfsgnjn_vf 001001 . ..... ..... 101 ..... 1010111 @r_vm
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vfsgnjx_vv 001010 . ..... ..... 001 ..... 1010111 @r_vm
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vfsgnjx_vf 001010 . ..... ..... 101 ..... 1010111 @r_vm
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vmfeq_vv 011000 . ..... ..... 001 ..... 1010111 @r_vm
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vmfeq_vf 011000 . ..... ..... 101 ..... 1010111 @r_vm
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vmfne_vv 011100 . ..... ..... 001 ..... 1010111 @r_vm
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vmfne_vf 011100 . ..... ..... 101 ..... 1010111 @r_vm
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vmflt_vv 011011 . ..... ..... 001 ..... 1010111 @r_vm
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vmflt_vf 011011 . ..... ..... 101 ..... 1010111 @r_vm
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vmfle_vv 011001 . ..... ..... 001 ..... 1010111 @r_vm
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vmfle_vf 011001 . ..... ..... 101 ..... 1010111 @r_vm
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vmfgt_vf 011101 . ..... ..... 101 ..... 1010111 @r_vm
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vmfge_vf 011111 . ..... ..... 101 ..... 1010111 @r_vm
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vmford_vv 011010 . ..... ..... 001 ..... 1010111 @r_vm
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vmford_vf 011010 . ..... ..... 101 ..... 1010111 @r_vm
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vsetvli 0 ........... ..... 111 ..... 1010111 @r2_zimm
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vsetvl 1000000 ..... ..... 111 ..... 1010111 @r
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@ -2179,3 +2179,38 @@ GEN_OPFVV_TRANS(vfsgnjx_vv, opfvv_check)
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GEN_OPFVF_TRANS(vfsgnj_vf, opfvf_check)
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GEN_OPFVF_TRANS(vfsgnjn_vf, opfvf_check)
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GEN_OPFVF_TRANS(vfsgnjx_vf, opfvf_check)
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/* Vector Floating-Point Compare Instructions */
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static bool opfvv_cmp_check(DisasContext *s, arg_rmrr *a)
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{
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return (vext_check_isa_ill(s) &&
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vext_check_reg(s, a->rs2, false) &&
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vext_check_reg(s, a->rs1, false) &&
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(s->sew != 0) &&
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((vext_check_overlap_group(a->rd, 1, a->rs1, 1 << s->lmul) &&
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vext_check_overlap_group(a->rd, 1, a->rs2, 1 << s->lmul)) ||
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(s->lmul == 0)));
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}
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GEN_OPFVV_TRANS(vmfeq_vv, opfvv_cmp_check)
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GEN_OPFVV_TRANS(vmfne_vv, opfvv_cmp_check)
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GEN_OPFVV_TRANS(vmflt_vv, opfvv_cmp_check)
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GEN_OPFVV_TRANS(vmfle_vv, opfvv_cmp_check)
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GEN_OPFVV_TRANS(vmford_vv, opfvv_cmp_check)
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static bool opfvf_cmp_check(DisasContext *s, arg_rmrr *a)
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{
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return (vext_check_isa_ill(s) &&
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vext_check_reg(s, a->rs2, false) &&
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(s->sew != 0) &&
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(vext_check_overlap_group(a->rd, 1, a->rs2, 1 << s->lmul) ||
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(s->lmul == 0)));
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}
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GEN_OPFVF_TRANS(vmfeq_vf, opfvf_cmp_check)
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GEN_OPFVF_TRANS(vmfne_vf, opfvf_cmp_check)
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GEN_OPFVF_TRANS(vmflt_vf, opfvf_cmp_check)
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GEN_OPFVF_TRANS(vmfle_vf, opfvf_cmp_check)
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GEN_OPFVF_TRANS(vmfgt_vf, opfvf_cmp_check)
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GEN_OPFVF_TRANS(vmfge_vf, opfvf_cmp_check)
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GEN_OPFVF_TRANS(vmford_vf, opfvf_cmp_check)
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@ -3930,3 +3930,152 @@ RVVCALL(OPFVF2, vfsgnjx_vf_d, OP_UUU_D, H8, H8, fsgnjx64)
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GEN_VEXT_VF(vfsgnjx_vf_h, 2, 2, clearh)
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GEN_VEXT_VF(vfsgnjx_vf_w, 4, 4, clearl)
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GEN_VEXT_VF(vfsgnjx_vf_d, 8, 8, clearq)
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/* Vector Floating-Point Compare Instructions */
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#define GEN_VEXT_CMP_VV_ENV(NAME, ETYPE, H, DO_OP) \
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void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2, \
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CPURISCVState *env, uint32_t desc) \
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{ \
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uint32_t mlen = vext_mlen(desc); \
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uint32_t vm = vext_vm(desc); \
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uint32_t vl = env->vl; \
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uint32_t vlmax = vext_maxsz(desc) / sizeof(ETYPE); \
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uint32_t i; \
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\
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for (i = 0; i < vl; i++) { \
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ETYPE s1 = *((ETYPE *)vs1 + H(i)); \
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ETYPE s2 = *((ETYPE *)vs2 + H(i)); \
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if (!vm && !vext_elem_mask(v0, mlen, i)) { \
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continue; \
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} \
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vext_set_elem_mask(vd, mlen, i, \
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DO_OP(s2, s1, &env->fp_status)); \
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} \
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for (; i < vlmax; i++) { \
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vext_set_elem_mask(vd, mlen, i, 0); \
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} \
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}
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GEN_VEXT_CMP_VV_ENV(vmfeq_vv_h, uint16_t, H2, float16_eq_quiet)
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GEN_VEXT_CMP_VV_ENV(vmfeq_vv_w, uint32_t, H4, float32_eq_quiet)
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GEN_VEXT_CMP_VV_ENV(vmfeq_vv_d, uint64_t, H8, float64_eq_quiet)
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#define GEN_VEXT_CMP_VF(NAME, ETYPE, H, DO_OP) \
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void HELPER(NAME)(void *vd, void *v0, uint64_t s1, void *vs2, \
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CPURISCVState *env, uint32_t desc) \
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{ \
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uint32_t mlen = vext_mlen(desc); \
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uint32_t vm = vext_vm(desc); \
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uint32_t vl = env->vl; \
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uint32_t vlmax = vext_maxsz(desc) / sizeof(ETYPE); \
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uint32_t i; \
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||||
\
|
||||
for (i = 0; i < vl; i++) { \
|
||||
ETYPE s2 = *((ETYPE *)vs2 + H(i)); \
|
||||
if (!vm && !vext_elem_mask(v0, mlen, i)) { \
|
||||
continue; \
|
||||
} \
|
||||
vext_set_elem_mask(vd, mlen, i, \
|
||||
DO_OP(s2, (ETYPE)s1, &env->fp_status)); \
|
||||
} \
|
||||
for (; i < vlmax; i++) { \
|
||||
vext_set_elem_mask(vd, mlen, i, 0); \
|
||||
} \
|
||||
}
|
||||
|
||||
GEN_VEXT_CMP_VF(vmfeq_vf_h, uint16_t, H2, float16_eq_quiet)
|
||||
GEN_VEXT_CMP_VF(vmfeq_vf_w, uint32_t, H4, float32_eq_quiet)
|
||||
GEN_VEXT_CMP_VF(vmfeq_vf_d, uint64_t, H8, float64_eq_quiet)
|
||||
|
||||
static bool vmfne16(uint16_t a, uint16_t b, float_status *s)
|
||||
{
|
||||
FloatRelation compare = float16_compare_quiet(a, b, s);
|
||||
return compare != float_relation_equal;
|
||||
}
|
||||
|
||||
static bool vmfne32(uint32_t a, uint32_t b, float_status *s)
|
||||
{
|
||||
FloatRelation compare = float32_compare_quiet(a, b, s);
|
||||
return compare != float_relation_equal;
|
||||
}
|
||||
|
||||
static bool vmfne64(uint64_t a, uint64_t b, float_status *s)
|
||||
{
|
||||
FloatRelation compare = float64_compare_quiet(a, b, s);
|
||||
return compare != float_relation_equal;
|
||||
}
|
||||
|
||||
GEN_VEXT_CMP_VV_ENV(vmfne_vv_h, uint16_t, H2, vmfne16)
|
||||
GEN_VEXT_CMP_VV_ENV(vmfne_vv_w, uint32_t, H4, vmfne32)
|
||||
GEN_VEXT_CMP_VV_ENV(vmfne_vv_d, uint64_t, H8, vmfne64)
|
||||
GEN_VEXT_CMP_VF(vmfne_vf_h, uint16_t, H2, vmfne16)
|
||||
GEN_VEXT_CMP_VF(vmfne_vf_w, uint32_t, H4, vmfne32)
|
||||
GEN_VEXT_CMP_VF(vmfne_vf_d, uint64_t, H8, vmfne64)
|
||||
|
||||
GEN_VEXT_CMP_VV_ENV(vmflt_vv_h, uint16_t, H2, float16_lt)
|
||||
GEN_VEXT_CMP_VV_ENV(vmflt_vv_w, uint32_t, H4, float32_lt)
|
||||
GEN_VEXT_CMP_VV_ENV(vmflt_vv_d, uint64_t, H8, float64_lt)
|
||||
GEN_VEXT_CMP_VF(vmflt_vf_h, uint16_t, H2, float16_lt)
|
||||
GEN_VEXT_CMP_VF(vmflt_vf_w, uint32_t, H4, float32_lt)
|
||||
GEN_VEXT_CMP_VF(vmflt_vf_d, uint64_t, H8, float64_lt)
|
||||
|
||||
GEN_VEXT_CMP_VV_ENV(vmfle_vv_h, uint16_t, H2, float16_le)
|
||||
GEN_VEXT_CMP_VV_ENV(vmfle_vv_w, uint32_t, H4, float32_le)
|
||||
GEN_VEXT_CMP_VV_ENV(vmfle_vv_d, uint64_t, H8, float64_le)
|
||||
GEN_VEXT_CMP_VF(vmfle_vf_h, uint16_t, H2, float16_le)
|
||||
GEN_VEXT_CMP_VF(vmfle_vf_w, uint32_t, H4, float32_le)
|
||||
GEN_VEXT_CMP_VF(vmfle_vf_d, uint64_t, H8, float64_le)
|
||||
|
||||
static bool vmfgt16(uint16_t a, uint16_t b, float_status *s)
|
||||
{
|
||||
FloatRelation compare = float16_compare(a, b, s);
|
||||
return compare == float_relation_greater;
|
||||
}
|
||||
|
||||
static bool vmfgt32(uint32_t a, uint32_t b, float_status *s)
|
||||
{
|
||||
FloatRelation compare = float32_compare(a, b, s);
|
||||
return compare == float_relation_greater;
|
||||
}
|
||||
|
||||
static bool vmfgt64(uint64_t a, uint64_t b, float_status *s)
|
||||
{
|
||||
FloatRelation compare = float64_compare(a, b, s);
|
||||
return compare == float_relation_greater;
|
||||
}
|
||||
|
||||
GEN_VEXT_CMP_VF(vmfgt_vf_h, uint16_t, H2, vmfgt16)
|
||||
GEN_VEXT_CMP_VF(vmfgt_vf_w, uint32_t, H4, vmfgt32)
|
||||
GEN_VEXT_CMP_VF(vmfgt_vf_d, uint64_t, H8, vmfgt64)
|
||||
|
||||
static bool vmfge16(uint16_t a, uint16_t b, float_status *s)
|
||||
{
|
||||
FloatRelation compare = float16_compare(a, b, s);
|
||||
return compare == float_relation_greater ||
|
||||
compare == float_relation_equal;
|
||||
}
|
||||
|
||||
static bool vmfge32(uint32_t a, uint32_t b, float_status *s)
|
||||
{
|
||||
FloatRelation compare = float32_compare(a, b, s);
|
||||
return compare == float_relation_greater ||
|
||||
compare == float_relation_equal;
|
||||
}
|
||||
|
||||
static bool vmfge64(uint64_t a, uint64_t b, float_status *s)
|
||||
{
|
||||
FloatRelation compare = float64_compare(a, b, s);
|
||||
return compare == float_relation_greater ||
|
||||
compare == float_relation_equal;
|
||||
}
|
||||
|
||||
GEN_VEXT_CMP_VF(vmfge_vf_h, uint16_t, H2, vmfge16)
|
||||
GEN_VEXT_CMP_VF(vmfge_vf_w, uint32_t, H4, vmfge32)
|
||||
GEN_VEXT_CMP_VF(vmfge_vf_d, uint64_t, H8, vmfge64)
|
||||
|
||||
GEN_VEXT_CMP_VV_ENV(vmford_vv_h, uint16_t, H2, !float16_unordered_quiet)
|
||||
GEN_VEXT_CMP_VV_ENV(vmford_vv_w, uint32_t, H4, !float32_unordered_quiet)
|
||||
GEN_VEXT_CMP_VV_ENV(vmford_vv_d, uint64_t, H8, !float64_unordered_quiet)
|
||||
GEN_VEXT_CMP_VF(vmford_vf_h, uint16_t, H2, !float16_unordered_quiet)
|
||||
GEN_VEXT_CMP_VF(vmford_vf_w, uint32_t, H4, !float32_unordered_quiet)
|
||||
GEN_VEXT_CMP_VF(vmford_vf_d, uint64_t, H8, !float64_unordered_quiet)
|
||||
|
|
|
|||
Loading…
Reference in a new issue