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https://github.com/yuzu-emu/unicorn.git
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tcg: Transition flat op_defs array to a target callback
This will allow the target to tailor the constraints to the auto-detected ISA extensions. Backports commit f69d277ece43c42c7ab0144c2ff05ba740f6706b from qemu
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551ef0a9f7
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@ -1827,6 +1827,18 @@ static const TCGTargetOpDef aarch64_op_defs[] = {
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{ -1 },
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};
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static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
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{
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int i, n = ARRAY_SIZE(aarch64_op_defs);
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for (i = 0; i < n; ++i) {
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if (aarch64_op_defs[i].op == op) {
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return &aarch64_op_defs[i];
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}
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}
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return NULL;
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}
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static void tcg_target_init(TCGContext *s)
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{
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tcg_regset_set32(s->tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
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@ -1849,8 +1861,6 @@ static void tcg_target_init(TCGContext *s)
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_FP);
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP);
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_X18); /* platform register */
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tcg_add_target_add_op_defs(s, aarch64_op_defs);
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}
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/* Saving pairs: (X19, X20) .. (X27, X28), (X29(fp), X30(lr)). */
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@ -2017,6 +2017,18 @@ static const TCGTargetOpDef arm_op_defs[] = {
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{ -1 },
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};
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static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
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{
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int i, n = ARRAY_SIZE(arm_op_defs);
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for (i = 0; i < n; ++i) {
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if (arm_op_defs[i].op == op) {
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return &arm_op_defs[i];
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}
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}
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return NULL;
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}
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static void tcg_target_init(TCGContext *s)
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{
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/* Only probe for the platform and capabilities if we havn't already
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@ -2047,8 +2059,6 @@ static void tcg_target_init(TCGContext *s)
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP);
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_PC);
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tcg_add_target_add_op_defs(s, arm_op_defs);
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}
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static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg arg,
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@ -2431,6 +2431,18 @@ static const TCGTargetOpDef x86_op_defs[] = {
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{ -1 },
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};
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static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
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{
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int i, n = ARRAY_SIZE(x86_op_defs);
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for (i = 0; i < n; ++i) {
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if (x86_op_defs[i].op == op) {
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return &x86_op_defs[i];
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}
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}
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return NULL;
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}
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static int tcg_target_callee_save_regs[] = {
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#if TCG_TARGET_REG_BITS == 64
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TCG_REG_RBP,
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@ -2592,6 +2604,4 @@ static void tcg_target_init(TCGContext *s)
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tcg_regset_clear(s->reserved_regs);
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
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tcg_add_target_add_op_defs(s, x86_op_defs);
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}
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@ -2276,6 +2276,18 @@ static const TCGTargetOpDef mips_op_defs[] = {
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{ -1 },
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};
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static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
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{
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int i, n = ARRAY_SIZE(mips_op_defs);
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for (i = 0; i < n; ++i) {
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if (mips_op_defs[i].op == op) {
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return &mips_op_defs[i];
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}
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}
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return NULL;
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}
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static int tcg_target_callee_save_regs[] = {
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TCG_REG_S0, /* used for the global env (TCG_AREG0) */
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TCG_REG_S1,
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@ -2578,8 +2590,6 @@ static void tcg_target_init(TCGContext *s)
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_RA); /* return address */
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_SP); /* stack pointer */
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_GP); /* global pointer */
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tcg_add_target_add_op_defs(s, mips_op_defs);
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}
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void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
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@ -2625,6 +2625,18 @@ static const TCGTargetOpDef ppc_op_defs[] = {
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{ -1 },
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};
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static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
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{
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int i, n = ARRAY_SIZE(ppc_op_defs);
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for (i = 0; i < n; ++i) {
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if (ppc_op_defs[i].op == op) {
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return &ppc_op_defs[i];
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}
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}
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return NULL;
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}
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static void tcg_target_init(TCGContext *s)
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{
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unsigned long hwcap = qemu_getauxval(AT_HWCAP);
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@ -2661,8 +2673,6 @@ static void tcg_target_init(TCGContext *s)
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if (USE_REG_RA) {
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_RA); /* return addr */
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}
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tcg_add_target_add_op_defs(s, ppc_op_defs);
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}
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#ifdef __ELF__
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@ -2350,6 +2350,18 @@ static void query_s390_facilities(void)
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}
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}
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static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
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{
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int i, n = ARRAY_SIZE(s390_op_defs);
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for (i = 0; i < n; ++i) {
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if (s390_op_defs[i].op == op) {
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return &s390_op_defs[i];
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}
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}
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return NULL;
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}
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static void tcg_target_init(TCGContext *s)
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{
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query_s390_facilities();
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@ -2375,8 +2387,6 @@ static void tcg_target_init(TCGContext *s)
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/* XXX many insns can't be used with R0, so we better avoid it for now */
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0);
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
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tcg_add_target_add_op_defs(s, s390_op_defs);
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}
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#define FRAME_SIZE ((int)(TCG_TARGET_CALL_STACK_OFFSET \
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@ -1585,6 +1585,18 @@ static const TCGTargetOpDef sparc_op_defs[] = {
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{ -1 },
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};
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static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
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{
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int i, n = ARRAY_SIZE(sparc_op_defs);
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for (i = 0; i < n; ++i) {
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if (sparc_op_defs[i].op == op) {
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return &sparc_op_defs[i];
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}
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}
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return NULL;
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}
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static void tcg_target_init(TCGContext *s)
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{
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/* Only probe for the platform and capabilities if we havn't already
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@ -1624,8 +1636,6 @@ static void tcg_target_init(TCGContext *s)
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_O6); /* stack pointer */
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_T1); /* for internal use */
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tcg_regset_set_reg(s->reserved_regs, TCG_REG_T2); /* for internal use */
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tcg_add_target_add_op_defs(s, sparc_op_defs);
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}
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#if SPARC64
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@ -61,6 +61,7 @@
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/* Forward declarations for functions declared in tcg-target.inc.c and
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used here. */
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static void tcg_target_init(TCGContext *s);
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static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode);
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static void tcg_target_qemu_prologue(TCGContext *s);
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static void patch_reloc(tcg_insn_unit *code_ptr, int type,
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intptr_t value, intptr_t addend);
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@ -306,6 +307,8 @@ static const TCGHelperInfo all_helpers[] = {
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#include "exec/helper-tcg.h"
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};
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static void process_op_defs(TCGContext *s);
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void tcg_context_init(TCGContext *s)
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{
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int op, total_args, n, i;
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@ -352,6 +355,7 @@ void tcg_context_init(TCGContext *s)
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}
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tcg_target_init(s);
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process_op_defs(s);
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/* Reverse the order of the saved registers, assuming they're all at
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the start of tcg_target_reg_alloc_order. */
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@ -1265,29 +1269,33 @@ static void sort_constraints(TCGOpDef *def, int start, int n)
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}
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}
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void tcg_add_target_add_op_defs(TCGContext *s, const TCGTargetOpDef *tdefs)
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static void process_op_defs(TCGContext *s)
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{
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TCGOpcode op;
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TCGOpDef *def;
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const char *ct_str;
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int i, nb_args;
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for(;;) {
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if (tdefs->op == (TCGOpcode)-1)
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break;
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op = tdefs->op;
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tcg_debug_assert((unsigned)op < NB_OPS);
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def = &s->tcg_op_defs[op];
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#if defined(CONFIG_DEBUG_TCG)
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/* Duplicate entry in op definitions? */
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tcg_debug_assert(!def->used);
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def->used = 1;
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#endif
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for (op = 0; op < NB_OPS; op++) {
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TCGOpDef *def = &s->tcg_op_defs[op];
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const TCGTargetOpDef *tdefs;
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int i, nb_args, ok;
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if (def->flags & TCG_OPF_NOT_PRESENT) {
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continue;
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}
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nb_args = def->nb_iargs + def->nb_oargs;
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for(i = 0; i < nb_args; i++) {
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ct_str = tdefs->args_ct_str[i];
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/* Incomplete TCGTargetOpDef entry? */
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if (nb_args == 0) {
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continue;
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}
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tdefs = tcg_target_op_def(op);
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/* Missing TCGTargetOpDef entry. */
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tcg_debug_assert(tdefs != NULL);
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for (i = 0; i < nb_args; i++) {
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const char *ct_str = tdefs->args_ct_str[i];
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/* Incomplete TCGTargetOpDef entry. */
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tcg_debug_assert(ct_str != NULL);
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tcg_regset_clear(def->args_ct[i].u.regs);
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def->args_ct[i].ct = 0;
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if (ct_str[0] >= '0' && ct_str[0] <= '9') {
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@ -1316,11 +1324,9 @@ void tcg_add_target_add_op_defs(TCGContext *s, const TCGTargetOpDef *tdefs)
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ct_str++;
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break;
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default:
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if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) {
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fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n",
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ct_str, i, def->name);
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exit(1);
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}
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ok = target_parse_constraint(&def->args_ct[i], &ct_str);
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/* Typo in TCGTargetOpDef constraint. */
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tcg_debug_assert(ok == 0);
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}
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}
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}
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@ -1332,42 +1338,7 @@ void tcg_add_target_add_op_defs(TCGContext *s, const TCGTargetOpDef *tdefs)
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/* sort the constraints (XXX: this is just an heuristic) */
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sort_constraints(def, 0, def->nb_oargs);
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sort_constraints(def, def->nb_oargs, def->nb_iargs);
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#if 0
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{
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int i;
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printf("%s: sorted=", def->name);
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for(i = 0; i < def->nb_oargs + def->nb_iargs; i++)
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printf(" %d", def->sorted_args[i]);
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printf("\n");
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}
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#endif
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tdefs++;
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}
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#if defined(CONFIG_DEBUG_TCG)
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i = 0;
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for (op = 0; op < tcg_op_defs_org_max; op++) {
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const TCGOpDef *def = &s->tcg_op_defs[op];
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if (def->flags & TCG_OPF_NOT_PRESENT) {
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/* Wrong entry in op definitions? */
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if (def->used) {
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fprintf(stderr, "Invalid op definition for %s\n", def->name);
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i = 1;
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}
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} else {
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/* Missing entry in op definitions? */
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if (!def->used) {
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fprintf(stderr, "Missing op definition for %s\n", def->name);
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i = 1;
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}
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}
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}
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if (i == 1) {
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tcg_abort();
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}
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#endif
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}
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void tcg_op_remove(TCGContext *s, TCGOp *op)
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@ -1026,8 +1026,6 @@ do {\
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abort();\
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} while (0)
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void tcg_add_target_add_op_defs(TCGContext *s, const TCGTargetOpDef *tdefs);
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#if UINTPTR_MAX == UINT32_MAX
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#define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I32(n))
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#define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I32(GET_TCGV_PTR(n))
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