target/mips: Add bit encoding for MXU accumulate add/sub 2-bit pattern 'aptn2'

Backports commit b70bb918e2f5063975ba845fb9456ada25e3db91 from qemu

qemu/target/mips/translate.c

@@ -24127,6 +24127,10 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
     }
 }
 
+/* MXU accumulate add/subtract 1-bit pattern 'aptn1' */
+#define MXU_APTN1_A    0
+#define MXU_APTN1_S    1
+
 /*
  *
  * Decode MXU pool00