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cpu: Move debug_excp_handler to tcg_ops

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Backports e9ce43e97a19090ae8975ef168b95ba3d29be991
This commit is contained in:
Eduardo Habkost 2021-03-04 17:04:46 -05:00 committed by Lioncash
parent 76a10fa8e0
commit bc86f4377c
5 changed files with 8 additions and 6 deletions
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4
qemu/accel/tcg/cpu-exec.c
View file

@ -290,7 +290,9 @@ static inline void cpu_handle_debug_exception(CPUState *cpu)
} }
} }
cc->debug_excp_handler(cpu); if (cc->tcg_ops.debug_excp_handler) {
cc->tcg_ops.debug_excp_handler(cpu);
}
} }
static inline bool cpu_handle_exception(struct uc_struct *uc, CPUState *cpu, int *ret) static inline bool cpu_handle_exception(struct uc_struct *uc, CPUState *cpu, int *ret)

4
qemu/include/qom/cpu.h
View file

@ -116,6 +116,8 @@ typedef struct TcgCpuOperations {
bool (*tlb_fill)(CPUState *cpu, vaddr address, int size, bool (*tlb_fill)(CPUState *cpu, vaddr address, int size,
MMUAccessType access_type, int mmu_idx, MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr); bool probe, uintptr_t retaddr);
/** @debug_excp_handler: Callback for handling debug exceptions */
void (*debug_excp_handler)(CPUState *cpu);
} TcgCpuOperations; } TcgCpuOperations;
@ -155,7 +157,6 @@ typedef struct TcgCpuOperations {
* instead of get_phys_page_debug. * instead of get_phys_page_debug.
* @asidx_from_attrs: Callback to return the CPU AddressSpace to use for * @asidx_from_attrs: Callback to return the CPU AddressSpace to use for
* a memory access with the specified memory transaction attributes. * a memory access with the specified memory transaction attributes.
* @debug_excp_handler: Callback for handling debug exceptions.
* @debug_check_watchpoint: Callback: return true if the architectural * @debug_check_watchpoint: Callback: return true if the architectural
* watchpoint whose address has matched should really fire. * watchpoint whose address has matched should really fire.
* @vmsd: State description for migration. * @vmsd: State description for migration.
@ -200,7 +201,6 @@ typedef struct CPUClass {
MemTxAttrs *attrs); MemTxAttrs *attrs);
int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs); int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs);
bool (*debug_check_watchpoint)(CPUState *cpu, CPUWatchpoint *wp); bool (*debug_check_watchpoint)(CPUState *cpu, CPUWatchpoint *wp);
void (*debug_excp_handler)(CPUState *cpu);
const struct VMStateDescription *vmsd; const struct VMStateDescription *vmsd;

2
qemu/qom/cpu.c
View file

@ -293,7 +293,7 @@ static void cpu_class_init(struct uc_struct *uc, ObjectClass *klass, void *data)
k->has_work = cpu_common_has_work; k->has_work = cpu_common_has_work;
k->get_paging_enabled = cpu_common_get_paging_enabled; k->get_paging_enabled = cpu_common_get_paging_enabled;
k->get_memory_mapping = cpu_common_get_memory_mapping; k->get_memory_mapping = cpu_common_get_memory_mapping;
k->debug_excp_handler = cpu_common_noop; k->tcg_ops.debug_excp_handler = cpu_common_noop;
k->debug_check_watchpoint = cpu_common_debug_check_watchpoint; k->debug_check_watchpoint = cpu_common_debug_check_watchpoint;
k->tcg_ops.cpu_exec_enter = cpu_common_noop; k->tcg_ops.cpu_exec_enter = cpu_common_noop;
k->tcg_ops.cpu_exec_exit = cpu_common_noop; k->tcg_ops.cpu_exec_exit = cpu_common_noop;

2
qemu/target/arm/cpu.c
View file

@ -2112,7 +2112,7 @@ static void arm_cpu_class_init(struct uc_struct *uc, ObjectClass *oc, void *data
cc->tcg_ops.cpu_exec_interrupt = arm_cpu_exec_interrupt; cc->tcg_ops.cpu_exec_interrupt = arm_cpu_exec_interrupt;
cc->tcg_ops.synchronize_from_tb = arm_cpu_synchronize_from_tb; cc->tcg_ops.synchronize_from_tb = arm_cpu_synchronize_from_tb;
cc->tcg_ops.tlb_fill = arm_cpu_tlb_fill; cc->tcg_ops.tlb_fill = arm_cpu_tlb_fill;
cc->debug_excp_handler = arm_debug_excp_handler; cc->tcg_ops.debug_excp_handler = arm_debug_excp_handler;
cc->debug_check_watchpoint = arm_debug_check_watchpoint; cc->debug_check_watchpoint = arm_debug_check_watchpoint;
cc->do_unaligned_access = arm_cpu_do_unaligned_access; cc->do_unaligned_access = arm_cpu_do_unaligned_access;
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)

2
qemu/target/i386/cpu.c
View file

@ -5892,7 +5892,7 @@ static void x86_cpu_common_class_init(struct uc_struct *uc, ObjectClass *oc, voi
cc->do_interrupt = x86_cpu_do_interrupt; cc->do_interrupt = x86_cpu_do_interrupt;
#endif #endif
#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
cc->debug_excp_handler = breakpoint_handler; cc->tcg_ops.debug_excp_handler = breakpoint_handler;
#endif #endif
} }