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target-i386: Use uint32_t for X86CPU.apic_id

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Redo 9886e834 (target-i386: Require APIC ID to be explicitly set before
CPU realize) in another way that doesn't use int64_t to detect
if apic-id property has been set.

Use the fact that 0xFFFFFFFF is the broadcast
value that a CPU can't have and set default
uint32_t apic_id to it instead of using int64_t.

Later uint32_t apic_id will be used to drop custom
property setter/getter in favor of static property.

Backports commit d9c84f196970f78d4b55ab87e03cbcad7c65f86f from qemu
This commit is contained in:
Igor Mammedov 2018-02-25 20:30:24 -05:00 committed by Lioncash
parent 54851f7d74
commit bc8dbd862d
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GPG key ID: 4E3C3CC1031BA9C7
2 changed files with 8 additions and 3 deletions
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4
qemu/target-i386/cpu.c
View file

@ -2998,7 +2998,7 @@ static int x86_cpu_realizefn(struct uc_struct *uc, DeviceState *dev, Error **err
Error *local_err = NULL;
FeatureWord w;
if (cpu->apic_id < 0) {
if (cpu->apic_id == UNASSIGNED_APIC_ID) {
error_setg(errp, "apic-id property was not initialized properly");
return -1;
}
@ -3159,7 +3159,7 @@ static void x86_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
NULL, NULL, (void *)cpu->filtered_features, NULL);
cpu->hyperv_spinlock_attempts = HYPERV_SPINLOCK_NEVER_RETRY;
cpu->apic_id = -1;
cpu->apic_id = UNASSIGNED_APIC_ID;
x86_cpu_load_def(cpu, xcc->cpu_def, &error_abort);
}

7
qemu/target-i386/cpu.h
View file

@ -844,6 +844,11 @@ typedef struct {
#define NB_OPMASK_REGS 8
/* CPU can't have 0xFFFFFFFF APIC ID, use that value to distinguish
* that APIC ID hasn't been set yet
*/
#define UNASSIGNED_APIC_ID 0xFFFFFFFF
typedef union X86LegacyXSaveArea {
struct {
uint16_t fcw;
@ -1161,7 +1166,7 @@ typedef struct X86CPU {
bool expose_kvm;
bool migratable;
bool host_features;
int64_t apic_id;
uint32_t apic_id;
/* if true the CPUID code directly forward host cache leaves to the guest */
bool cache_info_passthrough;