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target/mips: Add bit encoding for MXU operand getting pattern 'optn2'
Backports commit a35723f4ce026ebad0c34f18ea874813799058f0 from qemu
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@ -24137,6 +24137,13 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
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#define MXU_EPTN2_SA 2
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#define MXU_EPTN2_SS 3
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/* MXU operand getting pattern 'optn2' */
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#define MXU_OPTN2_WW 0
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#define MXU_OPTN2_LW 1
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#define MXU_OPTN2_HW 2
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#define MXU_OPTN2_XW 3
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/*
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*
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* Decode MXU pool00
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