tcg/i386: Propagate is64 to tcg_out_qemu_ld_direct

This helps preserve the invariant that all TCG_TYPE_I32 values
are stored zero-extended in the 64-bit host registers.

Backports commit 1d21d95b6101786d44d3b4a12400eb80a1ecc647 from qemu
This commit is contained in:
Richard Henderson 2018-12-18 05:35:33 -05:00 committed by Lioncash
parent 7927f3cff5
commit bdd6118105
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GPG key ID: 4E3C3CC1031BA9C7

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@ -1986,10 +1986,11 @@ static inline void setup_guest_base_seg(TCGContext *s) { }
static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi, static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
TCGReg base, int index, intptr_t ofs, TCGReg base, int index, intptr_t ofs,
int seg, TCGMemOp memop) int seg, bool is64, TCGMemOp memop)
{ {
const TCGMemOp real_bswap = memop & MO_BSWAP; const TCGMemOp real_bswap = memop & MO_BSWAP;
TCGMemOp bswap = real_bswap; TCGMemOp bswap = real_bswap;
int rexw = is64 * P_REXW;
int movop = OPC_MOVL_GvEv; int movop = OPC_MOVL_GvEv;
if (s->have_movbe && real_bswap) { if (s->have_movbe && real_bswap) {
@ -2003,7 +2004,7 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
base, index, 0, ofs); base, index, 0, ofs);
break; break;
case MO_SB: case MO_SB:
tcg_out_modrm_sib_offset(s, OPC_MOVSBL + P_REXW + seg, datalo, tcg_out_modrm_sib_offset(s, OPC_MOVSBL + rexw + seg, datalo,
base, index, 0, ofs); base, index, 0, ofs);
break; break;
case MO_UW: case MO_UW:
@ -2023,9 +2024,9 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
base, index, 0, ofs); base, index, 0, ofs);
tcg_out_rolw_8(s, datalo); tcg_out_rolw_8(s, datalo);
} }
tcg_out_modrm(s, OPC_MOVSWL + P_REXW, datalo, datalo); tcg_out_modrm(s, OPC_MOVSWL + rexw, datalo, datalo);
} else { } else {
tcg_out_modrm_sib_offset(s, OPC_MOVSWL + P_REXW + seg, tcg_out_modrm_sib_offset(s, OPC_MOVSWL + rexw + seg,
datalo, base, index, 0, ofs); datalo, base, index, 0, ofs);
} }
break; break;
@ -2113,7 +2114,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
label_ptr, offsetof(CPUTLBEntry, addr_read)); label_ptr, offsetof(CPUTLBEntry, addr_read));
/* TLB Hit. */ /* TLB Hit. */
tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, opc); tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, is64, opc);
/* Record the current context of a load into ldst label */ /* Record the current context of a load into ldst label */
add_qemu_ldst_label(s, true, oi, datalo, datahi, addrlo, addrhi, add_qemu_ldst_label(s, true, oi, datalo, datahi, addrlo, addrhi,
@ -2148,7 +2149,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
} }
tcg_out_qemu_ld_direct(s, datalo, datahi, tcg_out_qemu_ld_direct(s, datalo, datahi,
base, index, offset, seg, opc); base, index, offset, seg, is64, opc);
} }
#endif #endif
} }