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unicorn/sparc: Lessen the use of the SPARC_CPU macro

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Syntaxically reduces the amount of line noise
This commit is contained in:
Lioncash 2018-03-07 10:43:08 -05:00
parent 047766c908
commit be260c43b6
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GPG key ID: 4E3C3CC1031BA9C7
2 changed files with 54 additions and 46 deletions
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50
qemu/target/sparc/unicorn.c
View file

@ -24,8 +24,10 @@ static bool sparc_stop_interrupt(int intno)
static void sparc_set_pc(struct uc_struct *uc, uint64_t address) static void sparc_set_pc(struct uc_struct *uc, uint64_t address)
{ {
((CPUSPARCState *)uc->current_cpu->env_ptr)->pc = address; CPUSPARCState *state = uc->cpu->env_ptr;
((CPUSPARCState *)uc->current_cpu->env_ptr)->npc = address + 4;
state->pc = address;
state->npc = address + 4;
} }
void sparc_release(void *ctx); void sparc_release(void *ctx);
@ -52,24 +54,25 @@ void sparc_reg_reset(struct uc_struct *uc)
int sparc_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int count) int sparc_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int count)
{ {
CPUState *mycpu = uc->cpu; CPUState *mycpu = uc->cpu;
CPUSPARCState *state = &SPARC_CPU(uc, mycpu)->env;
int i; int i;
for (i = 0; i < count; i++) { for (i = 0; i < count; i++) {
unsigned int regid = regs[i]; unsigned int regid = regs[i];
void *value = vals[i]; void *value = vals[i];
if (regid >= UC_SPARC_REG_G0 && regid <= UC_SPARC_REG_G7) if (regid >= UC_SPARC_REG_G0 && regid <= UC_SPARC_REG_G7) {
*(int32_t *)value = SPARC_CPU(uc, mycpu)->env.gregs[regid - UC_SPARC_REG_G0]; *(int32_t *)value = state->gregs[regid - UC_SPARC_REG_G0];
else if (regid >= UC_SPARC_REG_O0 && regid <= UC_SPARC_REG_O7) } else if (regid >= UC_SPARC_REG_O0 && regid <= UC_SPARC_REG_O7) {
*(int32_t *)value = SPARC_CPU(uc, mycpu)->env.regwptr[regid - UC_SPARC_REG_O0]; *(int32_t *)value = state->regwptr[regid - UC_SPARC_REG_O0];
else if (regid >= UC_SPARC_REG_L0 && regid <= UC_SPARC_REG_L7) } else if (regid >= UC_SPARC_REG_L0 && regid <= UC_SPARC_REG_L7) {
*(int32_t *)value = SPARC_CPU(uc, mycpu)->env.regwptr[8 + regid - UC_SPARC_REG_L0]; *(int32_t *)value = state->regwptr[8 + regid - UC_SPARC_REG_L0];
else if (regid >= UC_SPARC_REG_I0 && regid <= UC_SPARC_REG_I7) } else if (regid >= UC_SPARC_REG_I0 && regid <= UC_SPARC_REG_I7) {
*(int32_t *)value = SPARC_CPU(uc, mycpu)->env.regwptr[16 + regid - UC_SPARC_REG_I0]; *(int32_t *)value = state->regwptr[16 + regid - UC_SPARC_REG_I0];
else { } else {
switch(regid) { switch(regid) {
default: break; default: break;
case UC_SPARC_REG_PC: case UC_SPARC_REG_PC:
*(int32_t *)value = SPARC_CPU(uc, mycpu)->env.pc; *(int32_t *)value = state->pc;
break; break;
} }
} }
@ -81,25 +84,26 @@ int sparc_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int co
int sparc_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, int count) int sparc_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, int count)
{ {
CPUState *mycpu = uc->cpu; CPUState *mycpu = uc->cpu;
CPUSPARCState *state = &SPARC_CPU(uc, mycpu)->env;
int i; int i;
for (i = 0; i < count; i++) { for (i = 0; i < count; i++) {
unsigned int regid = regs[i]; unsigned int regid = regs[i];
const void *value = vals[i]; const void *value = vals[i];
if (regid >= UC_SPARC_REG_G0 && regid <= UC_SPARC_REG_G7) if (regid >= UC_SPARC_REG_G0 && regid <= UC_SPARC_REG_G7) {
SPARC_CPU(uc, mycpu)->env.gregs[regid - UC_SPARC_REG_G0] = *(uint32_t *)value; state->gregs[regid - UC_SPARC_REG_G0] = *(uint32_t *)value;
else if (regid >= UC_SPARC_REG_O0 && regid <= UC_SPARC_REG_O7) } else if (regid >= UC_SPARC_REG_O0 && regid <= UC_SPARC_REG_O7) {
SPARC_CPU(uc, mycpu)->env.regwptr[regid - UC_SPARC_REG_O0] = *(uint32_t *)value; state->regwptr[regid - UC_SPARC_REG_O0] = *(uint32_t *)value;
else if (regid >= UC_SPARC_REG_L0 && regid <= UC_SPARC_REG_L7) } else if (regid >= UC_SPARC_REG_L0 && regid <= UC_SPARC_REG_L7) {
SPARC_CPU(uc, mycpu)->env.regwptr[8 + regid - UC_SPARC_REG_L0] = *(uint32_t *)value; state->regwptr[8 + regid - UC_SPARC_REG_L0] = *(uint32_t *)value;
else if (regid >= UC_SPARC_REG_I0 && regid <= UC_SPARC_REG_I7) } else if (regid >= UC_SPARC_REG_I0 && regid <= UC_SPARC_REG_I7) {
SPARC_CPU(uc, mycpu)->env.regwptr[16 + regid - UC_SPARC_REG_I0] = *(uint32_t *)value; state->regwptr[16 + regid - UC_SPARC_REG_I0] = *(uint32_t *)value;
else { } else {
switch(regid) { switch(regid) {
default: break; default: break;
case UC_SPARC_REG_PC: case UC_SPARC_REG_PC:
SPARC_CPU(uc, mycpu)->env.pc = *(uint32_t *)value; state->pc = *(uint32_t *)value;
SPARC_CPU(uc, mycpu)->env.npc = *(uint32_t *)value + 4; state->npc = *(uint32_t *)value + 4;
// force to quit execution and flush TB // force to quit execution and flush TB
uc->quit_request = true; uc->quit_request = true;
uc_emu_stop(uc); uc_emu_stop(uc);

50
qemu/target/sparc/unicorn64.c
View file

@ -25,8 +25,10 @@ static bool sparc_stop_interrupt(int intno)
static void sparc_set_pc(struct uc_struct *uc, uint64_t address) static void sparc_set_pc(struct uc_struct *uc, uint64_t address)
{ {
((CPUSPARCState *)uc->current_cpu->env_ptr)->pc = address; CPUSPARCState *state = uc->cpu->env_ptr;
((CPUSPARCState *)uc->current_cpu->env_ptr)->npc = address + 4;
state->pc = address;
state->npc = address + 4;
} }
void sparc_reg_reset(struct uc_struct *uc) void sparc_reg_reset(struct uc_struct *uc)
@ -45,24 +47,25 @@ void sparc_reg_reset(struct uc_struct *uc)
int sparc_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int count) int sparc_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int count)
{ {
CPUState *mycpu = uc->cpu; CPUState *mycpu = uc->cpu;
CPUSPARCState *state = &SPARC_CPU(uc, mycpu)->env;
int i; int i;
for (i = 0; i < count; i++) { for (i = 0; i < count; i++) {
unsigned int regid = regs[i]; unsigned int regid = regs[i];
void *value = vals[i]; void *value = vals[i];
if (regid >= UC_SPARC_REG_G0 && regid <= UC_SPARC_REG_G7) if (regid >= UC_SPARC_REG_G0 && regid <= UC_SPARC_REG_G7) {
*(int64_t *)value = SPARC_CPU(uc, mycpu)->env.gregs[regid - UC_SPARC_REG_G0]; *(int64_t *)value = state->gregs[regid - UC_SPARC_REG_G0];
else if (regid >= UC_SPARC_REG_O0 && regid <= UC_SPARC_REG_O7) } else if (regid >= UC_SPARC_REG_O0 && regid <= UC_SPARC_REG_O7) {
*(int64_t *)value = SPARC_CPU(uc, mycpu)->env.regwptr[regid - UC_SPARC_REG_O0]; *(int64_t *)value = state->regwptr[regid - UC_SPARC_REG_O0];
else if (regid >= UC_SPARC_REG_L0 && regid <= UC_SPARC_REG_L7) } else if (regid >= UC_SPARC_REG_L0 && regid <= UC_SPARC_REG_L7) {
*(int64_t *)value = SPARC_CPU(uc, mycpu)->env.regwptr[8 + regid - UC_SPARC_REG_L0]; *(int64_t *)value = state->regwptr[8 + regid - UC_SPARC_REG_L0];
else if (regid >= UC_SPARC_REG_I0 && regid <= UC_SPARC_REG_I7) } else if (regid >= UC_SPARC_REG_I0 && regid <= UC_SPARC_REG_I7) {
*(int64_t *)value = SPARC_CPU(uc, mycpu)->env.regwptr[16 + regid - UC_SPARC_REG_I0]; *(int64_t *)value = state->regwptr[16 + regid - UC_SPARC_REG_I0];
else { } else {
switch(regid) { switch(regid) {
default: break; default: break;
case UC_SPARC_REG_PC: case UC_SPARC_REG_PC:
*(int64_t *)value = SPARC_CPU(uc, mycpu)->env.pc; *(int64_t *)value = state->pc;
break; break;
} }
} }
@ -74,25 +77,26 @@ int sparc_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int co
int sparc_reg_write(struct uc_struct *uc, unsigned int *regs, void* const* vals, int count) int sparc_reg_write(struct uc_struct *uc, unsigned int *regs, void* const* vals, int count)
{ {
CPUState *mycpu = uc->cpu; CPUState *mycpu = uc->cpu;
CPUSPARCState *state = &SPARC_CPU(uc, mycpu)->env;
int i; int i;
for (i = 0; i < count; i++) { for (i = 0; i < count; i++) {
unsigned int regid = regs[i]; unsigned int regid = regs[i];
const void *value = vals[i]; const void *value = vals[i];
if (regid >= UC_SPARC_REG_G0 && regid <= UC_SPARC_REG_G7) if (regid >= UC_SPARC_REG_G0 && regid <= UC_SPARC_REG_G7) {
SPARC_CPU(uc, mycpu)->env.gregs[regid - UC_SPARC_REG_G0] = *(uint64_t *)value; state->gregs[regid - UC_SPARC_REG_G0] = *(uint64_t *)value;
else if (regid >= UC_SPARC_REG_O0 && regid <= UC_SPARC_REG_O7) } else if (regid >= UC_SPARC_REG_O0 && regid <= UC_SPARC_REG_O7) {
SPARC_CPU(uc, mycpu)->env.regwptr[regid - UC_SPARC_REG_O0] = *(uint64_t *)value; state->regwptr[regid - UC_SPARC_REG_O0] = *(uint64_t *)value;
else if (regid >= UC_SPARC_REG_L0 && regid <= UC_SPARC_REG_L7) } else if (regid >= UC_SPARC_REG_L0 && regid <= UC_SPARC_REG_L7) {
SPARC_CPU(uc, mycpu)->env.regwptr[8 + regid - UC_SPARC_REG_L0] = *(uint64_t *)value; state->regwptr[8 + regid - UC_SPARC_REG_L0] = *(uint64_t *)value;
else if (regid >= UC_SPARC_REG_I0 && regid <= UC_SPARC_REG_I7) } else if (regid >= UC_SPARC_REG_I0 && regid <= UC_SPARC_REG_I7) {
SPARC_CPU(uc, mycpu)->env.regwptr[16 + regid - UC_SPARC_REG_I0] = *(uint64_t *)value; state->regwptr[16 + regid - UC_SPARC_REG_I0] = *(uint64_t *)value;
else { } else {
switch(regid) { switch(regid) {
default: break; default: break;
case UC_SPARC_REG_PC: case UC_SPARC_REG_PC:
SPARC_CPU(uc, mycpu)->env.pc = *(uint64_t *)value; state->pc = *(uint64_t *)value;
SPARC_CPU(uc, mycpu)->env.npc = *(uint64_t *)value + 4; state->npc = *(uint64_t *)value + 4;
break; break;
} }
} }