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target-sparc: store cpu super- and hypervisor flags in TB

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Backports commit c9b459aab8c5775a21dd913fc8820b736181e7be from qemu
This commit is contained in:
Artyom Tarasenko 2018-03-01 20:27:03 -05:00 committed by Lioncash
parent 96af2cfb58
commit be8357f8b5
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GPG key ID: 4E3C3CC1031BA9C7
2 changed files with 35 additions and 5 deletions
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17
qemu/target-sparc/cpu.h
View file

@ -670,6 +670,11 @@ static inline int cpu_supervisor_mode(CPUSPARCState *env1)
{ {
return env1->pstate & PS_PRIV; return env1->pstate & PS_PRIV;
} }
#else
static inline int cpu_supervisor_mode(CPUSPARCState *env1)
{
return env1->psrs;
}
#endif #endif
static inline int cpu_mmu_index(CPUSPARCState *env, bool ifetch) static inline int cpu_mmu_index(CPUSPARCState *env, bool ifetch)
@ -736,6 +741,8 @@ trap_state* cpu_tsptr(CPUSPARCState* env);
#define TB_FLAG_MMU_MASK 7 #define TB_FLAG_MMU_MASK 7
#define TB_FLAG_FPU_ENABLED (1 << 4) #define TB_FLAG_FPU_ENABLED (1 << 4)
#define TB_FLAG_AM_ENABLED (1 << 5) #define TB_FLAG_AM_ENABLED (1 << 5)
#define TB_FLAG_SUPER (1 << 6)
#define TB_FLAG_HYPER (1 << 7)
#define TB_FLAG_ASI_SHIFT 24 #define TB_FLAG_ASI_SHIFT 24
static inline void cpu_get_tb_cpu_state(CPUSPARCState *env, target_ulong *pc, static inline void cpu_get_tb_cpu_state(CPUSPARCState *env, target_ulong *pc,
@ -745,7 +752,17 @@ static inline void cpu_get_tb_cpu_state(CPUSPARCState *env, target_ulong *pc,
*pc = env->pc; *pc = env->pc;
*cs_base = env->npc; *cs_base = env->npc;
flags = cpu_mmu_index(env, false); flags = cpu_mmu_index(env, false);
#ifndef CONFIG_USER_ONLY
if (cpu_supervisor_mode(env)) {
flags |= TB_FLAG_SUPER;
}
#endif
#ifdef TARGET_SPARC64 #ifdef TARGET_SPARC64
#ifndef CONFIG_USER_ONLY
if (cpu_hypervisor_mode(env)) {
flags |= TB_FLAG_HYPER;
}
#endif
if (env->pstate & PS_AM) { if (env->pstate & PS_AM) {
flags |= TB_FLAG_AM_ENABLED; flags |= TB_FLAG_AM_ENABLED;
} }

23
qemu/target-sparc/translate.c
View file

@ -41,9 +41,15 @@ typedef struct DisasContext {
target_ulong jump_pc[2]; /* used when JUMP_PC pc value is used */ target_ulong jump_pc[2]; /* used when JUMP_PC pc value is used */
int is_br; int is_br;
int mem_idx; int mem_idx;
int fpu_enabled; bool fpu_enabled;
int address_mask_32bit; bool address_mask_32bit;
int singlestep; bool singlestep;
#ifndef CONFIG_USER_ONLY
bool supervisor;
#ifdef TARGET_SPARC64
bool hypervisor;
#endif
#endif
uint32_t cc_op; /* current CC operation */ uint32_t cc_op; /* current CC operation */
struct TranslationBlock *tb; struct TranslationBlock *tb;
sparc_def_t *def; sparc_def_t *def;
@ -270,10 +276,11 @@ static void gen_move_Q(DisasContext *dc, unsigned int rd, unsigned int rs)
#define hypervisor(dc) 0 #define hypervisor(dc) 0
#endif #endif
#else #else
#define supervisor(dc) (dc->mem_idx >= MMU_KERNEL_IDX)
#ifdef TARGET_SPARC64 #ifdef TARGET_SPARC64
#define hypervisor(dc) (dc->mem_idx == MMU_HYPV_IDX) #define hypervisor(dc) (dc->hypervisor)
#define supervisor(dc) (dc->supervisor | dc->hypervisor)
#else #else
#define supervisor(dc) (dc->supervisor)
#endif #endif
#endif #endif
@ -5919,9 +5926,15 @@ void gen_intermediate_code(CPUSPARCState * env, TranslationBlock * tb)
dc->fpu_enabled = tb_fpu_enabled(tb->flags); dc->fpu_enabled = tb_fpu_enabled(tb->flags);
dc->address_mask_32bit = tb_am_enabled(tb->flags); dc->address_mask_32bit = tb_am_enabled(tb->flags);
dc->singlestep = (cs->singlestep_enabled); // || singlestep); dc->singlestep = (cs->singlestep_enabled); // || singlestep);
#ifndef CONFIG_USER_ONLY
dc->supervisor = (tb->flags & TB_FLAG_SUPER) != 0;
#endif
#ifdef TARGET_SPARC64 #ifdef TARGET_SPARC64
dc->fprs_dirty = 0; dc->fprs_dirty = 0;
dc->asi = (tb->flags >> TB_FLAG_ASI_SHIFT) & 0xff; dc->asi = (tb->flags >> TB_FLAG_ASI_SHIFT) & 0xff;
#ifndef CONFIG_USER_ONLY
dc->hypervisor = (tb->flags & TB_FLAG_HYPER) != 0;
#endif
#endif #endif
// early check to see if the address of this block is the until address // early check to see if the address of this block is the until address