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tcg: Implement indirect memory registers

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That is, global_mem registers whose base is another global_mem
register, rather than a fixed register.

Backports commit b3915dbbdcdb2e04753f3d34a1b0865eea005069 from qemu
This commit is contained in:
Richard Henderson 2018-02-20 19:18:44 -05:00 committed by Lioncash
parent 9299329349
commit bf385eba3c
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
2 changed files with 68 additions and 29 deletions
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95
qemu/tcg/tcg.c
View file

@ -501,17 +501,23 @@ int tcg_global_mem_new_internal(TCGContext *s, TCGType type, TCGv_ptr base,
{ {
TCGTemp *base_ts = &s->temps[GET_TCGV_PTR(base)]; TCGTemp *base_ts = &s->temps[GET_TCGV_PTR(base)];
TCGTemp *ts = tcg_global_alloc(s); TCGTemp *ts = tcg_global_alloc(s);
int bigendian = 0; int indirect_reg = 0, bigendian = 0;
#ifdef HOST_WORDS_BIGENDIAN #ifdef HOST_WORDS_BIGENDIAN
bigendian = 1; bigendian = 1;
#endif #endif
if (!base_ts->fixed_reg) {
indirect_reg = 1;
base_ts->indirect_base = 1;
}
if (TCG_TARGET_REG_BITS == 32 && type == TCG_TYPE_I64) { if (TCG_TARGET_REG_BITS == 32 && type == TCG_TYPE_I64) {
TCGTemp *ts2 = tcg_global_alloc(s); TCGTemp *ts2 = tcg_global_alloc(s);
char buf[64]; char buf[64];
ts->base_type = TCG_TYPE_I64; ts->base_type = TCG_TYPE_I64;
ts->type = TCG_TYPE_I32; ts->type = TCG_TYPE_I32;
ts->indirect_reg = indirect_reg;
ts->mem_allocated = 1; ts->mem_allocated = 1;
ts->mem_base = base_ts; ts->mem_base = base_ts;
ts->mem_offset = offset + bigendian * 4; ts->mem_offset = offset + bigendian * 4;
@ -522,6 +528,7 @@ int tcg_global_mem_new_internal(TCGContext *s, TCGType type, TCGv_ptr base,
tcg_debug_assert(ts2 == ts + 1); tcg_debug_assert(ts2 == ts + 1);
ts2->base_type = TCG_TYPE_I64; ts2->base_type = TCG_TYPE_I64;
ts2->type = TCG_TYPE_I32; ts2->type = TCG_TYPE_I32;
ts2->indirect_reg = indirect_reg;
ts2->mem_allocated = 1; ts2->mem_allocated = 1;
ts2->mem_base = base_ts; ts2->mem_base = base_ts;
ts2->mem_offset = offset + (1 - bigendian) * 4; ts2->mem_offset = offset + (1 - bigendian) * 4;
@ -531,6 +538,7 @@ int tcg_global_mem_new_internal(TCGContext *s, TCGType type, TCGv_ptr base,
} else { } else {
ts->base_type = type; ts->base_type = type;
ts->type = type; ts->type = type;
ts->indirect_reg = indirect_reg;
ts->mem_allocated = 1; ts->mem_allocated = 1;
ts->mem_base = base_ts; ts->mem_base = base_ts;
ts->mem_offset = offset; ts->mem_offset = offset;
@ -1720,8 +1728,10 @@ static void temp_allocate_frame(TCGContext *s, int temp)
s->current_frame_offset += sizeof(tcg_target_long); s->current_frame_offset += sizeof(tcg_target_long);
} }
static void temp_load(TCGContext *, TCGTemp *, TCGRegSet, TCGRegSet);
/* sync register 'reg' by saving it to the corresponding temporary */ /* sync register 'reg' by saving it to the corresponding temporary */
static inline void tcg_reg_sync(TCGContext *s, TCGReg reg) static void tcg_reg_sync(TCGContext *s, TCGReg reg, TCGRegSet allocated_regs)
{ {
TCGTemp *ts = s->reg_to_temp[reg]; TCGTemp *ts = s->reg_to_temp[reg];
@ -1729,6 +1739,11 @@ static inline void tcg_reg_sync(TCGContext *s, TCGReg reg)
if (!ts->mem_coherent && !ts->fixed_reg) { if (!ts->mem_coherent && !ts->fixed_reg) {
if (!ts->mem_allocated) { if (!ts->mem_allocated) {
temp_allocate_frame(s, temp_idx(s, ts)); temp_allocate_frame(s, temp_idx(s, ts));
} else if (ts->indirect_reg) {
tcg_regset_set_reg(allocated_regs, ts->reg);
temp_load(s, ts->mem_base,
s->tcg_target_available_regs[TCG_TYPE_PTR],
allocated_regs);
} }
tcg_out_st(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset); tcg_out_st(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset);
} }
@ -1736,25 +1751,26 @@ static inline void tcg_reg_sync(TCGContext *s, TCGReg reg)
} }
/* free register 'reg' by spilling the corresponding temporary if necessary */ /* free register 'reg' by spilling the corresponding temporary if necessary */
static void tcg_reg_free(TCGContext *s, TCGReg reg) static void tcg_reg_free(TCGContext *s, TCGReg reg, TCGRegSet allocated_regs)
{ {
TCGTemp *ts = s->reg_to_temp[reg]; TCGTemp *ts = s->reg_to_temp[reg];
if (ts != NULL) { if (ts != NULL) {
tcg_reg_sync(s, reg); tcg_reg_sync(s, reg, allocated_regs);
ts->val_type = TEMP_VAL_MEM; ts->val_type = TEMP_VAL_MEM;
s->reg_to_temp[reg] = NULL; s->reg_to_temp[reg] = NULL;
} }
} }
/* Allocate a register belonging to reg1 & ~reg2 */ /* Allocate a register belonging to reg1 & ~reg2 */
static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2) static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet desired_regs,
TCGRegSet allocated_regs)
{ {
int i; int i;
TCGReg reg; TCGReg reg;
TCGRegSet reg_ct; TCGRegSet reg_ct;
tcg_regset_andnot(reg_ct, reg1, reg2); tcg_regset_andnot(reg_ct, desired_regs, allocated_regs);
/* first try free registers */ /* first try free registers */
for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
@ -1767,7 +1783,7 @@ static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2)
for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
reg = tcg_target_reg_alloc_order[i]; reg = tcg_target_reg_alloc_order[i];
if (tcg_regset_test_reg(reg_ct, reg)) { if (tcg_regset_test_reg(reg_ct, reg)) {
tcg_reg_free(s, reg); tcg_reg_free(s, reg, allocated_regs);
return reg; return reg;
} }
} }
@ -1792,6 +1808,12 @@ static void temp_load(TCGContext *s, TCGTemp *ts, TCGRegSet desired_regs,
break; break;
case TEMP_VAL_MEM: case TEMP_VAL_MEM:
reg = tcg_reg_alloc(s, desired_regs, allocated_regs); reg = tcg_reg_alloc(s, desired_regs, allocated_regs);
if (ts->indirect_reg) {
tcg_regset_set_reg(allocated_regs, reg);
temp_load(s, ts->mem_base,
s->tcg_target_available_regs[TCG_TYPE_PTR],
allocated_regs);
}
tcg_out_ld(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset); tcg_out_ld(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset);
ts->mem_coherent = 1; ts->mem_coherent = 1;
break; break;
@ -1830,7 +1852,7 @@ static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs)
temp_load(s, ts, s->tcg_target_available_regs[ts->type], allocated_regs); temp_load(s, ts, s->tcg_target_available_regs[ts->type], allocated_regs);
/* fallthrough */ /* fallthrough */
case TEMP_VAL_REG: case TEMP_VAL_REG:
tcg_reg_sync(s, ts->reg); tcg_reg_sync(s, ts->reg, allocated_regs);
break; break;
case TEMP_VAL_DEAD: case TEMP_VAL_DEAD:
case TEMP_VAL_MEM: case TEMP_VAL_MEM:
@ -1846,13 +1868,16 @@ static inline void temp_save(TCGContext *s, TCGTemp *ts,
TCGRegSet allocated_regs) TCGRegSet allocated_regs)
{ {
#ifdef USE_LIVENESS_ANALYSIS #ifdef USE_LIVENESS_ANALYSIS
/* The liveness analysis already ensures that globals are back /* ??? Liveness does not yet incorporate indirect bases. */
in memory. Keep an assert for safety. */ if (!ts->indirect_base) {
tcg_debug_assert(ts->val_type == TEMP_VAL_MEM || ts->fixed_reg); /* The liveness analysis already ensures that globals are back
#else in memory. Keep an assert for safety. */
tcg_debug_assert(ts->val_type == TEMP_VAL_MEM || ts->fixed_reg);
return;
}
#endif
temp_sync(s, ts, allocated_regs); temp_sync(s, ts, allocated_regs);
temp_dead(s, ts); temp_dead(s, ts);
#endif
} }
/* save globals to their canonical location and assume they can be /* save globals to their canonical location and assume they can be
@ -1877,12 +1902,15 @@ static void sync_globals(TCGContext *s, TCGRegSet allocated_regs)
for (i = 0; i < s->nb_globals; i++) { for (i = 0; i < s->nb_globals; i++) {
TCGTemp *ts = &s->temps[i]; TCGTemp *ts = &s->temps[i];
#ifdef USE_LIVENESS_ANALYSIS #ifdef USE_LIVENESS_ANALYSIS
tcg_debug_assert(ts->val_type != TEMP_VAL_REG /* ??? Liveness does not yet incorporate indirect bases. */
|| ts->fixed_reg if (!ts->indirect_base) {
|| ts->mem_coherent); tcg_debug_assert(ts->val_type != TEMP_VAL_REG
#else || ts->fixed_reg
temp_sync(s, ts, allocated_regs); || ts->mem_coherent);
continue;
}
#endif #endif
temp_sync(s, ts, allocated_regs);
} }
} }
@ -1898,12 +1926,15 @@ static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
temp_save(s, ts, allocated_regs); temp_save(s, ts, allocated_regs);
} else { } else {
#ifdef USE_LIVENESS_ANALYSIS #ifdef USE_LIVENESS_ANALYSIS
/* The liveness analysis already ensures that temps are dead. /* ??? Liveness does not yet incorporate indirect bases. */
Keep an assert for safety. */ if (!ts->indirect_base) {
assert(ts->val_type == TEMP_VAL_DEAD); /* The liveness analysis already ensures that temps are dead.
#else Keep an assert for safety. */
temp_dead(s, ts); assert(ts->val_type == TEMP_VAL_DEAD);
continue;
}
#endif #endif
temp_dead(s, ts);
} }
} }
@ -1976,6 +2007,12 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
if (!ots->mem_allocated) { if (!ots->mem_allocated) {
temp_allocate_frame(s, args[0]); temp_allocate_frame(s, args[0]);
} }
if (ots->indirect_reg) {
tcg_regset_set_reg(allocated_regs, ts->reg);
temp_load(s, ots->mem_base,
s->tcg_target_available_regs[TCG_TYPE_PTR],
allocated_regs);
}
tcg_out_st(s, otype, ts->reg, ots->mem_base->reg, ots->mem_offset); tcg_out_st(s, otype, ts->reg, ots->mem_base->reg, ots->mem_offset);
if (IS_DEAD_ARG(1)) { if (IS_DEAD_ARG(1)) {
temp_dead(s, ts); temp_dead(s, ts);
@ -2013,7 +2050,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
ots->mem_coherent = 0; ots->mem_coherent = 0;
s->reg_to_temp[ots->reg] = ots; s->reg_to_temp[ots->reg] = ots;
if (NEED_SYNC_ARG(0)) { if (NEED_SYNC_ARG(0)) {
tcg_reg_sync(s, ots->reg); tcg_reg_sync(s, ots->reg, allocated_regs);
} }
} }
} }
@ -2104,7 +2141,7 @@ static void tcg_reg_alloc_op(TCGContext *s,
/* XXX: permit generic clobber register list ? */ /* XXX: permit generic clobber register list ? */
for(i = 0; i < TCG_TARGET_NB_REGS; i++) { for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
if (tcg_regset_test_reg(s->tcg_target_call_clobber_regs, i)) { if (tcg_regset_test_reg(s->tcg_target_call_clobber_regs, i)) {
tcg_reg_free(s, i); tcg_reg_free(s, i, allocated_regs);
} }
} }
} }
@ -2161,7 +2198,7 @@ static void tcg_reg_alloc_op(TCGContext *s,
tcg_out_mov(s, ts->type, ts->reg, reg); tcg_out_mov(s, ts->type, ts->reg, reg);
} }
if (NEED_SYNC_ARG(i)) { if (NEED_SYNC_ARG(i)) {
tcg_reg_sync(s, reg); tcg_reg_sync(s, reg, allocated_regs);
} }
if (IS_DEAD_ARG(i)) { if (IS_DEAD_ARG(i)) {
temp_dead(s, ts); temp_dead(s, ts);
@ -2236,7 +2273,7 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs,
if (arg != TCG_CALL_DUMMY_ARG) { if (arg != TCG_CALL_DUMMY_ARG) {
ts = &s->temps[arg]; ts = &s->temps[arg];
reg = tcg_target_call_iarg_regs[i]; reg = tcg_target_call_iarg_regs[i];
tcg_reg_free(s, reg); tcg_reg_free(s, reg, allocated_regs);
if (ts->val_type == TEMP_VAL_REG) { if (ts->val_type == TEMP_VAL_REG) {
if (ts->reg != reg) { if (ts->reg != reg) {
@ -2264,7 +2301,7 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs,
/* clobber call registers */ /* clobber call registers */
for(i = 0; i < TCG_TARGET_NB_REGS; i++) { for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
if (tcg_regset_test_reg(s->tcg_target_call_clobber_regs, i)) { if (tcg_regset_test_reg(s->tcg_target_call_clobber_regs, i)) {
tcg_reg_free(s, i); tcg_reg_free(s, i, allocated_regs);
} }
} }
@ -2300,7 +2337,7 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs,
ts->mem_coherent = 0; ts->mem_coherent = 0;
s->reg_to_temp[reg] = ts; s->reg_to_temp[reg] = ts;
if (NEED_SYNC_ARG(i)) { if (NEED_SYNC_ARG(i)) {
tcg_reg_sync(s, reg); tcg_reg_sync(s, reg, allocated_regs);
} }
if (IS_DEAD_ARG(i)) { if (IS_DEAD_ARG(i)) {
temp_dead(s, ts); temp_dead(s, ts);

2
qemu/tcg/tcg.h
View file

@ -456,6 +456,8 @@ typedef struct TCGTemp {
TCGType base_type:8; TCGType base_type:8;
TCGType type:8; TCGType type:8;
unsigned int fixed_reg:1; unsigned int fixed_reg:1;
unsigned int indirect_reg:1;
unsigned int indirect_base:1;
unsigned int mem_coherent:1; unsigned int mem_coherent:1;
unsigned int mem_allocated:1; unsigned int mem_allocated:1;
unsigned int temp_local:1; /* If true, the temp is saved across unsigned int temp_local:1; /* If true, the temp is saved across