mirror of
https://github.com/yuzu-emu/unicorn.git
synced 2024-12-23 18:45:27 +00:00
tcg: Implement indirect memory registers
That is, global_mem registers whose base is another global_mem register, rather than a fixed register. Backports commit b3915dbbdcdb2e04753f3d34a1b0865eea005069 from qemu
This commit is contained in:
Richard Henderson
Lioncash
parent
9299329349
commit
bf385eba3c
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@ -501,17 +501,23 @@ int tcg_global_mem_new_internal(TCGContext *s, TCGType type, TCGv_ptr base,
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{
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TCGTemp *base_ts = &s->temps[GET_TCGV_PTR(base)];
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TCGTemp *ts = tcg_global_alloc(s);
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int bigendian = 0;
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int indirect_reg = 0, bigendian = 0;
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#ifdef HOST_WORDS_BIGENDIAN
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bigendian = 1;
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#endif
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if (!base_ts->fixed_reg) {
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indirect_reg = 1;
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base_ts->indirect_base = 1;
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}
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if (TCG_TARGET_REG_BITS == 32 && type == TCG_TYPE_I64) {
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TCGTemp *ts2 = tcg_global_alloc(s);
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char buf[64];
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ts->base_type = TCG_TYPE_I64;
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ts->type = TCG_TYPE_I32;
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ts->indirect_reg = indirect_reg;
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ts->mem_allocated = 1;
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ts->mem_base = base_ts;
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ts->mem_offset = offset + bigendian * 4;
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@ -522,6 +528,7 @@ int tcg_global_mem_new_internal(TCGContext *s, TCGType type, TCGv_ptr base,
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tcg_debug_assert(ts2 == ts + 1);
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ts2->base_type = TCG_TYPE_I64;
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ts2->type = TCG_TYPE_I32;
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ts2->indirect_reg = indirect_reg;
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ts2->mem_allocated = 1;
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ts2->mem_base = base_ts;
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ts2->mem_offset = offset + (1 - bigendian) * 4;
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@ -531,6 +538,7 @@ int tcg_global_mem_new_internal(TCGContext *s, TCGType type, TCGv_ptr base,
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} else {
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ts->base_type = type;
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ts->type = type;
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ts->indirect_reg = indirect_reg;
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ts->mem_allocated = 1;
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ts->mem_base = base_ts;
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ts->mem_offset = offset;
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@ -1720,8 +1728,10 @@ static void temp_allocate_frame(TCGContext *s, int temp)
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s->current_frame_offset += sizeof(tcg_target_long);
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}
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static void temp_load(TCGContext *, TCGTemp *, TCGRegSet, TCGRegSet);
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/* sync register 'reg' by saving it to the corresponding temporary */
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static inline void tcg_reg_sync(TCGContext *s, TCGReg reg)
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static void tcg_reg_sync(TCGContext *s, TCGReg reg, TCGRegSet allocated_regs)
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{
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TCGTemp *ts = s->reg_to_temp[reg];
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@ -1729,6 +1739,11 @@ static inline void tcg_reg_sync(TCGContext *s, TCGReg reg)
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if (!ts->mem_coherent && !ts->fixed_reg) {
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if (!ts->mem_allocated) {
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temp_allocate_frame(s, temp_idx(s, ts));
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} else if (ts->indirect_reg) {
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tcg_regset_set_reg(allocated_regs, ts->reg);
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temp_load(s, ts->mem_base,
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s->tcg_target_available_regs[TCG_TYPE_PTR],
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allocated_regs);
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}
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tcg_out_st(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset);
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}
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@ -1736,25 +1751,26 @@ static inline void tcg_reg_sync(TCGContext *s, TCGReg reg)
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}
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/* free register 'reg' by spilling the corresponding temporary if necessary */
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static void tcg_reg_free(TCGContext *s, TCGReg reg)
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static void tcg_reg_free(TCGContext *s, TCGReg reg, TCGRegSet allocated_regs)
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{
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TCGTemp *ts = s->reg_to_temp[reg];
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if (ts != NULL) {
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tcg_reg_sync(s, reg);
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tcg_reg_sync(s, reg, allocated_regs);
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ts->val_type = TEMP_VAL_MEM;
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s->reg_to_temp[reg] = NULL;
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}
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}
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/* Allocate a register belonging to reg1 & ~reg2 */
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static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2)
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static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet desired_regs,
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TCGRegSet allocated_regs)
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{
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int i;
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TCGReg reg;
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TCGRegSet reg_ct;
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tcg_regset_andnot(reg_ct, reg1, reg2);
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tcg_regset_andnot(reg_ct, desired_regs, allocated_regs);
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/* first try free registers */
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for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
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@ -1767,7 +1783,7 @@ static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2)
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for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
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reg = tcg_target_reg_alloc_order[i];
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if (tcg_regset_test_reg(reg_ct, reg)) {
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tcg_reg_free(s, reg);
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tcg_reg_free(s, reg, allocated_regs);
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return reg;
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}
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}
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@ -1792,6 +1808,12 @@ static void temp_load(TCGContext *s, TCGTemp *ts, TCGRegSet desired_regs,
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break;
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case TEMP_VAL_MEM:
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reg = tcg_reg_alloc(s, desired_regs, allocated_regs);
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if (ts->indirect_reg) {
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tcg_regset_set_reg(allocated_regs, reg);
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temp_load(s, ts->mem_base,
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s->tcg_target_available_regs[TCG_TYPE_PTR],
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allocated_regs);
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}
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tcg_out_ld(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset);
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ts->mem_coherent = 1;
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break;
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@ -1830,7 +1852,7 @@ static void temp_sync(TCGContext *s, TCGTemp *ts, TCGRegSet allocated_regs)
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temp_load(s, ts, s->tcg_target_available_regs[ts->type], allocated_regs);
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/* fallthrough */
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case TEMP_VAL_REG:
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tcg_reg_sync(s, ts->reg);
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tcg_reg_sync(s, ts->reg, allocated_regs);
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break;
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case TEMP_VAL_DEAD:
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case TEMP_VAL_MEM:
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@ -1846,13 +1868,16 @@ static inline void temp_save(TCGContext *s, TCGTemp *ts,
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TCGRegSet allocated_regs)
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{
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#ifdef USE_LIVENESS_ANALYSIS
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/* ??? Liveness does not yet incorporate indirect bases. */
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if (!ts->indirect_base) {
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/* The liveness analysis already ensures that globals are back
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in memory. Keep an assert for safety. */
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tcg_debug_assert(ts->val_type == TEMP_VAL_MEM || ts->fixed_reg);
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#else
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return;
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}
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#endif
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temp_sync(s, ts, allocated_regs);
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temp_dead(s, ts);
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#endif
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}
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/* save globals to their canonical location and assume they can be
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@ -1877,12 +1902,15 @@ static void sync_globals(TCGContext *s, TCGRegSet allocated_regs)
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for (i = 0; i < s->nb_globals; i++) {
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TCGTemp *ts = &s->temps[i];
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#ifdef USE_LIVENESS_ANALYSIS
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/* ??? Liveness does not yet incorporate indirect bases. */
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if (!ts->indirect_base) {
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tcg_debug_assert(ts->val_type != TEMP_VAL_REG
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|| ts->fixed_reg
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|| ts->mem_coherent);
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#else
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temp_sync(s, ts, allocated_regs);
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continue;
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}
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#endif
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temp_sync(s, ts, allocated_regs);
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}
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}
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@ -1898,12 +1926,15 @@ static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
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temp_save(s, ts, allocated_regs);
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} else {
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#ifdef USE_LIVENESS_ANALYSIS
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/* ??? Liveness does not yet incorporate indirect bases. */
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if (!ts->indirect_base) {
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/* The liveness analysis already ensures that temps are dead.
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Keep an assert for safety. */
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assert(ts->val_type == TEMP_VAL_DEAD);
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#else
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temp_dead(s, ts);
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continue;
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}
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#endif
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temp_dead(s, ts);
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}
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}
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@ -1976,6 +2007,12 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
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if (!ots->mem_allocated) {
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temp_allocate_frame(s, args[0]);
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}
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if (ots->indirect_reg) {
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tcg_regset_set_reg(allocated_regs, ts->reg);
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temp_load(s, ots->mem_base,
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s->tcg_target_available_regs[TCG_TYPE_PTR],
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allocated_regs);
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}
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tcg_out_st(s, otype, ts->reg, ots->mem_base->reg, ots->mem_offset);
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if (IS_DEAD_ARG(1)) {
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temp_dead(s, ts);
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@ -2013,7 +2050,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
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ots->mem_coherent = 0;
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s->reg_to_temp[ots->reg] = ots;
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if (NEED_SYNC_ARG(0)) {
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tcg_reg_sync(s, ots->reg);
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tcg_reg_sync(s, ots->reg, allocated_regs);
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}
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}
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}
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@ -2104,7 +2141,7 @@ static void tcg_reg_alloc_op(TCGContext *s,
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/* XXX: permit generic clobber register list ? */
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for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
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if (tcg_regset_test_reg(s->tcg_target_call_clobber_regs, i)) {
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tcg_reg_free(s, i);
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tcg_reg_free(s, i, allocated_regs);
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}
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}
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}
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@ -2161,7 +2198,7 @@ static void tcg_reg_alloc_op(TCGContext *s,
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tcg_out_mov(s, ts->type, ts->reg, reg);
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}
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if (NEED_SYNC_ARG(i)) {
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tcg_reg_sync(s, reg);
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tcg_reg_sync(s, reg, allocated_regs);
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}
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if (IS_DEAD_ARG(i)) {
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temp_dead(s, ts);
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@ -2236,7 +2273,7 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs,
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if (arg != TCG_CALL_DUMMY_ARG) {
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ts = &s->temps[arg];
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reg = tcg_target_call_iarg_regs[i];
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tcg_reg_free(s, reg);
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tcg_reg_free(s, reg, allocated_regs);
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if (ts->val_type == TEMP_VAL_REG) {
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if (ts->reg != reg) {
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@ -2264,7 +2301,7 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs,
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/* clobber call registers */
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for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
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if (tcg_regset_test_reg(s->tcg_target_call_clobber_regs, i)) {
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tcg_reg_free(s, i);
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tcg_reg_free(s, i, allocated_regs);
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}
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}
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@ -2300,7 +2337,7 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs,
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ts->mem_coherent = 0;
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s->reg_to_temp[reg] = ts;
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if (NEED_SYNC_ARG(i)) {
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tcg_reg_sync(s, reg);
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tcg_reg_sync(s, reg, allocated_regs);
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}
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if (IS_DEAD_ARG(i)) {
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temp_dead(s, ts);
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@ -456,6 +456,8 @@ typedef struct TCGTemp {
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TCGType base_type:8;
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TCGType type:8;
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unsigned int fixed_reg:1;
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unsigned int indirect_reg:1;
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unsigned int indirect_base:1;
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unsigned int mem_coherent:1;
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unsigned int mem_allocated:1;
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unsigned int temp_local:1; /* If true, the temp is saved across
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