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https://github.com/yuzu-emu/unicorn.git
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target-*: Advance pc after recognizing a breakpoint
Some targets already had this within their logic, but make sure it's present for all targets. Backports commit 522a0d4e3c0d397ffb45ec400d8cbd426dad9d17 from qemu
This commit is contained in:
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3ec0adcc07
commit
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@ -11323,8 +11323,11 @@ void gen_intermediate_code_a64(ARMCPU *cpu, TranslationBlock *tb)
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QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
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QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
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if (bp->pc == dc->pc) {
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if (bp->pc == dc->pc) {
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gen_exception_internal_insn(dc, 0, EXCP_DEBUG);
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gen_exception_internal_insn(dc, 0, EXCP_DEBUG);
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/* Advance PC so that clearing the breakpoint will
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/* The address covered by the breakpoint must be
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invalidate this TB. */
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included in [tb->pc, tb->pc + tb->size) in order
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to for it to be properly cleared -- thus we
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increment the PC here so that the logic setting
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tb->size below does the right thing. */
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dc->pc += 2;
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dc->pc += 2;
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goto done_generating;
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goto done_generating;
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}
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}
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@ -11572,8 +11572,11 @@ void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb)
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dc->is_jmp = DISAS_UPDATE;
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dc->is_jmp = DISAS_UPDATE;
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} else {
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} else {
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gen_exception_internal_insn(dc, 0, EXCP_DEBUG);
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gen_exception_internal_insn(dc, 0, EXCP_DEBUG);
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/* Advance PC so that clearing the breakpoint will
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/* The address covered by the breakpoint must be
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invalidate this TB. */
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included in [tb->pc, tb->pc + tb->size) in order
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to for it to be properly cleared -- thus we
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increment the PC here so that the logic setting
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tb->size below does the right thing. */
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/* TODO: Advance PC by correct instruction length to
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/* TODO: Advance PC by correct instruction length to
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* avoid disassembler error messages */
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* avoid disassembler error messages */
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dc->pc += 2;
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dc->pc += 2;
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@ -8708,6 +8708,11 @@ void gen_intermediate_code(CPUX86State *env, TranslationBlock *tb)
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tb->flags & HF_RF_MASK
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tb->flags & HF_RF_MASK
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? BP_GDB : BP_ANY))) {
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? BP_GDB : BP_ANY))) {
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gen_debug(dc, pc_ptr - dc->cs_base);
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gen_debug(dc, pc_ptr - dc->cs_base);
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/* The address covered by the breakpoint must be included in
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[tb->pc, tb->pc + tb->size) in order to for it to be
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properly cleared -- thus we increment the PC here so that
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the logic setting tb->size below does the right thing. */
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pc_ptr += 1;
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goto done_generating;
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goto done_generating;
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}
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}
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// Unicorn: commented out
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// Unicorn: commented out
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@ -3117,6 +3117,11 @@ void gen_intermediate_code(CPUM68KState *env, TranslationBlock *tb)
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if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) {
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if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) {
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gen_exception(dc, dc->pc, EXCP_DEBUG);
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gen_exception(dc, dc->pc, EXCP_DEBUG);
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dc->is_jmp = DISAS_JUMP;
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dc->is_jmp = DISAS_JUMP;
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/* The address covered by the breakpoint must be included in
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[tb->pc, tb->pc + tb->size) in order to for it to be
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properly cleared -- thus we increment the PC here so that
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the logic setting tb->size below does the right thing. */
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dc->pc += 2;
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break;
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break;
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}
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}
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@ -19779,8 +19779,10 @@ void gen_intermediate_code(CPUMIPSState *env, struct TranslationBlock *tb)
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save_cpu_state(&ctx, 1);
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save_cpu_state(&ctx, 1);
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ctx.bstate = BS_BRANCH;
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ctx.bstate = BS_BRANCH;
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gen_helper_raise_exception_debug(tcg_ctx, tcg_ctx->cpu_env);
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gen_helper_raise_exception_debug(tcg_ctx, tcg_ctx->cpu_env);
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/* Include the breakpoint location or the tb won't
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/* The address covered by the breakpoint must be included in
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* be flushed when it must be. */
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[tb->pc, tb->pc + tb->size) in order to for it to be
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properly cleared -- thus we increment the PC here so that
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the logic setting tb->size below does the right thing. */
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ctx.pc += 4;
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ctx.pc += 4;
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goto done_generating;
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goto done_generating;
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}
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}
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@ -5425,6 +5425,7 @@ void gen_intermediate_code(CPUSPARCState * env, TranslationBlock * tb)
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tcg_gen_insn_start(tcg_ctx, dc->pc, dc->npc);
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tcg_gen_insn_start(tcg_ctx, dc->pc, dc->npc);
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}
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}
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num_insns++;
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num_insns++;
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last_pc = dc->pc;
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if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) {
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if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) {
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if (dc->pc != pc_start) {
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if (dc->pc != pc_start) {
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@ -5446,7 +5447,6 @@ void gen_intermediate_code(CPUSPARCState * env, TranslationBlock * tb)
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gen_helper_power_down(tcg_ctx, tcg_ctx->cpu_env);
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gen_helper_power_down(tcg_ctx, tcg_ctx->cpu_env);
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break;
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break;
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} else {
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} else {
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last_pc = dc->pc;
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insn = cpu_ldl_code(env, dc->pc);
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insn = cpu_ldl_code(env, dc->pc);
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}
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}
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