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target/arm: Rearrange ARMMMUIdxBit
Define via macro expansion, so that renumbering of the base ARMMMUIdx symbols is automatically reflected in the bit definitions. Backports commit 5f09a6dfbfbff4662f52cc3130a2e07044816497 from qemu
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@ -2822,27 +2822,34 @@ typedef enum ARMMMUIdx {
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ARMMMUIdx_Stage1_E1 = 1 | ARM_MMU_IDX_NOTLB,
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} ARMMMUIdx;
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/* Bit macros for the core-mmu-index values for each index,
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/*
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* Bit macros for the core-mmu-index values for each index,
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* for use when calling tlb_flush_by_mmuidx() and friends.
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*/
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#define TO_CORE_BIT(NAME) \
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ARMMMUIdxBit_##NAME = 1 << (ARMMMUIdx_##NAME & ARM_MMU_IDX_COREIDX_MASK)
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typedef enum ARMMMUIdxBit {
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ARMMMUIdxBit_E10_0 = 1 << 0,
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ARMMMUIdxBit_E10_1 = 1 << 1,
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ARMMMUIdxBit_E2 = 1 << 2,
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ARMMMUIdxBit_SE3 = 1 << 3,
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ARMMMUIdxBit_SE10_0 = 1 << 4,
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ARMMMUIdxBit_SE10_1 = 1 << 5,
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ARMMMUIdxBit_Stage2 = 1 << 6,
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ARMMMUIdxBit_MUser = 1 << 0,
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ARMMMUIdxBit_MPriv = 1 << 1,
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ARMMMUIdxBit_MUserNegPri = 1 << 2,
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ARMMMUIdxBit_MPrivNegPri = 1 << 3,
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ARMMMUIdxBit_MSUser = 1 << 4,
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ARMMMUIdxBit_MSPriv = 1 << 5,
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ARMMMUIdxBit_MSUserNegPri = 1 << 6,
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ARMMMUIdxBit_MSPrivNegPri = 1 << 7,
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TO_CORE_BIT(E10_0),
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TO_CORE_BIT(E10_1),
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TO_CORE_BIT(E2),
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TO_CORE_BIT(SE10_0),
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TO_CORE_BIT(SE10_1),
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TO_CORE_BIT(SE3),
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TO_CORE_BIT(Stage2),
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TO_CORE_BIT(MUser),
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TO_CORE_BIT(MPriv),
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TO_CORE_BIT(MUserNegPri),
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TO_CORE_BIT(MPrivNegPri),
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TO_CORE_BIT(MSUser),
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TO_CORE_BIT(MSPriv),
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TO_CORE_BIT(MSUserNegPri),
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TO_CORE_BIT(MSPrivNegPri),
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} ARMMMUIdxBit;
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#undef TO_CORE_BIT
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#define MMU_USER_IDX 0
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static inline int arm_to_core_mmu_idx(ARMMMUIdx mmu_idx)
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