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https://github.com/yuzu-emu/unicorn.git
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target/m68k: Convert to TranslatorOps
Backports commit 11ab74b01e0a8ea4973eed89c6b90fa6e4fb9fb6 from qemu
This commit is contained in:
Richard Henderson
Lioncash
parent
f4432cbca7
commit
c42ca54685
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@ -6298,137 +6298,128 @@ static void disas_m68k_insn(CPUM68KState * env, DisasContext *s)
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do_release(s);
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}
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/* generate intermediate code for basic block 'tb'. */
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void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
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static void m68k_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu)
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{
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CPUM68KState *env = cs->env_ptr;
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DisasContext dc1, *dc = &dc1;
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target_ulong pc_start;
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int pc_offset;
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int num_insns;
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int max_insns;
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TCGContext *tcg_ctx = env->uc->tcg_ctx;
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bool block_full = false;
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/* generate intermediate code */
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pc_start = tb->pc;
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dc->base.tb = tb;
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dc->uc = env->uc;
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DisasContext *dc = container_of(dcbase, DisasContext, base);
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CPUM68KState *env = cpu->env_ptr;
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dc->env = env;
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dc->base.is_jmp = DISAS_NEXT;
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dc->pc = pc_start;
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dc->pc = dc->base.pc_first;
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dc->cc_op = CC_OP_DYNAMIC;
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dc->cc_op_synced = 1;
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dc->base.singlestep_enabled = cs->singlestep_enabled;
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dc->done_mac = 0;
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dc->writeback_mask = 0;
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num_insns = 0;
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max_insns = tb->cflags & CF_COUNT_MASK;
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if (max_insns == 0) {
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max_insns = CF_COUNT_MASK;
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}
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if (max_insns > TCG_MAX_INSNS) {
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max_insns = TCG_MAX_INSNS;
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}
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// Unicorn: early check to see if the address of this block is the until address
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if (tb->pc == env->uc->addr_end) {
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gen_tb_start(tcg_ctx, tb);
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gen_exception(dc, dc->pc, EXCP_HLT);
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goto done_generating;
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}
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dc->uc = env->uc;
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// Unicorn: FIXME: Update to work with new TCG API
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// Unicorn: trace this block on request
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// Only hook this block if it is not broken from previous translation due to
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// full translation cache
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if (!env->uc->block_full && HOOK_EXISTS_BOUNDED(env->uc, UC_HOOK_BLOCK, pc_start)) {
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if (!env->uc->block_full && HOOK_EXISTS_BOUNDED(env->uc, UC_HOOK_BLOCK, dc->base.pc_first)) {
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#if 0
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// save block address to see if we need to patch block size later
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env->uc->block_addr = pc_start;
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env->uc->size_arg = tcg_ctx->gen_op_buf[tcg_ctx->gen_op_buf[0].prev].args;
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gen_uc_tracecode(tcg_ctx, 0xf8f8f8f8, UC_HOOK_BLOCK_IDX, env->uc, pc_start);
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gen_uc_tracecode(tcg_ctx, 0xf8f8f8f8, UC_HOOK_BLOCK_IDX, env->uc, dc->base.pc_first);
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#endif
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} else {
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env->uc->size_arg = -1;
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}
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init_release_array(dc);
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}
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gen_tb_start(tcg_ctx, tb);
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do {
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pc_offset = dc->pc - pc_start;
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tcg_gen_insn_start(tcg_ctx, dc->pc, dc->cc_op);
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num_insns++;
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static void m68k_tr_tb_start(DisasContextBase *dcbase, CPUState *cpu)
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{
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}
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if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) {
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gen_exception(dc, dc->pc, EXCP_DEBUG);
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/* The address covered by the breakpoint must be included in
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[tb->pc, tb->pc + tb->size) in order to for it to be
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properly cleared -- thus we increment the PC here so that
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the logic setting tb->size below does the right thing. */
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dc->pc += 2;
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break;
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}
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static void m68k_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu)
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{
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DisasContext *dc = container_of(dcbase, DisasContext, base);
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tcg_gen_insn_start(cpu->uc->tcg_ctx, dc->base.pc_next, dc->cc_op);
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}
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// UNICORN: Commented out
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//if (num_insns == max_insns && (tb->cflags & CF_LAST_IO)) {
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// gen_io_start();
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//}
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static bool m68k_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cpu,
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const CPUBreakpoint *bp)
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{
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DisasContext *dc = container_of(dcbase, DisasContext, base);
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dc->base.pc_next = dc->pc;
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disas_m68k_insn(env, dc);
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} while (!dc->base.is_jmp && !tcg_op_buf_full(tcg_ctx) &&
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!cs->singlestep_enabled &&
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(pc_offset) < (TARGET_PAGE_SIZE - 32) &&
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num_insns < max_insns);
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gen_exception(dc, dc->base.pc_next, EXCP_DEBUG);
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/* The address covered by the breakpoint must be included in
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[tb->pc, tb->pc + tb->size) in order to for it to be
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properly cleared -- thus we increment the PC here so that
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the logic setting tb->size below does the right thing. */
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dc->base.pc_next += 2;
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/* if too long translation, save this info */
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if (tcg_op_buf_full(tcg_ctx) || num_insns >= max_insns)
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block_full = true;
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return true;
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}
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// UNICORN: Commented out
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//if (tb->cflags & CF_LAST_IO) {
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// gen_io_end();
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//}
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if (unlikely(cs->singlestep_enabled)) {
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/* Make sure the pc is updated, and raise a debug exception. */
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if (!dc->base.is_jmp) {
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update_cc_op(dc);
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tcg_gen_movi_i32(tcg_ctx, tcg_ctx->QREG_PC, dc->pc);
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}
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static void m68k_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
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{
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DisasContext *dc = container_of(dcbase, DisasContext, base);
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disas_m68k_insn(cpu->env_ptr, dc);
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dc->base.pc_next = dc->pc;
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if (dc->base.is_jmp == DISAS_NEXT
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&& dc->pc - dc->base.pc_first >= TARGET_PAGE_SIZE - 32) {
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dc->base.is_jmp = DISAS_TOO_MANY;
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}
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}
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static void m68k_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
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{
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DisasContext *dc = container_of(dcbase, DisasContext, base);
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TCGContext *tcg_ctx = dc->uc->tcg_ctx;
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if (dc->base.is_jmp == DISAS_NORETURN) {
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return;
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}
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if (dc->base.singlestep_enabled) {
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gen_helper_raise_exception(tcg_ctx, tcg_ctx->cpu_env, tcg_const_i32(tcg_ctx, EXCP_DEBUG));
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} else {
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switch(dc->base.is_jmp) {
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case DISAS_NEXT:
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update_cc_op(dc);
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gen_jmp_tb(dc, 0, dc->pc);
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break;
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case DISAS_JUMP:
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/* We updated CC_OP and PC in gen_jmp/gen_jmp_im. */
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tcg_gen_lookup_and_goto_ptr(tcg_ctx);
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break;
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default:
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case DISAS_EXIT:
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/* We updated CC_OP and PC in gen_exit_tb, but also modified
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other state that may require returning to the main loop. */
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tcg_gen_exit_tb(tcg_ctx, NULL, 0);
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break;
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case DISAS_NORETURN:
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/* nothing more to generate */
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break;
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}
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return;
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}
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done_generating:
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gen_tb_end(tcg_ctx, tb, num_insns);
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switch (dc->base.is_jmp) {
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case DISAS_TOO_MANY:
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update_cc_op(dc);
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gen_jmp_tb(dc, 0, dc->pc);
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break;
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case DISAS_JUMP:
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/* We updated CC_OP and PC in gen_jmp/gen_jmp_im. */
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tcg_gen_lookup_and_goto_ptr(tcg_ctx);
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break;
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case DISAS_EXIT:
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/* We updated CC_OP and PC in gen_exit_tb, but also modified
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other state that may require returning to the main loop. */
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tcg_gen_exit_tb(tcg_ctx, NULL, 0);
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break;
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default:
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g_assert_not_reached();
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}
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}
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tb->size = dc->pc - pc_start;
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tb->icount = num_insns;
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static void m68k_tr_disas_log(const DisasContextBase *dcbase, CPUState *cpu)
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{
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// Unicorn: commented out
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//qemu_log("IN: %s\n", lookup_symbol(dcbase->pc_first));
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//log_target_disas(cpu, dcbase->pc_first, dcbase->tb->size);
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}
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env->uc->block_full = block_full;
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static const TranslatorOps m68k_tr_ops = {
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m68k_tr_init_disas_context,
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m68k_tr_tb_start,
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m68k_tr_insn_start,
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m68k_tr_breakpoint_check,
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m68k_tr_translate_insn,
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m68k_tr_tb_stop,
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m68k_tr_disas_log,
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};
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void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb)
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{
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DisasContext dc;
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translator_loop(&m68k_tr_ops, &dc.base, cpu, tb);
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}
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void restore_state_to_opc(CPUM68KState *env, TranslationBlock *tb,
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