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target/m68k: Convert to TranslatorOps

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Backports commit 11ab74b01e0a8ea4973eed89c6b90fa6e4fb9fb6 from qemu
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Richard Henderson 2018-06-15 11:33:22 -04:00 committed by Lioncash
parent f4432cbca7
commit c42ca54685
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 89 additions and 98 deletions
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187
qemu/target/m68k/translate.c
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@ -6298,137 +6298,128 @@ static void disas_m68k_insn(CPUM68KState * env, DisasContext *s)
do_release(s); do_release(s);
} }
/* generate intermediate code for basic block 'tb'. */ static void m68k_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu)
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
{ {
CPUM68KState *env = cs->env_ptr; DisasContext *dc = container_of(dcbase, DisasContext, base);
DisasContext dc1, *dc = &dc1; CPUM68KState *env = cpu->env_ptr;
target_ulong pc_start;
int pc_offset;
int num_insns;
int max_insns;
TCGContext *tcg_ctx = env->uc->tcg_ctx;
bool block_full = false;
/* generate intermediate code */
pc_start = tb->pc;
dc->base.tb = tb;
dc->uc = env->uc;
dc->env = env; dc->env = env;
dc->base.is_jmp = DISAS_NEXT; dc->pc = dc->base.pc_first;
dc->pc = pc_start;
dc->cc_op = CC_OP_DYNAMIC; dc->cc_op = CC_OP_DYNAMIC;
dc->cc_op_synced = 1; dc->cc_op_synced = 1;
dc->base.singlestep_enabled = cs->singlestep_enabled;
dc->done_mac = 0; dc->done_mac = 0;
dc->writeback_mask = 0; dc->writeback_mask = 0;
num_insns = 0; dc->uc = env->uc;
max_insns = tb->cflags & CF_COUNT_MASK;
if (max_insns == 0) {
max_insns = CF_COUNT_MASK;
}
if (max_insns > TCG_MAX_INSNS) {
max_insns = TCG_MAX_INSNS;
}
// Unicorn: early check to see if the address of this block is the until address
if (tb->pc == env->uc->addr_end) {
gen_tb_start(tcg_ctx, tb);
gen_exception(dc, dc->pc, EXCP_HLT);
goto done_generating;
}
// Unicorn: FIXME: Update to work with new TCG API // Unicorn: FIXME: Update to work with new TCG API
// Unicorn: trace this block on request // Unicorn: trace this block on request
// Only hook this block if it is not broken from previous translation due to // Only hook this block if it is not broken from previous translation due to
// full translation cache // full translation cache
if (!env->uc->block_full && HOOK_EXISTS_BOUNDED(env->uc, UC_HOOK_BLOCK, pc_start)) { if (!env->uc->block_full && HOOK_EXISTS_BOUNDED(env->uc, UC_HOOK_BLOCK, dc->base.pc_first)) {
#if 0 #if 0
// save block address to see if we need to patch block size later // save block address to see if we need to patch block size later
env->uc->block_addr = pc_start; env->uc->block_addr = pc_start;
env->uc->size_arg = tcg_ctx->gen_op_buf[tcg_ctx->gen_op_buf[0].prev].args; env->uc->size_arg = tcg_ctx->gen_op_buf[tcg_ctx->gen_op_buf[0].prev].args;
gen_uc_tracecode(tcg_ctx, 0xf8f8f8f8, UC_HOOK_BLOCK_IDX, env->uc, pc_start); gen_uc_tracecode(tcg_ctx, 0xf8f8f8f8, UC_HOOK_BLOCK_IDX, env->uc, dc->base.pc_first);
#endif #endif
} else { } else {
env->uc->size_arg = -1; env->uc->size_arg = -1;
} }
init_release_array(dc); init_release_array(dc);
}
gen_tb_start(tcg_ctx, tb); static void m68k_tr_tb_start(DisasContextBase *dcbase, CPUState *cpu)
do { {
pc_offset = dc->pc - pc_start; }
tcg_gen_insn_start(tcg_ctx, dc->pc, dc->cc_op);
num_insns++;
if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) { static void m68k_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu)
gen_exception(dc, dc->pc, EXCP_DEBUG); {
/* The address covered by the breakpoint must be included in DisasContext *dc = container_of(dcbase, DisasContext, base);
[tb->pc, tb->pc + tb->size) in order to for it to be tcg_gen_insn_start(cpu->uc->tcg_ctx, dc->base.pc_next, dc->cc_op);
properly cleared -- thus we increment the PC here so that }
the logic setting tb->size below does the right thing. */
dc->pc += 2;
break;
}
// UNICORN: Commented out static bool m68k_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cpu,
//if (num_insns == max_insns && (tb->cflags & CF_LAST_IO)) { const CPUBreakpoint *bp)
// gen_io_start(); {
//} DisasContext *dc = container_of(dcbase, DisasContext, base);
dc->base.pc_next = dc->pc; gen_exception(dc, dc->base.pc_next, EXCP_DEBUG);
disas_m68k_insn(env, dc); /* The address covered by the breakpoint must be included in
} while (!dc->base.is_jmp && !tcg_op_buf_full(tcg_ctx) && [tb->pc, tb->pc + tb->size) in order to for it to be
!cs->singlestep_enabled && properly cleared -- thus we increment the PC here so that
(pc_offset) < (TARGET_PAGE_SIZE - 32) && the logic setting tb->size below does the right thing. */
num_insns < max_insns); dc->base.pc_next += 2;
/* if too long translation, save this info */ return true;
if (tcg_op_buf_full(tcg_ctx) || num_insns >= max_insns) }
block_full = true;
// UNICORN: Commented out static void m68k_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
//if (tb->cflags & CF_LAST_IO) { {
// gen_io_end(); DisasContext *dc = container_of(dcbase, DisasContext, base);
//}
if (unlikely(cs->singlestep_enabled)) { disas_m68k_insn(cpu->env_ptr, dc);
/* Make sure the pc is updated, and raise a debug exception. */ dc->base.pc_next = dc->pc;
if (!dc->base.is_jmp) {
update_cc_op(dc); if (dc->base.is_jmp == DISAS_NEXT
tcg_gen_movi_i32(tcg_ctx, tcg_ctx->QREG_PC, dc->pc); && dc->pc - dc->base.pc_first >= TARGET_PAGE_SIZE - 32) {
} dc->base.is_jmp = DISAS_TOO_MANY;
}
}
static void m68k_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
{
DisasContext *dc = container_of(dcbase, DisasContext, base);
TCGContext *tcg_ctx = dc->uc->tcg_ctx;
if (dc->base.is_jmp == DISAS_NORETURN) {
return;
}
if (dc->base.singlestep_enabled) {
gen_helper_raise_exception(tcg_ctx, tcg_ctx->cpu_env, tcg_const_i32(tcg_ctx, EXCP_DEBUG)); gen_helper_raise_exception(tcg_ctx, tcg_ctx->cpu_env, tcg_const_i32(tcg_ctx, EXCP_DEBUG));
} else { return;
switch(dc->base.is_jmp) {
case DISAS_NEXT:
update_cc_op(dc);
gen_jmp_tb(dc, 0, dc->pc);
break;
case DISAS_JUMP:
/* We updated CC_OP and PC in gen_jmp/gen_jmp_im. */
tcg_gen_lookup_and_goto_ptr(tcg_ctx);
break;
default:
case DISAS_EXIT:
/* We updated CC_OP and PC in gen_exit_tb, but also modified
other state that may require returning to the main loop. */
tcg_gen_exit_tb(tcg_ctx, NULL, 0);
break;
case DISAS_NORETURN:
/* nothing more to generate */
break;
}
} }
done_generating: switch (dc->base.is_jmp) {
gen_tb_end(tcg_ctx, tb, num_insns); case DISAS_TOO_MANY:
update_cc_op(dc);
gen_jmp_tb(dc, 0, dc->pc);
break;
case DISAS_JUMP:
/* We updated CC_OP and PC in gen_jmp/gen_jmp_im. */
tcg_gen_lookup_and_goto_ptr(tcg_ctx);
break;
case DISAS_EXIT:
/* We updated CC_OP and PC in gen_exit_tb, but also modified
other state that may require returning to the main loop. */
tcg_gen_exit_tb(tcg_ctx, NULL, 0);
break;
default:
g_assert_not_reached();
}
}
tb->size = dc->pc - pc_start; static void m68k_tr_disas_log(const DisasContextBase *dcbase, CPUState *cpu)
tb->icount = num_insns; {
// Unicorn: commented out
//qemu_log("IN: %s\n", lookup_symbol(dcbase->pc_first));
//log_target_disas(cpu, dcbase->pc_first, dcbase->tb->size);
}
env->uc->block_full = block_full; static const TranslatorOps m68k_tr_ops = {
m68k_tr_init_disas_context,
m68k_tr_tb_start,
m68k_tr_insn_start,
m68k_tr_breakpoint_check,
m68k_tr_translate_insn,
m68k_tr_tb_stop,
m68k_tr_disas_log,
};
void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb)
{
DisasContext dc;
translator_loop(&m68k_tr_ops, &dc.base, cpu, tb);
} }
void restore_state_to_opc(CPUM68KState *env, TranslationBlock *tb, void restore_state_to_opc(CPUM68KState *env, TranslationBlock *tb,