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target/riscv: Fix the bug of HLVX/HLV/HSV

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We found that the hypervisor virtual-machine load and store instructions,
included HLVX/HLV/HSV, couldn't access guest userspace memory.

In the riscv-privileged spec, HLVX/HLV/HSV is defined as follow:
"As usual when V=1, two-stage address translation is applied, and
the HS-level sstatus.SUM is ignored."

But get_physical_address() doesn't ignore sstatus.SUM, when HLVX/HLV/HSV
accesses guest userspace memory. So this patch fixes it.

Backports c63ca4ff7f81116c26984973052991ff0bd7caec
This commit is contained in:
Yifei Jiang 2021-03-08 15:15:59 -05:00 committed by Lioncash
parent 416b2a0077
commit c50f8c9d93
1 changed files with 2 additions and 1 deletions
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3
qemu/target/riscv/cpu_helper.c
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@ -361,7 +361,8 @@ static int get_physical_address(CPURISCVState *env, hwaddr *physical,
vm = get_field(env->hgatp, HGATP_MODE);
widened = 2;
}
sum = get_field(env->mstatus, MSTATUS_SUM);
/* status.SUM will be ignored if execute on background */
sum = get_field(env->mstatus, MSTATUS_SUM) || use_background;
switch (vm) {
case VM_1_10_SV32:
levels = 2; ptidxbits = 10; ptesize = 4; break;