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https://github.com/yuzu-emu/unicorn.git
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target/m68k: add chk and chk2
chk and chk2 compare a value to boundaries, and trigger a CHK exception if the value is out of bounds. Backports commit 8bf6cbaf396a8b54b138bb8a7c3377f2868ed16e from qemu
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172f3709e3
commit
c652028eb5
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@ -128,6 +128,7 @@ static void m68020_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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m68k_set_feature(env, M68K_FEATURE_CAS);
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m68k_set_feature(env, M68K_FEATURE_BKPT);
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m68k_set_feature(env, M68K_FEATURE_RTD);
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m68k_set_feature(env, M68K_FEATURE_CHK2);
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}
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#define m68030_cpu_initfn m68020_cpu_initfn
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#define m68040_cpu_initfn m68020_cpu_initfn
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@ -150,6 +151,7 @@ static void m68060_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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m68k_set_feature(env, M68K_FEATURE_CAS);
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m68k_set_feature(env, M68K_FEATURE_BKPT);
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m68k_set_feature(env, M68K_FEATURE_RTD);
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m68k_set_feature(env, M68K_FEATURE_CHK2);
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}
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static void m5208_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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@ -303,6 +303,7 @@ enum m68k_features {
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M68K_FEATURE_CAS,
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M68K_FEATURE_BKPT,
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M68K_FEATURE_RTD,
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M68K_FEATURE_CHK2,
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};
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static inline int m68k_feature(CPUM68KState *env, int feature)
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@ -96,3 +96,5 @@ DEF_HELPER_FLAGS_4(bfclr_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32)
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DEF_HELPER_FLAGS_4(bfset_mem, TCG_CALL_NO_WG, i32, env, i32, s32, i32)
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DEF_HELPER_FLAGS_4(bfffo_mem, TCG_CALL_NO_WG, i64, env, i32, s32, i32)
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DEF_HELPER_3(chk, void, env, s32, s32)
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DEF_HELPER_4(chk2, void, env, s32, s32, s32)
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@ -947,3 +947,63 @@ uint64_t HELPER(bfffo_mem)(CPUM68KState *env, uint32_t addr,
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return n | ffo;
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}
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void HELPER(chk)(CPUM68KState *env, int32_t val, int32_t ub)
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{
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/* From the specs:
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* X: Not affected, C,V,Z: Undefined,
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* N: Set if val < 0; cleared if val > ub, undefined otherwise
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* We implement here values found from a real MC68040:
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* X,V,Z: Not affected
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* N: Set if val < 0; cleared if val >= 0
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* C: if 0 <= ub: set if val < 0 or val > ub, cleared otherwise
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* if 0 > ub: set if val > ub and val < 0, cleared otherwise
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*/
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env->cc_n = val;
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env->cc_c = 0 <= ub ? val < 0 || val > ub : val > ub && val < 0;
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if (val < 0 || val > ub) {
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CPUState *cs = CPU(m68k_env_get_cpu(env));
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/* Recover PC and CC_OP for the beginning of the insn. */
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cpu_restore_state(cs, GETPC());
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/* flags have been modified by gen_flush_flags() */
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env->cc_op = CC_OP_FLAGS;
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/* Adjust PC to end of the insn. */
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env->pc += 2;
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cs->exception_index = EXCP_CHK;
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cpu_loop_exit(cs);
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}
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}
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void HELPER(chk2)(CPUM68KState *env, int32_t val, int32_t lb, int32_t ub)
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{
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/* From the specs:
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* X: Not affected, N,V: Undefined,
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* Z: Set if val is equal to lb or ub
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* C: Set if val < lb or val > ub, cleared otherwise
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* We implement here values found from a real MC68040:
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* X,N,V: Not affected
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* Z: Set if val is equal to lb or ub
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* C: if lb <= ub: set if val < lb or val > ub, cleared otherwise
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* if lb > ub: set if val > ub and val < lb, cleared otherwise
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*/
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env->cc_z = val != lb && val != ub;
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env->cc_c = lb <= ub ? val < lb || val > ub : val > ub && val < lb;
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if (env->cc_c) {
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CPUState *cs = CPU(m68k_env_get_cpu(env));
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/* Recover PC and CC_OP for the beginning of the insn. */
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cpu_restore_state(cs, GETPC());
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/* flags have been modified by gen_flush_flags() */
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env->cc_op = CC_OP_FLAGS;
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/* Adjust PC to end of the insn. */
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env->pc += 4;
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cs->exception_index = EXCP_CHK;
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cpu_loop_exit(cs);
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}
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}
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@ -4369,6 +4369,82 @@ DISAS_INSN(ff1)
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gen_helper_ff1(tcg_ctx, reg, reg);
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}
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DISAS_INSN(chk)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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TCGv src, reg;
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int opsize;
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switch ((insn >> 7) & 3) {
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case 3:
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opsize = OS_WORD;
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break;
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case 2:
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if (m68k_feature(env, M68K_FEATURE_CHK2)) {
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opsize = OS_LONG;
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break;
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}
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/* fallthru */
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default:
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gen_exception(s, s->insn_pc, EXCP_ILLEGAL);
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return;
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}
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SRC_EA(env, src, opsize, 1, NULL);
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reg = gen_extend(s, DREG(insn, 9), opsize, 1);
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gen_flush_flags(s);
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gen_helper_chk(tcg_ctx, tcg_ctx->cpu_env, reg, src);
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}
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DISAS_INSN(chk2)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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uint16_t ext;
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TCGv addr1, addr2, bound1, bound2, reg;
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int opsize;
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switch ((insn >> 9) & 3) {
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case 0:
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opsize = OS_BYTE;
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break;
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case 1:
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opsize = OS_WORD;
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break;
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case 2:
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opsize = OS_LONG;
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break;
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default:
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gen_exception(s, s->insn_pc, EXCP_ILLEGAL);
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return;
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}
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ext = read_im16(env, s);
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if ((ext & 0x0800) == 0) {
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gen_exception(s, s->insn_pc, EXCP_ILLEGAL);
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return;
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}
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addr1 = gen_lea(env, s, insn, OS_UNSIZED);
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addr2 = tcg_temp_new(tcg_ctx);
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tcg_gen_addi_i32(tcg_ctx, addr2, addr1, opsize_bytes(opsize));
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bound1 = gen_load(s, opsize, addr1, 1);
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tcg_temp_free(tcg_ctx, addr1);
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bound2 = gen_load(s, opsize, addr2, 1);
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tcg_temp_free(tcg_ctx, addr2);
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reg = tcg_temp_new(tcg_ctx);
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if (ext & 0x8000) {
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tcg_gen_mov_i32(tcg_ctx, reg, AREG(ext, 12));
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} else {
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gen_ext(s, reg, DREG(ext, 12), opsize, 1);
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}
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gen_flush_flags(s);
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gen_helper_chk2(tcg_ctx, tcg_ctx->cpu_env, reg, bound1, bound2);
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tcg_temp_free(tcg_ctx, reg);
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}
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static TCGv gen_get_sr(DisasContext *s)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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@ -5508,7 +5584,7 @@ void register_m68k_insns (CPUM68KState *env)
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BASE(undef, 0000, 0000);
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INSN(arith_im, 0080, fff8, CF_ISA_A);
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INSN(arith_im, 0000, ff00, M68000);
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INSN(undef, 00c0, ffc0, M68000);
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INSN(chk2, 00c0, f9c0, CHK2);
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INSN(bitrev, 00c0, fff8, CF_ISA_APLUSC);
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BASE(bitop_reg, 0100, f1c0);
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BASE(bitop_reg, 0140, f1c0);
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@ -5541,6 +5617,7 @@ void register_m68k_insns (CPUM68KState *env)
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BASE(move, 1000, f000);
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BASE(move, 2000, f000);
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BASE(move, 3000, f000);
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INSN(chk, 4000, f040, M68000);
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INSN(strldsr, 40e7, ffff, CF_ISA_APLUSC);
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INSN(negx, 4080, fff8, CF_ISA_A);
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INSN(negx, 4000, ff00, M68000);
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