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target/arm: Clear CONTROL.SFPA in BXNS and BLXNS
For v8M floating point support, transitions from Secure to Non-secure state via BLNS and BLXNS must clear the CONTROL.SFPA bit. (This corresponds to the pseudocode BranchToNS() function.) Backports commit 3cd6726f0ba7cc77342ee721bd86094e13b2a42a from qemu
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@ -7623,6 +7623,9 @@ void HELPER(v7m_bxns)(CPUARMState *env, uint32_t dest)
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/* translate.c should have made BXNS UNDEF unless we're secure */
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/* translate.c should have made BXNS UNDEF unless we're secure */
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assert(env->v7m.secure);
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assert(env->v7m.secure);
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if (!(dest & 1)) {
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env->v7m.control[M_REG_S] &= ~R_V7M_CONTROL_SFPA_MASK;
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}
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switch_v7m_security_state(env, dest & 1);
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switch_v7m_security_state(env, dest & 1);
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env->thumb = 1;
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env->thumb = 1;
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env->regs[15] = dest & ~1;
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env->regs[15] = dest & ~1;
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@ -7680,6 +7683,7 @@ void HELPER(v7m_blxns)(CPUARMState *env, uint32_t dest)
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*/
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*/
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write_v7m_exception(env, 1);
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write_v7m_exception(env, 1);
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}
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}
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env->v7m.control[M_REG_S] &= ~R_V7M_CONTROL_SFPA_MASK;
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switch_v7m_security_state(env, 0);
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switch_v7m_security_state(env, 0);
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env->thumb = 1;
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env->thumb = 1;
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env->regs[15] = dest;
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env->regs[15] = dest;
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