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target-mips: implement the CPU wake-up on non-enabled interrupts in R6

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In Release 6, the behaviour of WAIT has been modified to make it a
requirement that a processor that has disabled operation as a result of
executing a WAIT will resume operation on arrival of an interrupt even if
interrupts are not enabled.

Backports commit 7540a43a1d9de71fa7a53ccd2bb24a04e2aace41 from qemu
This commit is contained in:
Leon Alrae 2018-02-17 14:28:30 -05:00 committed by Lioncash
parent 5a60450b96
commit cab0efb406
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 4 additions and 3 deletions
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7
qemu/target-mips/cpu.c
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@ -52,12 +52,13 @@ static bool mips_cpu_has_work(CPUState *cs)
CPUMIPSState *env = &cpu->env; CPUMIPSState *env = &cpu->env;
bool has_work = false; bool has_work = false;
/* It is implementation dependent if non-enabled interrupts /* Prior to MIPS Release 6 it is implementation dependent if non-enabled
wake-up the CPU, however most of the implementations only interrupts wake-up the CPU, however most of the implementations only
check for interrupts that can be taken. */ check for interrupts that can be taken. */
if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && if ((cs->interrupt_request & CPU_INTERRUPT_HARD) &&
cpu_mips_hw_interrupts_pending(env)) { cpu_mips_hw_interrupts_pending(env)) {
if (cpu_mips_hw_interrupts_enabled(env)) { if (cpu_mips_hw_interrupts_enabled(env) ||
(env->insn_flags & ISA_MIPS32R6)) {
has_work = true; has_work = true;
} }
} }