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target/arm: Tidy conditions in handle_vec_simd_shri

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The (size > 3 && !is_q) condition is identical to the preceeding test
of bit 3 in immh; eliminate it. For the benefit of Coverity, assert
that size is within the bounds we expect.

Fixes: Coverity CID1385846
Fixes: Coverity CID1385849
Fixes: Coverity CID1385852
Fixes: Coverity CID1385857

Backports commit 8dae46970532afcf93470b00e83ca9921980efc3 from qemu
This commit is contained in:
Richard Henderson 2018-05-08 08:25:24 -04:00 committed by Lioncash
parent 0087625b7e
commit cb324fd039
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 1 additions and 4 deletions
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5
qemu/target/arm/translate-a64.c
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@ -9151,10 +9151,7 @@ static void handle_vec_simd_shri(DisasContext *s, bool is_q, bool is_u,
return;
}
if (size > 3 && !is_q) {
unallocated_encoding(s);
return;
}
tcg_debug_assert(size <= 3);
if (!fp_access_check(s)) {
return;