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target/arm: Delay check for magic kernel page

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There's nothing magic about the exception that we generate in order
to execute the magic kernel page. We can and should allow gdb to
set a breakpoint at this location.

Backports commit 3805c2eba8999049bbbea29fdcdea4d47d943c88 from qemu
This commit is contained in:
Richard Henderson 2018-03-04 14:05:43 -05:00 committed by Lioncash
parent 3a196c62ae
commit cbb20881a2
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 11 additions and 10 deletions
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21
qemu/target/arm/translate.c
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@ -12187,16 +12187,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
(dc->condexec_cond << 4) | (dc->condexec_mask >> 1),
0);
num_insns++;
#ifdef CONFIG_USER_ONLY
/* Intercept jump to the magic kernel page. */
if (dc->pc >= 0xffff0000) {
/* We always get here via a jump, so know we are not in a
conditional execution block. */
gen_exception_internal(dc, EXCP_KERNEL_TRAP);
dc->is_jmp = DISAS_NORETURN;
break;
}
#endif
if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
CPUBreakpoint *bp;
@ -12229,6 +12219,17 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
// gen_io_start();
//}
#ifdef CONFIG_USER_ONLY
/* Intercept jump to the magic kernel page. */
if (dc->pc >= 0xffff0000) {
/* We always get here via a jump, so know we are not in a
conditional execution block. */
gen_exception_internal(dc, EXCP_KERNEL_TRAP);
dc->is_jmp = DISAS_NORETURN;
break;
}
#endif
if (dc->ss_active && !dc->pstate_ss) {
/* Singlestep state is Active-pending.
* If we're in this state at the start of a TB then either