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target/mips: add or remove space to fix checkpatch errors

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Add or remove space to fix errors issued by checkpatch.pl tool
"ERROR: spaces required around that..."
"ERROR: space required after that..."
"ERROR: space required before the open parenthesis"
"ERROR: space required after that..."
"ERROR: space prohibited between function name and open parenthesis"
"ERROR: code indent should never use tabs"
"ERROR: line over 90 characters"
within "target/mips/cpu.h" file.

Backports commit 8ebf2e1a68408068c0bcd0d02a783fd12f6a9cb5 from qemu
This commit is contained in:
Jules Irenge 2019-05-28 19:47:59 -04:00 committed by Lioncash
parent 5b25eb80af
commit cf39970750
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 94 additions and 81 deletions
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39
qemu/target/mips/cpu.h
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@ -21,10 +21,10 @@ typedef struct CPUMIPSTLBContext CPUMIPSTLBContext;
typedef union wr_t wr_t;
union wr_t {
int8_t b[MSA_WRLEN/8];
int16_t h[MSA_WRLEN/16];
int32_t w[MSA_WRLEN/32];
int64_t d[MSA_WRLEN/64];
int8_t b[MSA_WRLEN / 8];
int16_t h[MSA_WRLEN / 16];
int32_t w[MSA_WRLEN / 32];
int64_t d[MSA_WRLEN / 64];
};
typedef union fpr_t fpr_t;
@ -70,16 +70,29 @@ struct CPUMIPSFPUContext {
#define FCR31_FS 24
#define FCR31_ABS2008 19
#define FCR31_NAN2008 18
#define SET_FP_COND(num,env) do { ((env).fcr31) |= ((num) ? (1 << ((num) + 24)) : (1 << 23)); } while(0)
#define CLEAR_FP_COND(num,env) do { ((env).fcr31) &= ~((num) ? (1 << ((num) + 24)) : (1 << 23)); } while(0)
#define GET_FP_COND(env) ((((env).fcr31 >> 24) & 0xfe) | (((env).fcr31 >> 23) & 0x1))
#define SET_FP_COND(num, env) do { ((env).fcr31) |= \
((num) ? (1 << ((num) + 24)) : \
(1 << 23)); \
} while (0)
#define CLEAR_FP_COND(num, env) do { ((env).fcr31) &= \
~((num) ? (1 << ((num) + 24)) : \
(1 << 23)); \
} while (0)
#define GET_FP_COND(env) ((((env).fcr31 >> 24) & 0xfe) | \
(((env).fcr31 >> 23) & 0x1))
#define GET_FP_CAUSE(reg) (((reg) >> 12) & 0x3f)
#define GET_FP_ENABLE(reg) (((reg) >> 7) & 0x1f)
#define GET_FP_FLAGS(reg) (((reg) >> 2) & 0x1f)
#define SET_FP_CAUSE(reg,v) do { (reg) = ((reg) & ~(0x3f << 12)) | ((v & 0x3f) << 12); } while(0)
#define SET_FP_ENABLE(reg,v) do { (reg) = ((reg) & ~(0x1f << 7)) | ((v & 0x1f) << 7); } while(0)
#define SET_FP_FLAGS(reg,v) do { (reg) = ((reg) & ~(0x1f << 2)) | ((v & 0x1f) << 2); } while(0)
#define UPDATE_FP_FLAGS(reg,v) do { (reg) |= ((v & 0x1f) << 2); } while(0)
#define SET_FP_CAUSE(reg, v) do { (reg) = ((reg) & ~(0x3f << 12)) | \
((v & 0x3f) << 12); \
} while (0)
#define SET_FP_ENABLE(reg, v) do { (reg) = ((reg) & ~(0x1f << 7)) | \
((v & 0x1f) << 7); \
} while (0)
#define SET_FP_FLAGS(reg, v) do { (reg) = ((reg) & ~(0x1f << 2)) | \
((v & 0x1f) << 2); \
} while (0)
#define UPDATE_FP_FLAGS(reg, v) do { (reg) |= ((v & 0x1f) << 2); } while (0)
#define FP_INEXACT 1
#define FP_UNDERFLOW 2
#define FP_OVERFLOW 4
@ -1090,7 +1103,7 @@ static inline int hflags_mmu_index(uint32_t hflags)
}
}
static inline int cpu_mmu_index (CPUMIPSState *env, bool ifetch)
static inline int cpu_mmu_index(CPUMIPSState *env, bool ifetch)
{
return hflags_mmu_index(env->hflags);
}
@ -1178,7 +1191,7 @@ void cpu_set_exception_base(struct uc_struct *uc, int vp_index, target_ulong add
void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level);
/* helper.c */
target_ulong exception_resume_pc (CPUMIPSState *env);
target_ulong exception_resume_pc(CPUMIPSState *env);
/* op_helper.c */
static inline void restore_snan_bit_mode(CPUMIPSState *env)