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target/mips: add or remove space to fix checkpatch errors
Add or remove space to fix errors issued by checkpatch.pl tool "ERROR: spaces required around that..." "ERROR: space required after that..." "ERROR: space required before the open parenthesis" "ERROR: space required after that..." "ERROR: space prohibited between function name and open parenthesis" "ERROR: code indent should never use tabs" "ERROR: line over 90 characters" within "target/mips/cpu.h" file. Backports commit 8ebf2e1a68408068c0bcd0d02a783fd12f6a9cb5 from qemu
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5b25eb80af
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@ -21,10 +21,10 @@ typedef struct CPUMIPSTLBContext CPUMIPSTLBContext;
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typedef union wr_t wr_t;
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union wr_t {
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int8_t b[MSA_WRLEN/8];
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int16_t h[MSA_WRLEN/16];
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int32_t w[MSA_WRLEN/32];
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int64_t d[MSA_WRLEN/64];
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int8_t b[MSA_WRLEN / 8];
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int16_t h[MSA_WRLEN / 16];
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int32_t w[MSA_WRLEN / 32];
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int64_t d[MSA_WRLEN / 64];
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};
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typedef union fpr_t fpr_t;
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@ -70,16 +70,29 @@ struct CPUMIPSFPUContext {
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#define FCR31_FS 24
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#define FCR31_ABS2008 19
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#define FCR31_NAN2008 18
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#define SET_FP_COND(num,env) do { ((env).fcr31) |= ((num) ? (1 << ((num) + 24)) : (1 << 23)); } while(0)
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#define CLEAR_FP_COND(num,env) do { ((env).fcr31) &= ~((num) ? (1 << ((num) + 24)) : (1 << 23)); } while(0)
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#define GET_FP_COND(env) ((((env).fcr31 >> 24) & 0xfe) | (((env).fcr31 >> 23) & 0x1))
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#define SET_FP_COND(num, env) do { ((env).fcr31) |= \
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((num) ? (1 << ((num) + 24)) : \
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(1 << 23)); \
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} while (0)
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#define CLEAR_FP_COND(num, env) do { ((env).fcr31) &= \
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~((num) ? (1 << ((num) + 24)) : \
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(1 << 23)); \
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} while (0)
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#define GET_FP_COND(env) ((((env).fcr31 >> 24) & 0xfe) | \
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(((env).fcr31 >> 23) & 0x1))
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#define GET_FP_CAUSE(reg) (((reg) >> 12) & 0x3f)
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#define GET_FP_ENABLE(reg) (((reg) >> 7) & 0x1f)
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#define GET_FP_FLAGS(reg) (((reg) >> 2) & 0x1f)
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#define SET_FP_CAUSE(reg,v) do { (reg) = ((reg) & ~(0x3f << 12)) | ((v & 0x3f) << 12); } while(0)
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#define SET_FP_ENABLE(reg,v) do { (reg) = ((reg) & ~(0x1f << 7)) | ((v & 0x1f) << 7); } while(0)
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#define SET_FP_FLAGS(reg,v) do { (reg) = ((reg) & ~(0x1f << 2)) | ((v & 0x1f) << 2); } while(0)
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#define UPDATE_FP_FLAGS(reg,v) do { (reg) |= ((v & 0x1f) << 2); } while(0)
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#define SET_FP_CAUSE(reg, v) do { (reg) = ((reg) & ~(0x3f << 12)) | \
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((v & 0x3f) << 12); \
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} while (0)
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#define SET_FP_ENABLE(reg, v) do { (reg) = ((reg) & ~(0x1f << 7)) | \
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((v & 0x1f) << 7); \
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} while (0)
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#define SET_FP_FLAGS(reg, v) do { (reg) = ((reg) & ~(0x1f << 2)) | \
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((v & 0x1f) << 2); \
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} while (0)
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#define UPDATE_FP_FLAGS(reg, v) do { (reg) |= ((v & 0x1f) << 2); } while (0)
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#define FP_INEXACT 1
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#define FP_UNDERFLOW 2
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#define FP_OVERFLOW 4
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@ -1090,7 +1103,7 @@ static inline int hflags_mmu_index(uint32_t hflags)
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}
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}
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static inline int cpu_mmu_index (CPUMIPSState *env, bool ifetch)
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static inline int cpu_mmu_index(CPUMIPSState *env, bool ifetch)
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{
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return hflags_mmu_index(env->hflags);
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}
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@ -1178,7 +1191,7 @@ void cpu_set_exception_base(struct uc_struct *uc, int vp_index, target_ulong add
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void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level);
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/* helper.c */
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target_ulong exception_resume_pc (CPUMIPSState *env);
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target_ulong exception_resume_pc(CPUMIPSState *env);
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/* op_helper.c */
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static inline void restore_snan_bit_mode(CPUMIPSState *env)
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