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target/arm: Implement SVE Floating Point Multiply Indexed Group

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Backports commit ca40a6e6e390eb1cad7ade881dc7c622793f9324 from qemu
This commit is contained in:
Richard Henderson 2018-07-03 03:29:22 -04:00 committed by Lioncash
parent c718ef4243
commit cf3c7824ff
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GPG key ID: 4E3C3CC1031BA9C7
18 changed files with 217 additions and 0 deletions
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6
qemu/aarch64.h
View file

@ -1123,9 +1123,15 @@
#define helper_gvec_fcmlah_idx helper_gvec_fcmlah_idx_aarch64
#define helper_gvec_fcmlas helper_gvec_fcmlas_aarch64
#define helper_gvec_fcmlas_idx helper_gvec_fcmlas_idx_aarch64
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_aarch64
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_aarch64
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_aarch64
#define helper_gvec_fmul_d helper_gvec_fmul_d_aarch64
#define helper_gvec_fmul_h helper_gvec_fmul_h_aarch64
#define helper_gvec_fmul_s helper_gvec_fmul_s_aarch64
#define helper_gvec_fmul_idx_d helper_gvec_fmul_idx_d_aarch64
#define helper_gvec_fmul_idx_h helper_gvec_fmul_idx_h_aarch64
#define helper_gvec_fmul_idx_s helper_gvec_fmul_idx_s_aarch64
#define helper_gvec_fsub_d helper_gvec_fsub_d_aarch64
#define helper_gvec_fsub_h helper_gvec_fsub_h_aarch64
#define helper_gvec_fsub_s helper_gvec_fsub_s_aarch64

6
qemu/aarch64eb.h
View file

@ -1123,9 +1123,15 @@
#define helper_gvec_fcmlah_idx helper_gvec_fcmlah_idx_aarch64eb
#define helper_gvec_fcmlas helper_gvec_fcmlas_aarch64eb
#define helper_gvec_fcmlas_idx helper_gvec_fcmlas_idx_aarch64eb
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_aarch64eb
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_aarch64eb
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_aarch64eb
#define helper_gvec_fmul_d helper_gvec_fmul_d_aarch64eb
#define helper_gvec_fmul_h helper_gvec_fmul_h_aarch64eb
#define helper_gvec_fmul_s helper_gvec_fmul_s_aarch64eb
#define helper_gvec_fmul_idx_d helper_gvec_fmul_idx_d_aarch64eb
#define helper_gvec_fmul_idx_h helper_gvec_fmul_idx_h_aarch64eb
#define helper_gvec_fmul_idx_s helper_gvec_fmul_idx_s_aarch64eb
#define helper_gvec_fsub_d helper_gvec_fsub_d_aarch64eb
#define helper_gvec_fsub_h helper_gvec_fsub_h_aarch64eb
#define helper_gvec_fsub_s helper_gvec_fsub_s_aarch64eb

6
qemu/arm.h
View file

@ -1123,9 +1123,15 @@
#define helper_gvec_fcmlah_idx helper_gvec_fcmlah_idx_arm
#define helper_gvec_fcmlas helper_gvec_fcmlas_arm
#define helper_gvec_fcmlas_idx helper_gvec_fcmlas_idx_arm
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_arm
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_arm
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_arm
#define helper_gvec_fmul_d helper_gvec_fmul_d_arm
#define helper_gvec_fmul_h helper_gvec_fmul_h_arm
#define helper_gvec_fmul_s helper_gvec_fmul_s_arm
#define helper_gvec_fmul_idx_d helper_gvec_fmul_idx_d_arm
#define helper_gvec_fmul_idx_h helper_gvec_fmul_idx_h_arm
#define helper_gvec_fmul_idx_s helper_gvec_fmul_idx_s_arm
#define helper_gvec_fsub_d helper_gvec_fsub_d_arm
#define helper_gvec_fsub_h helper_gvec_fsub_h_arm
#define helper_gvec_fsub_s helper_gvec_fsub_s_arm

6
qemu/armeb.h
View file

@ -1123,9 +1123,15 @@
#define helper_gvec_fcmlah_idx helper_gvec_fcmlah_idx_armeb
#define helper_gvec_fcmlas helper_gvec_fcmlas_armeb
#define helper_gvec_fcmlas_idx helper_gvec_fcmlas_idx_armeb
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_armeb
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_armeb
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_armeb
#define helper_gvec_fmul_d helper_gvec_fmul_d_armeb
#define helper_gvec_fmul_h helper_gvec_fmul_h_armeb
#define helper_gvec_fmul_s helper_gvec_fmul_s_armeb
#define helper_gvec_fmul_idx_d helper_gvec_fmul_idx_d_armeb
#define helper_gvec_fmul_idx_h helper_gvec_fmul_idx_h_armeb
#define helper_gvec_fmul_idx_s helper_gvec_fmul_idx_s_armeb
#define helper_gvec_fsub_d helper_gvec_fsub_d_armeb
#define helper_gvec_fsub_h helper_gvec_fsub_h_armeb
#define helper_gvec_fsub_s helper_gvec_fsub_s_armeb

6
qemu/header_gen.py
View file

@ -1129,9 +1129,15 @@ symbols = (
'helper_gvec_fcmlah_idx',
'helper_gvec_fcmlas',
'helper_gvec_fcmlas_idx',
'helper_gvec_fmla_idx_d',
'helper_gvec_fmla_idx_h',
'helper_gvec_fmla_idx_s',
'helper_gvec_fmul_d',
'helper_gvec_fmul_h',
'helper_gvec_fmul_s',
'helper_gvec_fmul_idx_d',
'helper_gvec_fmul_idx_h',
'helper_gvec_fmul_idx_s',
'helper_gvec_fsub_d',
'helper_gvec_fsub_h',
'helper_gvec_fsub_s',

6
qemu/m68k.h
View file

@ -1123,9 +1123,15 @@
#define helper_gvec_fcmlah_idx helper_gvec_fcmlah_idx_m68k
#define helper_gvec_fcmlas helper_gvec_fcmlas_m68k
#define helper_gvec_fcmlas_idx helper_gvec_fcmlas_idx_m68k
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_m68k
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_m68k
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_m68k
#define helper_gvec_fmul_d helper_gvec_fmul_d_m68k
#define helper_gvec_fmul_h helper_gvec_fmul_h_m68k
#define helper_gvec_fmul_s helper_gvec_fmul_s_m68k
#define helper_gvec_fmul_idx_d helper_gvec_fmul_idx_d_m68k
#define helper_gvec_fmul_idx_h helper_gvec_fmul_idx_h_m68k
#define helper_gvec_fmul_idx_s helper_gvec_fmul_idx_s_m68k
#define helper_gvec_fsub_d helper_gvec_fsub_d_m68k
#define helper_gvec_fsub_h helper_gvec_fsub_h_m68k
#define helper_gvec_fsub_s helper_gvec_fsub_s_m68k

6
qemu/mips.h
View file

@ -1123,9 +1123,15 @@
#define helper_gvec_fcmlah_idx helper_gvec_fcmlah_idx_mips
#define helper_gvec_fcmlas helper_gvec_fcmlas_mips
#define helper_gvec_fcmlas_idx helper_gvec_fcmlas_idx_mips
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_mips
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_mips
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_mips
#define helper_gvec_fmul_d helper_gvec_fmul_d_mips
#define helper_gvec_fmul_h helper_gvec_fmul_h_mips
#define helper_gvec_fmul_s helper_gvec_fmul_s_mips
#define helper_gvec_fmul_idx_d helper_gvec_fmul_idx_d_mips
#define helper_gvec_fmul_idx_h helper_gvec_fmul_idx_h_mips
#define helper_gvec_fmul_idx_s helper_gvec_fmul_idx_s_mips
#define helper_gvec_fsub_d helper_gvec_fsub_d_mips
#define helper_gvec_fsub_h helper_gvec_fsub_h_mips
#define helper_gvec_fsub_s helper_gvec_fsub_s_mips

6
qemu/mips64.h
View file

@ -1123,9 +1123,15 @@
#define helper_gvec_fcmlah_idx helper_gvec_fcmlah_idx_mips64
#define helper_gvec_fcmlas helper_gvec_fcmlas_mips64
#define helper_gvec_fcmlas_idx helper_gvec_fcmlas_idx_mips64
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_mips64
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_mips64
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_mips64
#define helper_gvec_fmul_d helper_gvec_fmul_d_mips64
#define helper_gvec_fmul_h helper_gvec_fmul_h_mips64
#define helper_gvec_fmul_s helper_gvec_fmul_s_mips64
#define helper_gvec_fmul_idx_d helper_gvec_fmul_idx_d_mips64
#define helper_gvec_fmul_idx_h helper_gvec_fmul_idx_h_mips64
#define helper_gvec_fmul_idx_s helper_gvec_fmul_idx_s_mips64
#define helper_gvec_fsub_d helper_gvec_fsub_d_mips64
#define helper_gvec_fsub_h helper_gvec_fsub_h_mips64
#define helper_gvec_fsub_s helper_gvec_fsub_s_mips64

6
qemu/mips64el.h
View file

@ -1123,9 +1123,15 @@
#define helper_gvec_fcmlah_idx helper_gvec_fcmlah_idx_mips64el
#define helper_gvec_fcmlas helper_gvec_fcmlas_mips64el
#define helper_gvec_fcmlas_idx helper_gvec_fcmlas_idx_mips64el
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_mips64el
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_mips64el
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_mips64el
#define helper_gvec_fmul_d helper_gvec_fmul_d_mips64el
#define helper_gvec_fmul_h helper_gvec_fmul_h_mips64el
#define helper_gvec_fmul_s helper_gvec_fmul_s_mips64el
#define helper_gvec_fmul_idx_d helper_gvec_fmul_idx_d_mips64el
#define helper_gvec_fmul_idx_h helper_gvec_fmul_idx_h_mips64el
#define helper_gvec_fmul_idx_s helper_gvec_fmul_idx_s_mips64el
#define helper_gvec_fsub_d helper_gvec_fsub_d_mips64el
#define helper_gvec_fsub_h helper_gvec_fsub_h_mips64el
#define helper_gvec_fsub_s helper_gvec_fsub_s_mips64el

6
qemu/mipsel.h
View file

@ -1123,9 +1123,15 @@
#define helper_gvec_fcmlah_idx helper_gvec_fcmlah_idx_mipsel
#define helper_gvec_fcmlas helper_gvec_fcmlas_mipsel
#define helper_gvec_fcmlas_idx helper_gvec_fcmlas_idx_mipsel
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_mipsel
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_mipsel
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_mipsel
#define helper_gvec_fmul_d helper_gvec_fmul_d_mipsel
#define helper_gvec_fmul_h helper_gvec_fmul_h_mipsel
#define helper_gvec_fmul_s helper_gvec_fmul_s_mipsel
#define helper_gvec_fmul_idx_d helper_gvec_fmul_idx_d_mipsel
#define helper_gvec_fmul_idx_h helper_gvec_fmul_idx_h_mipsel
#define helper_gvec_fmul_idx_s helper_gvec_fmul_idx_s_mipsel
#define helper_gvec_fsub_d helper_gvec_fsub_d_mipsel
#define helper_gvec_fsub_h helper_gvec_fsub_h_mipsel
#define helper_gvec_fsub_s helper_gvec_fsub_s_mipsel

6
qemu/powerpc.h
View file

@ -1123,9 +1123,15 @@
#define helper_gvec_fcmlah_idx helper_gvec_fcmlah_idx_powerpc
#define helper_gvec_fcmlas helper_gvec_fcmlas_powerpc
#define helper_gvec_fcmlas_idx helper_gvec_fcmlas_idx_powerpc
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_powerpc
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_powerpc
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_powerpc
#define helper_gvec_fmul_d helper_gvec_fmul_d_powerpc
#define helper_gvec_fmul_h helper_gvec_fmul_h_powerpc
#define helper_gvec_fmul_s helper_gvec_fmul_s_powerpc
#define helper_gvec_fmul_idx_d helper_gvec_fmul_idx_d_powerpc
#define helper_gvec_fmul_idx_h helper_gvec_fmul_idx_h_powerpc
#define helper_gvec_fmul_idx_s helper_gvec_fmul_idx_s_powerpc
#define helper_gvec_fsub_d helper_gvec_fsub_d_powerpc
#define helper_gvec_fsub_h helper_gvec_fsub_h_powerpc
#define helper_gvec_fsub_s helper_gvec_fsub_s_powerpc

6
qemu/sparc.h
View file

@ -1123,9 +1123,15 @@
#define helper_gvec_fcmlah_idx helper_gvec_fcmlah_idx_sparc
#define helper_gvec_fcmlas helper_gvec_fcmlas_sparc
#define helper_gvec_fcmlas_idx helper_gvec_fcmlas_idx_sparc
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_sparc
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_sparc
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_sparc
#define helper_gvec_fmul_d helper_gvec_fmul_d_sparc
#define helper_gvec_fmul_h helper_gvec_fmul_h_sparc
#define helper_gvec_fmul_s helper_gvec_fmul_s_sparc
#define helper_gvec_fmul_idx_d helper_gvec_fmul_idx_d_sparc
#define helper_gvec_fmul_idx_h helper_gvec_fmul_idx_h_sparc
#define helper_gvec_fmul_idx_s helper_gvec_fmul_idx_s_sparc
#define helper_gvec_fsub_d helper_gvec_fsub_d_sparc
#define helper_gvec_fsub_h helper_gvec_fsub_h_sparc
#define helper_gvec_fsub_s helper_gvec_fsub_s_sparc

6
qemu/sparc64.h
View file

@ -1123,9 +1123,15 @@
#define helper_gvec_fcmlah_idx helper_gvec_fcmlah_idx_sparc64
#define helper_gvec_fcmlas helper_gvec_fcmlas_sparc64
#define helper_gvec_fcmlas_idx helper_gvec_fcmlas_idx_sparc64
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_sparc64
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_sparc64
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_sparc64
#define helper_gvec_fmul_d helper_gvec_fmul_d_sparc64
#define helper_gvec_fmul_h helper_gvec_fmul_h_sparc64
#define helper_gvec_fmul_s helper_gvec_fmul_s_sparc64
#define helper_gvec_fmul_idx_d helper_gvec_fmul_idx_d_sparc64
#define helper_gvec_fmul_idx_h helper_gvec_fmul_idx_h_sparc64
#define helper_gvec_fmul_idx_s helper_gvec_fmul_idx_s_sparc64
#define helper_gvec_fsub_d helper_gvec_fsub_d_sparc64
#define helper_gvec_fsub_h helper_gvec_fsub_h_sparc64
#define helper_gvec_fsub_s helper_gvec_fsub_s_sparc64

14
qemu/target/arm/helper.h
View file

@ -622,6 +622,20 @@ DEF_HELPER_FLAGS_5(gvec_ftsmul_s, TCG_CALL_NO_RWG,
DEF_HELPER_FLAGS_5(gvec_ftsmul_d, TCG_CALL_NO_RWG,
void, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_5(gvec_fmul_idx_h, TCG_CALL_NO_RWG,
void, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_5(gvec_fmul_idx_s, TCG_CALL_NO_RWG,
void, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_5(gvec_fmul_idx_d, TCG_CALL_NO_RWG,
void, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_6(gvec_fmla_idx_h, TCG_CALL_NO_RWG,
void, ptr, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_6(gvec_fmla_idx_s, TCG_CALL_NO_RWG,
void, ptr, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_6(gvec_fmla_idx_d, TCG_CALL_NO_RWG,
void, ptr, ptr, ptr, ptr, ptr, i32)
#ifdef TARGET_ARM
#define helper_clz helper_clz_arm
#define gen_helper_clz gen_helper_clz_arm

19
qemu/target/arm/sve.decode
View file

@ -29,6 +29,7 @@
%imm9_16_10 16:s6 10:3
%size_23 23:2
%dtype_23_13 23:2 13:2
%index3_22_19 22:1 19:2
# A combination of tsz:imm3 -- extract esize.
%tszimm_esz 22:2 5:5 !function=tszimm_esz
@ -726,6 +727,24 @@ UMIN_zzi 00100101 .. 101 011 110 ........ ..... @rdn_i8u
# SVE integer multiply immediate (unpredicated)
MUL_zzi 00100101 .. 110 000 110 ........ ..... @rdn_i8s
### SVE FP Multiply-Add Indexed Group
# SVE floating-point multiply-add (indexed)
FMLA_zzxz 01100100 0.1 .. rm:3 00000 sub:1 rn:5 rd:5 \
ra=%reg_movprfx index=%index3_22_19 esz=1
FMLA_zzxz 01100100 101 index:2 rm:3 00000 sub:1 rn:5 rd:5 \
ra=%reg_movprfx esz=2
FMLA_zzxz 01100100 111 index:1 rm:4 00000 sub:1 rn:5 rd:5 \
ra=%reg_movprfx esz=3
### SVE FP Multiply Indexed Group
# SVE floating-point multiply (indexed)
FMUL_zzx 01100100 0.1 .. rm:3 001000 rn:5 rd:5 \
index=%index3_22_19 esz=1
FMUL_zzx 01100100 101 index:2 rm:3 001000 rn:5 rd:5 esz=2
FMUL_zzx 01100100 111 index:1 rm:4 001000 rn:5 rd:5 esz=3
### SVE FP Accumulating Reduction Group
# SVE floating-point serial reduction (predicated)

52
qemu/target/arm/translate-sve.c
View file

@ -3543,6 +3543,58 @@ DO_ZZI(UMIN, umin)
#undef DO_ZZI
/*
*** SVE Floating Point Multiply-Add Indexed Group
*/
static bool trans_FMLA_zzxz(DisasContext *s, arg_FMLA_zzxz *a, uint32_t insn)
{
static gen_helper_gvec_4_ptr * const fns[3] = {
gen_helper_gvec_fmla_idx_h,
gen_helper_gvec_fmla_idx_s,
gen_helper_gvec_fmla_idx_d,
};
if (sve_access_check(s)) {
TCGContext *tcg_ctx = s->uc->tcg_ctx;
unsigned vsz = vec_full_reg_size(s);
TCGv_ptr status = get_fpstatus_ptr(tcg_ctx, a->esz == MO_16);
tcg_gen_gvec_4_ptr(tcg_ctx, vec_full_reg_offset(s, a->rd),
vec_full_reg_offset(s, a->rn),
vec_full_reg_offset(s, a->rm),
vec_full_reg_offset(s, a->ra),
status, vsz, vsz, (a->index << 1) | a->sub,
fns[a->esz - 1]);
tcg_temp_free_ptr(tcg_ctx, status);
}
return true;
}
/*
*** SVE Floating Point Multiply Indexed Group
*/
static bool trans_FMUL_zzx(DisasContext *s, arg_FMUL_zzx *a, uint32_t insn)
{
static gen_helper_gvec_3_ptr * const fns[3] = {
gen_helper_gvec_fmul_idx_h,
gen_helper_gvec_fmul_idx_s,
gen_helper_gvec_fmul_idx_d,
};
if (sve_access_check(s)) {
TCGContext *tcg_ctx = s->uc->tcg_ctx;
unsigned vsz = vec_full_reg_size(s);
TCGv_ptr status = get_fpstatus_ptr(tcg_ctx, a->esz == MO_16);
tcg_gen_gvec_3_ptr(tcg_ctx, vec_full_reg_offset(s, a->rd),
vec_full_reg_offset(s, a->rn),
vec_full_reg_offset(s, a->rm),
status, vsz, vsz, a->index, fns[a->esz - 1]);
tcg_temp_free_ptr(tcg_ctx, status);
}
return true;
}
/*
*** SVE Floating Point Accumulating Reduction Group
*/

48
qemu/target/arm/vec_helper.c
View file

@ -496,3 +496,51 @@ DO_3OP(gvec_rsqrts_d, helper_rsqrtsf_f64, float64)
#endif
#undef DO_3OP
/* For the indexed ops, SVE applies the index per 128-bit vector segment.
* For AdvSIMD, there is of course only one such vector segment.
*/
#define DO_MUL_IDX(NAME, TYPE, H) \
void HELPER(NAME)(void *vd, void *vn, void *vm, void *stat, uint32_t desc) \
{ \
intptr_t i, j, oprsz = simd_oprsz(desc), segment = 16 / sizeof(TYPE); \
intptr_t idx = simd_data(desc); \
TYPE *d = vd, *n = vn, *m = vm; \
for (i = 0; i < oprsz / sizeof(TYPE); i += segment) { \
TYPE mm = m[H(i + idx)]; \
for (j = 0; j < segment; j++) { \
d[i + j] = TYPE##_mul(n[i + j], mm, stat); \
} \
} \
}
DO_MUL_IDX(gvec_fmul_idx_h, float16, H2)
DO_MUL_IDX(gvec_fmul_idx_s, float32, H4)
DO_MUL_IDX(gvec_fmul_idx_d, float64, )
#undef DO_MUL_IDX
#define DO_FMLA_IDX(NAME, TYPE, H) \
void HELPER(NAME)(void *vd, void *vn, void *vm, void *va, \
void *stat, uint32_t desc) \
{ \
intptr_t i, j, oprsz = simd_oprsz(desc), segment = 16 / sizeof(TYPE); \
TYPE op1_neg = extract32(desc, SIMD_DATA_SHIFT, 1); \
intptr_t idx = desc >> (SIMD_DATA_SHIFT + 1); \
TYPE *d = vd, *n = vn, *m = vm, *a = va; \
op1_neg <<= (8 * sizeof(TYPE) - 1); \
for (i = 0; i < oprsz / sizeof(TYPE); i += segment) { \
TYPE mm = m[H(i + idx)]; \
for (j = 0; j < segment; j++) { \
d[i + j] = TYPE##_muladd(n[i + j] ^ op1_neg, \
mm, a[i + j], 0, stat); \
} \
} \
}
DO_FMLA_IDX(gvec_fmla_idx_h, float16, H2)
DO_FMLA_IDX(gvec_fmla_idx_s, float32, H4)
DO_FMLA_IDX(gvec_fmla_idx_d, float64, )
#undef DO_FMLA_IDX

6
qemu/x86_64.h
View file

@ -1123,9 +1123,15 @@
#define helper_gvec_fcmlah_idx helper_gvec_fcmlah_idx_x86_64
#define helper_gvec_fcmlas helper_gvec_fcmlas_x86_64
#define helper_gvec_fcmlas_idx helper_gvec_fcmlas_idx_x86_64
#define helper_gvec_fmla_idx_d helper_gvec_fmla_idx_d_x86_64
#define helper_gvec_fmla_idx_h helper_gvec_fmla_idx_h_x86_64
#define helper_gvec_fmla_idx_s helper_gvec_fmla_idx_s_x86_64
#define helper_gvec_fmul_d helper_gvec_fmul_d_x86_64
#define helper_gvec_fmul_h helper_gvec_fmul_h_x86_64
#define helper_gvec_fmul_s helper_gvec_fmul_s_x86_64
#define helper_gvec_fmul_idx_d helper_gvec_fmul_idx_d_x86_64
#define helper_gvec_fmul_idx_h helper_gvec_fmul_idx_h_x86_64
#define helper_gvec_fmul_idx_s helper_gvec_fmul_idx_s_x86_64
#define helper_gvec_fsub_d helper_gvec_fsub_d_x86_64
#define helper_gvec_fsub_h helper_gvec_fsub_h_x86_64
#define helper_gvec_fsub_s helper_gvec_fsub_s_x86_64