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target/arm: Implement v8.1M PXN extension
In v8.1M the PXN architecture extension adds a new PXN bit to the MPU_RLAR registers, which forbids execution of code in the region from a privileged mode. This is another feature which is just in the generic "in v8.1M" set and has no ID register field indicating its presence. Backports cad8e2e3160dd10371552fce6cd8c6e171503e13
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@ -11478,6 +11478,11 @@ bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address,
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} else {
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} else {
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uint32_t ap = extract32(env->pmsav8.rbar[secure][matchregion], 1, 2);
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uint32_t ap = extract32(env->pmsav8.rbar[secure][matchregion], 1, 2);
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uint32_t xn = extract32(env->pmsav8.rbar[secure][matchregion], 0, 1);
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uint32_t xn = extract32(env->pmsav8.rbar[secure][matchregion], 0, 1);
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bool pxn = false;
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if (arm_feature(env, ARM_FEATURE_V8_1M)) {
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pxn = extract32(env->pmsav8.rlar[secure][matchregion], 4, 1);
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}
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if (m_is_system_region(env, address)) {
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if (m_is_system_region(env, address)) {
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/* System space is always execute never */
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/* System space is always execute never */
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@ -11485,7 +11490,7 @@ bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address,
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}
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}
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*prot = simple_ap_to_rw_prot(env, mmu_idx, ap);
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*prot = simple_ap_to_rw_prot(env, mmu_idx, ap);
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if (*prot && !xn) {
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if (*prot && !xn && !(pxn && !is_user)) {
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*prot |= PAGE_EXEC;
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*prot |= PAGE_EXEC;
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}
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}
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/*
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/*
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