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cpu: Add new asidx_from_attrs() method
Add a new method to CPUClass which the memory system core can use to obtain the correct address space index to use for a memory access with a given set of transaction attributes, together with the wrapper function cpu_asidx_from_attrs() which implements the default behaviour ("always use asidx 0") for CPU classes which don't provide the method. Backports commit d7f25a9e6a6b2c69a0be6033903b7d6087bcf47d from qemu
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@ -97,6 +97,8 @@ struct TranslationBlock;
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* associated memory transaction attributes to use for the access.
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* associated memory transaction attributes to use for the access.
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* CPUs which use memory transaction attributes should implement this
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* CPUs which use memory transaction attributes should implement this
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* instead of get_phys_page_debug.
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* instead of get_phys_page_debug.
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* @asidx_from_attrs: Callback to return the CPU AddressSpace to use for
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* a memory access with the specified memory transaction attributes.
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* @debug_excp_handler: Callback for handling debug exceptions.
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* @debug_excp_handler: Callback for handling debug exceptions.
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* @vmsd: State description for migration.
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* @vmsd: State description for migration.
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* @cpu_exec_enter: Callback for cpu_exec preparation.
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* @cpu_exec_enter: Callback for cpu_exec preparation.
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@ -137,6 +139,7 @@ typedef struct CPUClass {
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hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
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hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
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hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr,
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hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr,
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MemTxAttrs *attrs);
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MemTxAttrs *attrs);
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int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs);
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void (*debug_excp_handler)(CPUState *cpu);
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void (*debug_excp_handler)(CPUState *cpu);
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const struct VMStateDescription *vmsd;
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const struct VMStateDescription *vmsd;
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@ -446,6 +449,22 @@ static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
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return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);
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return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);
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}
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}
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/** cpu_asidx_from_attrs:
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* @cpu: CPU
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* @attrs: memory transaction attributes
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*
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* Returns the address space index specifying the CPU AddressSpace
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* to use for a memory access with the given transaction attributes.
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*/
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static inline int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu->uc, cpu);
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if (cc->asidx_from_attrs) {
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return cc->asidx_from_attrs(cpu, attrs);
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}
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return 0;
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}
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#endif
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#endif
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/**
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/**
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