yuzu/unicorn
1
0
Fork 0
mirror of https://github.com/yuzu-emu/unicorn.git synced 2025-07-23 00:08:32 +00:00
Code Issues Packages Projects Releases Wiki Activity

cpu: Add new asidx_from_attrs() method

Browse source 
Add a new method to CPUClass which the memory system core can
use to obtain the correct address space index to use for a memory
access with a given set of transaction attributes, together
with the wrapper function cpu_asidx_from_attrs() which implements
the default behaviour ("always use asidx 0") for CPU classes
which don't provide the method.

Backports commit d7f25a9e6a6b2c69a0be6033903b7d6087bcf47d from qemu
This commit is contained in:
Peter Maydell 2018-02-17 22:45:26 -05:00 committed by Lioncash
parent 1cc4b92c67
commit d23831f4dd
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 19 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

19
qemu/include/qom/cpu.h
View file

@ -97,6 +97,8 @@ struct TranslationBlock;
* associated memory transaction attributes to use for the access. * associated memory transaction attributes to use for the access.
* CPUs which use memory transaction attributes should implement this * CPUs which use memory transaction attributes should implement this
* instead of get_phys_page_debug. * instead of get_phys_page_debug.
* @asidx_from_attrs: Callback to return the CPU AddressSpace to use for
* a memory access with the specified memory transaction attributes.
* @debug_excp_handler: Callback for handling debug exceptions. * @debug_excp_handler: Callback for handling debug exceptions.
* @vmsd: State description for migration. * @vmsd: State description for migration.
* @cpu_exec_enter: Callback for cpu_exec preparation. * @cpu_exec_enter: Callback for cpu_exec preparation.
@ -137,6 +139,7 @@ typedef struct CPUClass {
hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr); hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr, hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr,
MemTxAttrs *attrs); MemTxAttrs *attrs);
int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs);
void (*debug_excp_handler)(CPUState *cpu); void (*debug_excp_handler)(CPUState *cpu);
const struct VMStateDescription *vmsd; const struct VMStateDescription *vmsd;
@ -446,6 +449,22 @@ static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs); return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);
} }
/** cpu_asidx_from_attrs:
* @cpu: CPU
* @attrs: memory transaction attributes
*
* Returns the address space index specifying the CPU AddressSpace
* to use for a memory access with the given transaction attributes.
*/
static inline int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)
{
CPUClass *cc = CPU_GET_CLASS(cpu->uc, cpu);
if (cc->asidx_from_attrs) {
return cc->asidx_from_attrs(cpu, attrs);
}
return 0;
}
#endif #endif
/** /**