yuzu/unicorn
1
0
Fork 0
mirror of https://github.com/yuzu-emu/unicorn.git synced 2025-01-22 05:51:06 +00:00
Code Issues Packages Projects Releases Wiki Activity

cpu-exec: Rename cpu_resume_from_signal() to cpu_loop_exit_noexc()

Browse source 
The function cpu_resume_from_signal() is now always called with a
NULL puc argument, and is rather misnamed since it is never called
from a signal handler. It is essentially forcing an exit to the
top level cpu loop but without raising any exception, so rename
it to cpu_loop_exit_noexc() and drop the useless unused argument.

Backports commit 6886b98036a8f8f5bce8b10756ce080084cef11b from qemu
This commit is contained in:
Peter Maydell 2018-02-24 17:24:41 -05:00 committed by Lioncash
parent b2013255aa
commit d7dccff836
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
18 changed files with 48 additions and 50 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
qemu/aarch64.h
View file

@ -132,13 +132,10 @@
#define arm_cpu_get_phys_page_attrs_debug arm_cpu_get_phys_page_attrs_debug_aarch64
#define arm_cpu_initfn arm_cpu_initfn_aarch64
#define arm_cpu_list arm_cpu_list_aarch64
#define cpu_loop_exit cpu_loop_exit_aarch64
#define cpu_loop_exit_restore cpu_loop_exit_restore_aarch64
#define arm_cpu_post_init arm_cpu_post_init_aarch64
#define arm_cpu_realizefn arm_cpu_realizefn_aarch64
#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_aarch64
#define arm_cpu_register_types arm_cpu_register_types_aarch64
#define cpu_resume_from_signal cpu_resume_from_signal_aarch64
#define arm_cpus arm_cpus_aarch64
#define arm_cpu_set_pc arm_cpu_set_pc_aarch64
#define arm_cp_write_ignore arm_cp_write_ignore_aarch64
@ -287,6 +284,9 @@
#define cpu_ldl_code cpu_ldl_code_aarch64
#define cpu_ldub_code cpu_ldub_code_aarch64
#define cpu_lduw_code cpu_lduw_code_aarch64
#define cpu_loop_exit cpu_loop_exit_aarch64
#define cpu_loop_exit_noexc cpu_loop_exit_noexc_aarch64
#define cpu_loop_exit_restore cpu_loop_exit_restore_aarch64
#define cpu_memory_rw_debug cpu_memory_rw_debug_aarch64
#define cpu_mmu_index cpu_mmu_index_aarch64
#define cpu_outb cpu_outb_aarch64

6
qemu/aarch64eb.h
View file

@ -132,13 +132,10 @@
#define arm_cpu_get_phys_page_attrs_debug arm_cpu_get_phys_page_attrs_debug_aarch64eb
#define arm_cpu_initfn arm_cpu_initfn_aarch64eb
#define arm_cpu_list arm_cpu_list_aarch64eb
#define cpu_loop_exit cpu_loop_exit_aarch64eb
#define cpu_loop_exit_restore cpu_loop_exit_restore_aarch64eb
#define arm_cpu_post_init arm_cpu_post_init_aarch64eb
#define arm_cpu_realizefn arm_cpu_realizefn_aarch64eb
#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_aarch64eb
#define arm_cpu_register_types arm_cpu_register_types_aarch64eb
#define cpu_resume_from_signal cpu_resume_from_signal_aarch64eb
#define arm_cpus arm_cpus_aarch64eb
#define arm_cpu_set_pc arm_cpu_set_pc_aarch64eb
#define arm_cp_write_ignore arm_cp_write_ignore_aarch64eb
@ -287,6 +284,9 @@
#define cpu_ldl_code cpu_ldl_code_aarch64eb
#define cpu_ldub_code cpu_ldub_code_aarch64eb
#define cpu_lduw_code cpu_lduw_code_aarch64eb
#define cpu_loop_exit cpu_loop_exit_aarch64eb
#define cpu_loop_exit_noexc cpu_loop_exit_noexc_aarch64eb
#define cpu_loop_exit_restore cpu_loop_exit_restore_aarch64eb
#define cpu_memory_rw_debug cpu_memory_rw_debug_aarch64eb
#define cpu_mmu_index cpu_mmu_index_aarch64eb
#define cpu_outb cpu_outb_aarch64eb

6
qemu/arm.h
View file

@ -132,13 +132,10 @@
#define arm_cpu_get_phys_page_attrs_debug arm_cpu_get_phys_page_attrs_debug_arm
#define arm_cpu_initfn arm_cpu_initfn_arm
#define arm_cpu_list arm_cpu_list_arm
#define cpu_loop_exit cpu_loop_exit_arm
#define cpu_loop_exit_restore cpu_loop_exit_restore_arm
#define arm_cpu_post_init arm_cpu_post_init_arm
#define arm_cpu_realizefn arm_cpu_realizefn_arm
#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_arm
#define arm_cpu_register_types arm_cpu_register_types_arm
#define cpu_resume_from_signal cpu_resume_from_signal_arm
#define arm_cpus arm_cpus_arm
#define arm_cpu_set_pc arm_cpu_set_pc_arm
#define arm_cp_write_ignore arm_cp_write_ignore_arm
@ -287,6 +284,9 @@
#define cpu_ldl_code cpu_ldl_code_arm
#define cpu_ldub_code cpu_ldub_code_arm
#define cpu_lduw_code cpu_lduw_code_arm
#define cpu_loop_exit cpu_loop_exit_arm
#define cpu_loop_exit_noexc cpu_loop_exit_noexc_arm
#define cpu_loop_exit_restore cpu_loop_exit_restore_arm
#define cpu_memory_rw_debug cpu_memory_rw_debug_arm
#define cpu_mmu_index cpu_mmu_index_arm
#define cpu_outb cpu_outb_arm

6
qemu/armeb.h
View file

@ -132,13 +132,10 @@
#define arm_cpu_get_phys_page_attrs_debug arm_cpu_get_phys_page_attrs_debug_armeb
#define arm_cpu_initfn arm_cpu_initfn_armeb
#define arm_cpu_list arm_cpu_list_armeb
#define cpu_loop_exit cpu_loop_exit_armeb
#define cpu_loop_exit_restore cpu_loop_exit_restore_armeb
#define arm_cpu_post_init arm_cpu_post_init_armeb
#define arm_cpu_realizefn arm_cpu_realizefn_armeb
#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_armeb
#define arm_cpu_register_types arm_cpu_register_types_armeb
#define cpu_resume_from_signal cpu_resume_from_signal_armeb
#define arm_cpus arm_cpus_armeb
#define arm_cpu_set_pc arm_cpu_set_pc_armeb
#define arm_cp_write_ignore arm_cp_write_ignore_armeb
@ -287,6 +284,9 @@
#define cpu_ldl_code cpu_ldl_code_armeb
#define cpu_ldub_code cpu_ldub_code_armeb
#define cpu_lduw_code cpu_lduw_code_armeb
#define cpu_loop_exit cpu_loop_exit_armeb
#define cpu_loop_exit_noexc cpu_loop_exit_noexc_armeb
#define cpu_loop_exit_restore cpu_loop_exit_restore_armeb
#define cpu_memory_rw_debug cpu_memory_rw_debug_armeb
#define cpu_mmu_index cpu_mmu_index_armeb
#define cpu_outb cpu_outb_armeb

6
qemu/cpu-exec-common.c
View file

@ -23,10 +23,8 @@
#include "exec/exec-all.h"
#include "exec/memory-internal.h"
/* exit the current TB from a signal handler. The host registers are
restored in a state compatible with the CPU emulator
*/
void cpu_resume_from_signal(CPUState *cpu, void *puc)
/* exit the current TB, but without causing any exception to be raised */
void cpu_loop_exit_noexc(CPUState *cpu)
{
/* XXX: restore cpu registers saved in host registers */

6
qemu/header_gen.py
View file

@ -138,13 +138,10 @@ symbols = (
'arm_cpu_get_phys_page_attrs_debug',
'arm_cpu_initfn',
'arm_cpu_list',
'cpu_loop_exit',
'cpu_loop_exit_restore',
'arm_cpu_post_init',
'arm_cpu_realizefn',
'arm_cpu_register_gdb_regs_for_features',
'arm_cpu_register_types',
'cpu_resume_from_signal',
'arm_cpus',
'arm_cpu_set_pc',
'arm_cp_write_ignore',
@ -293,6 +290,9 @@ symbols = (
'cpu_ldl_code',
'cpu_ldub_code',
'cpu_lduw_code',
'cpu_loop_exit',
'cpu_loop_exit_noexc',
'cpu_loop_exit_restore',
'cpu_memory_rw_debug',
'cpu_mmu_index',
'cpu_outb',

2
qemu/include/exec/exec-all.h
View file

@ -48,7 +48,7 @@ void restore_state_to_opc(CPUArchState *env, struct TranslationBlock *tb,
target_ulong *data);
bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc);
void QEMU_NORETURN cpu_resume_from_signal(CPUState *cpu, void *puc);
void QEMU_NORETURN cpu_loop_exit_noexc(CPUState *cpu);
void QEMU_NORETURN cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
TranslationBlock *tb_gen_code(CPUState *cpu,

6
qemu/m68k.h
View file

@ -132,13 +132,10 @@
#define arm_cpu_get_phys_page_attrs_debug arm_cpu_get_phys_page_attrs_debug_m68k
#define arm_cpu_initfn arm_cpu_initfn_m68k
#define arm_cpu_list arm_cpu_list_m68k
#define cpu_loop_exit cpu_loop_exit_m68k
#define cpu_loop_exit_restore cpu_loop_exit_restore_m68k
#define arm_cpu_post_init arm_cpu_post_init_m68k
#define arm_cpu_realizefn arm_cpu_realizefn_m68k
#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_m68k
#define arm_cpu_register_types arm_cpu_register_types_m68k
#define cpu_resume_from_signal cpu_resume_from_signal_m68k
#define arm_cpus arm_cpus_m68k
#define arm_cpu_set_pc arm_cpu_set_pc_m68k
#define arm_cp_write_ignore arm_cp_write_ignore_m68k
@ -287,6 +284,9 @@
#define cpu_ldl_code cpu_ldl_code_m68k
#define cpu_ldub_code cpu_ldub_code_m68k
#define cpu_lduw_code cpu_lduw_code_m68k
#define cpu_loop_exit cpu_loop_exit_m68k
#define cpu_loop_exit_noexc cpu_loop_exit_noexc_m68k
#define cpu_loop_exit_restore cpu_loop_exit_restore_m68k
#define cpu_memory_rw_debug cpu_memory_rw_debug_m68k
#define cpu_mmu_index cpu_mmu_index_m68k
#define cpu_outb cpu_outb_m68k

6
qemu/mips.h
View file

@ -132,13 +132,10 @@
#define arm_cpu_get_phys_page_attrs_debug arm_cpu_get_phys_page_attrs_debug_mips
#define arm_cpu_initfn arm_cpu_initfn_mips
#define arm_cpu_list arm_cpu_list_mips
#define cpu_loop_exit cpu_loop_exit_mips
#define cpu_loop_exit_restore cpu_loop_exit_restore_mips
#define arm_cpu_post_init arm_cpu_post_init_mips
#define arm_cpu_realizefn arm_cpu_realizefn_mips
#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_mips
#define arm_cpu_register_types arm_cpu_register_types_mips
#define cpu_resume_from_signal cpu_resume_from_signal_mips
#define arm_cpus arm_cpus_mips
#define arm_cpu_set_pc arm_cpu_set_pc_mips
#define arm_cp_write_ignore arm_cp_write_ignore_mips
@ -287,6 +284,9 @@
#define cpu_ldl_code cpu_ldl_code_mips
#define cpu_ldub_code cpu_ldub_code_mips
#define cpu_lduw_code cpu_lduw_code_mips
#define cpu_loop_exit cpu_loop_exit_mips
#define cpu_loop_exit_noexc cpu_loop_exit_noexc_mips
#define cpu_loop_exit_restore cpu_loop_exit_restore_mips
#define cpu_memory_rw_debug cpu_memory_rw_debug_mips
#define cpu_mmu_index cpu_mmu_index_mips
#define cpu_outb cpu_outb_mips

6
qemu/mips64.h
View file

@ -132,13 +132,10 @@
#define arm_cpu_get_phys_page_attrs_debug arm_cpu_get_phys_page_attrs_debug_mips64
#define arm_cpu_initfn arm_cpu_initfn_mips64
#define arm_cpu_list arm_cpu_list_mips64
#define cpu_loop_exit cpu_loop_exit_mips64
#define cpu_loop_exit_restore cpu_loop_exit_restore_mips64
#define arm_cpu_post_init arm_cpu_post_init_mips64
#define arm_cpu_realizefn arm_cpu_realizefn_mips64
#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_mips64
#define arm_cpu_register_types arm_cpu_register_types_mips64
#define cpu_resume_from_signal cpu_resume_from_signal_mips64
#define arm_cpus arm_cpus_mips64
#define arm_cpu_set_pc arm_cpu_set_pc_mips64
#define arm_cp_write_ignore arm_cp_write_ignore_mips64
@ -287,6 +284,9 @@
#define cpu_ldl_code cpu_ldl_code_mips64
#define cpu_ldub_code cpu_ldub_code_mips64
#define cpu_lduw_code cpu_lduw_code_mips64
#define cpu_loop_exit cpu_loop_exit_mips64
#define cpu_loop_exit_noexc cpu_loop_exit_noexc_mips64
#define cpu_loop_exit_restore cpu_loop_exit_restore_mips64
#define cpu_memory_rw_debug cpu_memory_rw_debug_mips64
#define cpu_mmu_index cpu_mmu_index_mips64
#define cpu_outb cpu_outb_mips64

6
qemu/mips64el.h
View file

@ -132,13 +132,10 @@
#define arm_cpu_get_phys_page_attrs_debug arm_cpu_get_phys_page_attrs_debug_mips64el
#define arm_cpu_initfn arm_cpu_initfn_mips64el
#define arm_cpu_list arm_cpu_list_mips64el
#define cpu_loop_exit cpu_loop_exit_mips64el
#define cpu_loop_exit_restore cpu_loop_exit_restore_mips64el
#define arm_cpu_post_init arm_cpu_post_init_mips64el
#define arm_cpu_realizefn arm_cpu_realizefn_mips64el
#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_mips64el
#define arm_cpu_register_types arm_cpu_register_types_mips64el
#define cpu_resume_from_signal cpu_resume_from_signal_mips64el
#define arm_cpus arm_cpus_mips64el
#define arm_cpu_set_pc arm_cpu_set_pc_mips64el
#define arm_cp_write_ignore arm_cp_write_ignore_mips64el
@ -287,6 +284,9 @@
#define cpu_ldl_code cpu_ldl_code_mips64el
#define cpu_ldub_code cpu_ldub_code_mips64el
#define cpu_lduw_code cpu_lduw_code_mips64el
#define cpu_loop_exit cpu_loop_exit_mips64el
#define cpu_loop_exit_noexc cpu_loop_exit_noexc_mips64el
#define cpu_loop_exit_restore cpu_loop_exit_restore_mips64el
#define cpu_memory_rw_debug cpu_memory_rw_debug_mips64el
#define cpu_mmu_index cpu_mmu_index_mips64el
#define cpu_outb cpu_outb_mips64el

6
qemu/mipsel.h
View file

@ -132,13 +132,10 @@
#define arm_cpu_get_phys_page_attrs_debug arm_cpu_get_phys_page_attrs_debug_mipsel
#define arm_cpu_initfn arm_cpu_initfn_mipsel
#define arm_cpu_list arm_cpu_list_mipsel
#define cpu_loop_exit cpu_loop_exit_mipsel
#define cpu_loop_exit_restore cpu_loop_exit_restore_mipsel
#define arm_cpu_post_init arm_cpu_post_init_mipsel
#define arm_cpu_realizefn arm_cpu_realizefn_mipsel
#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_mipsel
#define arm_cpu_register_types arm_cpu_register_types_mipsel
#define cpu_resume_from_signal cpu_resume_from_signal_mipsel
#define arm_cpus arm_cpus_mipsel
#define arm_cpu_set_pc arm_cpu_set_pc_mipsel
#define arm_cp_write_ignore arm_cp_write_ignore_mipsel
@ -287,6 +284,9 @@
#define cpu_ldl_code cpu_ldl_code_mipsel
#define cpu_ldub_code cpu_ldub_code_mipsel
#define cpu_lduw_code cpu_lduw_code_mipsel
#define cpu_loop_exit cpu_loop_exit_mipsel
#define cpu_loop_exit_noexc cpu_loop_exit_noexc_mipsel
#define cpu_loop_exit_restore cpu_loop_exit_restore_mipsel
#define cpu_memory_rw_debug cpu_memory_rw_debug_mipsel
#define cpu_mmu_index cpu_mmu_index_mipsel
#define cpu_outb cpu_outb_mipsel

6
qemu/powerpc.h
View file

@ -132,13 +132,10 @@
#define arm_cpu_get_phys_page_attrs_debug arm_cpu_get_phys_page_attrs_debug_powerpc
#define arm_cpu_initfn arm_cpu_initfn_powerpc
#define arm_cpu_list arm_cpu_list_powerpc
#define cpu_loop_exit cpu_loop_exit_powerpc
#define cpu_loop_exit_restore cpu_loop_exit_restore_powerpc
#define arm_cpu_post_init arm_cpu_post_init_powerpc
#define arm_cpu_realizefn arm_cpu_realizefn_powerpc
#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_powerpc
#define arm_cpu_register_types arm_cpu_register_types_powerpc
#define cpu_resume_from_signal cpu_resume_from_signal_powerpc
#define arm_cpus arm_cpus_powerpc
#define arm_cpu_set_pc arm_cpu_set_pc_powerpc
#define arm_cp_write_ignore arm_cp_write_ignore_powerpc
@ -287,6 +284,9 @@
#define cpu_ldl_code cpu_ldl_code_powerpc
#define cpu_ldub_code cpu_ldub_code_powerpc
#define cpu_lduw_code cpu_lduw_code_powerpc
#define cpu_loop_exit cpu_loop_exit_powerpc
#define cpu_loop_exit_noexc cpu_loop_exit_noexc_powerpc
#define cpu_loop_exit_restore cpu_loop_exit_restore_powerpc
#define cpu_memory_rw_debug cpu_memory_rw_debug_powerpc
#define cpu_mmu_index cpu_mmu_index_powerpc
#define cpu_outb cpu_outb_powerpc

6
qemu/sparc.h
View file

@ -132,13 +132,10 @@
#define arm_cpu_get_phys_page_attrs_debug arm_cpu_get_phys_page_attrs_debug_sparc
#define arm_cpu_initfn arm_cpu_initfn_sparc
#define arm_cpu_list arm_cpu_list_sparc
#define cpu_loop_exit cpu_loop_exit_sparc
#define cpu_loop_exit_restore cpu_loop_exit_restore_sparc
#define arm_cpu_post_init arm_cpu_post_init_sparc
#define arm_cpu_realizefn arm_cpu_realizefn_sparc
#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_sparc
#define arm_cpu_register_types arm_cpu_register_types_sparc
#define cpu_resume_from_signal cpu_resume_from_signal_sparc
#define arm_cpus arm_cpus_sparc
#define arm_cpu_set_pc arm_cpu_set_pc_sparc
#define arm_cp_write_ignore arm_cp_write_ignore_sparc
@ -287,6 +284,9 @@
#define cpu_ldl_code cpu_ldl_code_sparc
#define cpu_ldub_code cpu_ldub_code_sparc
#define cpu_lduw_code cpu_lduw_code_sparc
#define cpu_loop_exit cpu_loop_exit_sparc
#define cpu_loop_exit_noexc cpu_loop_exit_noexc_sparc
#define cpu_loop_exit_restore cpu_loop_exit_restore_sparc
#define cpu_memory_rw_debug cpu_memory_rw_debug_sparc
#define cpu_mmu_index cpu_mmu_index_sparc
#define cpu_outb cpu_outb_sparc

6
qemu/sparc64.h
View file

@ -132,13 +132,10 @@
#define arm_cpu_get_phys_page_attrs_debug arm_cpu_get_phys_page_attrs_debug_sparc64
#define arm_cpu_initfn arm_cpu_initfn_sparc64
#define arm_cpu_list arm_cpu_list_sparc64
#define cpu_loop_exit cpu_loop_exit_sparc64
#define cpu_loop_exit_restore cpu_loop_exit_restore_sparc64
#define arm_cpu_post_init arm_cpu_post_init_sparc64
#define arm_cpu_realizefn arm_cpu_realizefn_sparc64
#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_sparc64
#define arm_cpu_register_types arm_cpu_register_types_sparc64
#define cpu_resume_from_signal cpu_resume_from_signal_sparc64
#define arm_cpus arm_cpus_sparc64
#define arm_cpu_set_pc arm_cpu_set_pc_sparc64
#define arm_cp_write_ignore arm_cp_write_ignore_sparc64
@ -287,6 +284,9 @@
#define cpu_ldl_code cpu_ldl_code_sparc64
#define cpu_ldub_code cpu_ldub_code_sparc64
#define cpu_lduw_code cpu_lduw_code_sparc64
#define cpu_loop_exit cpu_loop_exit_sparc64
#define cpu_loop_exit_noexc cpu_loop_exit_noexc_sparc64
#define cpu_loop_exit_restore cpu_loop_exit_restore_sparc64
#define cpu_memory_rw_debug cpu_memory_rw_debug_sparc64
#define cpu_mmu_index cpu_mmu_index_sparc64
#define cpu_outb cpu_outb_sparc64

2
qemu/target-i386/bpt_helper.c
View file

@ -217,7 +217,7 @@ void breakpoint_handler(CPUState *cs)
if (check_hw_breakpoints(env, false)) {
raise_exception(env, EXCP01_DB);
} else {
cpu_resume_from_signal(cs, NULL);
cpu_loop_exit_noexc(cs);
}
}
} else {

4
qemu/translate-all.c
View file

@ -1504,7 +1504,7 @@ void tb_invalidate_phys_page_range(struct uc_struct *uc, tb_page_addr_t start, t
modifying the memory. It will ensure that it cannot modify
itself */
tb_gen_code(cpu, current_pc, current_cs_base, current_flags, 1);
cpu_resume_from_signal(cpu, NULL);
cpu_loop_exit_noexc(cpu);
}
#endif
}
@ -1755,7 +1755,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
repeating the fault, which is horribly inefficient.
Better would be to execute just this insn uncached, or generate a
second new TB. */
cpu_resume_from_signal(cpu, NULL);
cpu_loop_exit_noexc(cpu);
}
void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr)

6
qemu/x86_64.h
View file

@ -132,13 +132,10 @@
#define arm_cpu_get_phys_page_attrs_debug arm_cpu_get_phys_page_attrs_debug_x86_64
#define arm_cpu_initfn arm_cpu_initfn_x86_64
#define arm_cpu_list arm_cpu_list_x86_64
#define cpu_loop_exit cpu_loop_exit_x86_64
#define cpu_loop_exit_restore cpu_loop_exit_restore_x86_64
#define arm_cpu_post_init arm_cpu_post_init_x86_64
#define arm_cpu_realizefn arm_cpu_realizefn_x86_64
#define arm_cpu_register_gdb_regs_for_features arm_cpu_register_gdb_regs_for_features_x86_64
#define arm_cpu_register_types arm_cpu_register_types_x86_64
#define cpu_resume_from_signal cpu_resume_from_signal_x86_64
#define arm_cpus arm_cpus_x86_64
#define arm_cpu_set_pc arm_cpu_set_pc_x86_64
#define arm_cp_write_ignore arm_cp_write_ignore_x86_64
@ -287,6 +284,9 @@
#define cpu_ldl_code cpu_ldl_code_x86_64
#define cpu_ldub_code cpu_ldub_code_x86_64
#define cpu_lduw_code cpu_lduw_code_x86_64
#define cpu_loop_exit cpu_loop_exit_x86_64
#define cpu_loop_exit_noexc cpu_loop_exit_noexc_x86_64
#define cpu_loop_exit_restore cpu_loop_exit_restore_x86_64
#define cpu_memory_rw_debug cpu_memory_rw_debug_x86_64
#define cpu_mmu_index cpu_mmu_index_x86_64
#define cpu_outb cpu_outb_x86_64